1 // SPDX-License-Identifier: GPL-2.0
3 * An I2C driver for the PCF85063 RTC
4 * Copyright 2014 Rose Technology
6 * Author: Søren Andersen <san@rosetechnology.dk>
7 * Maintainers: http://www.nslu2-linux.org/
9 * Copyright (C) 2019 Micro Crystal AG
10 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
12 #include <linux/clk-provider.h>
13 #include <linux/i2c.h>
14 #include <linux/bcd.h>
15 #include <linux/rtc.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/pm_wakeirq.h>
19 #include <linux/regmap.h>
22 * Information for this driver was pulled from the following datasheets.
24 * https://www.nxp.com/docs/en/data-sheet/PCF85063A.pdf
25 * https://www.nxp.com/docs/en/data-sheet/PCF85063TP.pdf
27 * PCF85063A -- Rev. 7 — 30 March 2018
28 * PCF85063TP -- Rev. 4 — 6 May 2015
30 * https://www.microcrystal.com/fileadmin/Media/Products/RTC/App.Manual/RV-8263-C7_App-Manual.pdf
31 * RV8263 -- Rev. 1.0 — January 2019
34 #define PCF85063_REG_CTRL1 0x00 /* status */
35 #define PCF85063_REG_CTRL1_CAP_SEL BIT(0)
36 #define PCF85063_REG_CTRL1_STOP BIT(5)
37 #define PCF85063_REG_CTRL1_EXT_TEST BIT(7)
39 #define PCF85063_REG_CTRL2 0x01
40 #define PCF85063_CTRL2_AF BIT(6)
41 #define PCF85063_CTRL2_AIE BIT(7)
43 #define PCF85063_REG_OFFSET 0x02
44 #define PCF85063_OFFSET_SIGN_BIT 6 /* 2's complement sign bit */
45 #define PCF85063_OFFSET_MODE BIT(7)
46 #define PCF85063_OFFSET_STEP0 4340
47 #define PCF85063_OFFSET_STEP1 4069
49 #define PCF85063_REG_CLKO_F_MASK 0x07 /* frequency mask */
50 #define PCF85063_REG_CLKO_F_32768HZ 0x00
51 #define PCF85063_REG_CLKO_F_OFF 0x07
53 #define PCF85063_REG_RAM 0x03
55 #define PCF85063_REG_SC 0x04 /* datetime */
56 #define PCF85063_REG_SC_OS 0x80
58 #define PCF85063_REG_ALM_S 0x0b
59 #define PCF85063_AEN BIT(7)
61 struct pcf85063_config {
62 struct regmap_config regmap;
63 unsigned has_alarms:1;
64 unsigned force_cap_7000:1;
68 struct rtc_device *rtc;
69 struct regmap *regmap;
70 #ifdef CONFIG_COMMON_CLK
71 struct clk_hw clkout_hw;
75 static int pcf85063_rtc_read_time(struct device *dev, struct rtc_time *tm)
77 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
82 * while reading, the time/date registers are blocked and not updated
83 * anymore until the access is finished. To not lose a second
84 * event, the access must be finished within one second. So, read all
85 * time/date registers in one turn.
87 rc = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_SC, regs,
92 /* if the clock has lost its power it makes no sense to use its time */
93 if (regs[0] & PCF85063_REG_SC_OS) {
94 dev_warn(&pcf85063->rtc->dev, "Power loss detected, invalid time\n");
98 tm->tm_sec = bcd2bin(regs[0] & 0x7F);
99 tm->tm_min = bcd2bin(regs[1] & 0x7F);
100 tm->tm_hour = bcd2bin(regs[2] & 0x3F); /* rtc hr 0-23 */
101 tm->tm_mday = bcd2bin(regs[3] & 0x3F);
102 tm->tm_wday = regs[4] & 0x07;
103 tm->tm_mon = bcd2bin(regs[5] & 0x1F) - 1; /* rtc mn 1-12 */
104 tm->tm_year = bcd2bin(regs[6]);
110 static int pcf85063_rtc_set_time(struct device *dev, struct rtc_time *tm)
112 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
117 * to accurately set the time, reset the divider chain and keep it in
118 * reset state until all time/date registers are written
120 rc = regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1,
121 PCF85063_REG_CTRL1_EXT_TEST |
122 PCF85063_REG_CTRL1_STOP,
123 PCF85063_REG_CTRL1_STOP);
127 /* hours, minutes and seconds */
128 regs[0] = bin2bcd(tm->tm_sec) & 0x7F; /* clear OS flag */
130 regs[1] = bin2bcd(tm->tm_min);
131 regs[2] = bin2bcd(tm->tm_hour);
133 /* Day of month, 1 - 31 */
134 regs[3] = bin2bcd(tm->tm_mday);
137 regs[4] = tm->tm_wday & 0x07;
140 regs[5] = bin2bcd(tm->tm_mon + 1);
142 /* year and century */
143 regs[6] = bin2bcd(tm->tm_year - 100);
145 /* write all registers at once */
146 rc = regmap_bulk_write(pcf85063->regmap, PCF85063_REG_SC,
152 * Write the control register as a separate action since the size of
153 * the register space is different between the PCF85063TP and
154 * PCF85063A devices. The rollover point can not be used.
156 return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1,
157 PCF85063_REG_CTRL1_STOP, 0);
160 static int pcf85063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
162 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
167 ret = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_ALM_S,
172 alrm->time.tm_sec = bcd2bin(buf[0] & 0x7f);
173 alrm->time.tm_min = bcd2bin(buf[1] & 0x7f);
174 alrm->time.tm_hour = bcd2bin(buf[2] & 0x3f);
175 alrm->time.tm_mday = bcd2bin(buf[3] & 0x3f);
177 ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &val);
181 alrm->enabled = !!(val & PCF85063_CTRL2_AIE);
186 static int pcf85063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
188 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
192 buf[0] = bin2bcd(alrm->time.tm_sec);
193 buf[1] = bin2bcd(alrm->time.tm_min);
194 buf[2] = bin2bcd(alrm->time.tm_hour);
195 buf[3] = bin2bcd(alrm->time.tm_mday);
196 buf[4] = PCF85063_AEN; /* Do not match on week day */
198 ret = regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
199 PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF, 0);
203 ret = regmap_bulk_write(pcf85063->regmap, PCF85063_REG_ALM_S,
208 return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
209 PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF,
210 alrm->enabled ? PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF : PCF85063_CTRL2_AF);
213 static int pcf85063_rtc_alarm_irq_enable(struct device *dev,
214 unsigned int enabled)
216 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
218 return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
220 enabled ? PCF85063_CTRL2_AIE : 0);
223 static irqreturn_t pcf85063_rtc_handle_irq(int irq, void *dev_id)
225 struct pcf85063 *pcf85063 = dev_id;
229 err = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &val);
233 if (val & PCF85063_CTRL2_AF) {
234 rtc_update_irq(pcf85063->rtc, 1, RTC_IRQF | RTC_AF);
235 regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
236 PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF,
244 static int pcf85063_read_offset(struct device *dev, long *offset)
246 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
251 ret = regmap_read(pcf85063->regmap, PCF85063_REG_OFFSET, ®);
255 val = sign_extend32(reg & ~PCF85063_OFFSET_MODE,
256 PCF85063_OFFSET_SIGN_BIT);
258 if (reg & PCF85063_OFFSET_MODE)
259 *offset = val * PCF85063_OFFSET_STEP1;
261 *offset = val * PCF85063_OFFSET_STEP0;
266 static int pcf85063_set_offset(struct device *dev, long offset)
268 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
269 s8 mode0, mode1, reg;
270 unsigned int error0, error1;
272 if (offset > PCF85063_OFFSET_STEP0 * 63)
274 if (offset < PCF85063_OFFSET_STEP0 * -64)
277 mode0 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP0);
278 mode1 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP1);
280 error0 = abs(offset - (mode0 * PCF85063_OFFSET_STEP0));
281 error1 = abs(offset - (mode1 * PCF85063_OFFSET_STEP1));
282 if (mode1 > 63 || mode1 < -64 || error0 < error1)
283 reg = mode0 & ~PCF85063_OFFSET_MODE;
285 reg = mode1 | PCF85063_OFFSET_MODE;
287 return regmap_write(pcf85063->regmap, PCF85063_REG_OFFSET, reg);
290 static int pcf85063_ioctl(struct device *dev, unsigned int cmd,
293 struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
298 ret = regmap_read(pcf85063->regmap, PCF85063_REG_SC, &status);
302 status = status & PCF85063_REG_SC_OS ? RTC_VL_DATA_INVALID : 0;
304 return put_user(status, (unsigned int __user *)arg);
311 static const struct rtc_class_ops pcf85063_rtc_ops = {
312 .read_time = pcf85063_rtc_read_time,
313 .set_time = pcf85063_rtc_set_time,
314 .read_offset = pcf85063_read_offset,
315 .set_offset = pcf85063_set_offset,
316 .read_alarm = pcf85063_rtc_read_alarm,
317 .set_alarm = pcf85063_rtc_set_alarm,
318 .alarm_irq_enable = pcf85063_rtc_alarm_irq_enable,
319 .ioctl = pcf85063_ioctl,
322 static int pcf85063_nvmem_read(void *priv, unsigned int offset,
323 void *val, size_t bytes)
325 return regmap_read(priv, PCF85063_REG_RAM, val);
328 static int pcf85063_nvmem_write(void *priv, unsigned int offset,
329 void *val, size_t bytes)
331 return regmap_write(priv, PCF85063_REG_RAM, *(u8 *)val);
334 static int pcf85063_load_capacitance(struct pcf85063 *pcf85063,
335 const struct device_node *np,
336 unsigned int force_cap)
344 of_property_read_u32(np, "quartz-load-femtofarads", &load);
348 dev_warn(&pcf85063->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
354 reg = PCF85063_REG_CTRL1_CAP_SEL;
358 return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1,
359 PCF85063_REG_CTRL1_CAP_SEL, reg);
362 #ifdef CONFIG_COMMON_CLK
364 * Handling of the clkout
367 #define clkout_hw_to_pcf85063(_hw) container_of(_hw, struct pcf85063, clkout_hw)
369 static int clkout_rates[] = {
380 static unsigned long pcf85063_clkout_recalc_rate(struct clk_hw *hw,
381 unsigned long parent_rate)
383 struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
385 int ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf);
390 buf &= PCF85063_REG_CLKO_F_MASK;
391 return clkout_rates[buf];
394 static long pcf85063_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
395 unsigned long *prate)
399 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
400 if (clkout_rates[i] <= rate)
401 return clkout_rates[i];
406 static int pcf85063_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
407 unsigned long parent_rate)
409 struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
412 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
413 if (clkout_rates[i] == rate)
414 return regmap_update_bits(pcf85063->regmap,
416 PCF85063_REG_CLKO_F_MASK, i);
421 static int pcf85063_clkout_control(struct clk_hw *hw, bool enable)
423 struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
427 ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf);
430 buf &= PCF85063_REG_CLKO_F_MASK;
433 if (buf == PCF85063_REG_CLKO_F_OFF)
434 buf = PCF85063_REG_CLKO_F_32768HZ;
438 if (buf != PCF85063_REG_CLKO_F_OFF)
439 buf = PCF85063_REG_CLKO_F_OFF;
444 return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
445 PCF85063_REG_CLKO_F_MASK, buf);
448 static int pcf85063_clkout_prepare(struct clk_hw *hw)
450 return pcf85063_clkout_control(hw, 1);
453 static void pcf85063_clkout_unprepare(struct clk_hw *hw)
455 pcf85063_clkout_control(hw, 0);
458 static int pcf85063_clkout_is_prepared(struct clk_hw *hw)
460 struct pcf85063 *pcf85063 = clkout_hw_to_pcf85063(hw);
462 int ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &buf);
467 return (buf & PCF85063_REG_CLKO_F_MASK) != PCF85063_REG_CLKO_F_OFF;
470 static const struct clk_ops pcf85063_clkout_ops = {
471 .prepare = pcf85063_clkout_prepare,
472 .unprepare = pcf85063_clkout_unprepare,
473 .is_prepared = pcf85063_clkout_is_prepared,
474 .recalc_rate = pcf85063_clkout_recalc_rate,
475 .round_rate = pcf85063_clkout_round_rate,
476 .set_rate = pcf85063_clkout_set_rate,
479 static struct clk *pcf85063_clkout_register_clk(struct pcf85063 *pcf85063)
482 struct clk_init_data init;
483 struct device_node *node = pcf85063->rtc->dev.parent->of_node;
485 init.name = "pcf85063-clkout";
486 init.ops = &pcf85063_clkout_ops;
488 init.parent_names = NULL;
489 init.num_parents = 0;
490 pcf85063->clkout_hw.init = &init;
492 /* optional override of the clockname */
493 of_property_read_string(node, "clock-output-names", &init.name);
495 /* register the clock */
496 clk = devm_clk_register(&pcf85063->rtc->dev, &pcf85063->clkout_hw);
499 of_clk_add_provider(node, of_clk_src_simple_get, clk);
505 static const struct pcf85063_config pcf85063tp_config = {
509 .max_register = 0x0a,
513 static int pcf85063_probe(struct i2c_client *client)
515 struct pcf85063 *pcf85063;
518 const struct pcf85063_config *config = &pcf85063tp_config;
519 const void *data = of_device_get_match_data(&client->dev);
520 struct nvmem_config nvmem_cfg = {
521 .name = "pcf85063_nvram",
522 .reg_read = pcf85063_nvmem_read,
523 .reg_write = pcf85063_nvmem_write,
524 .type = NVMEM_TYPE_BATTERY_BACKED,
528 dev_dbg(&client->dev, "%s\n", __func__);
530 pcf85063 = devm_kzalloc(&client->dev, sizeof(struct pcf85063),
538 pcf85063->regmap = devm_regmap_init_i2c(client, &config->regmap);
539 if (IS_ERR(pcf85063->regmap))
540 return PTR_ERR(pcf85063->regmap);
542 i2c_set_clientdata(client, pcf85063);
544 err = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL1, &tmp);
546 dev_err(&client->dev, "RTC chip is not present\n");
550 pcf85063->rtc = devm_rtc_allocate_device(&client->dev);
551 if (IS_ERR(pcf85063->rtc))
552 return PTR_ERR(pcf85063->rtc);
554 err = pcf85063_load_capacitance(pcf85063, client->dev.of_node,
555 config->force_cap_7000 ? 7000 : 0);
557 dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
560 pcf85063->rtc->ops = &pcf85063_rtc_ops;
561 pcf85063->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
562 pcf85063->rtc->range_max = RTC_TIMESTAMP_END_2099;
563 pcf85063->rtc->uie_unsupported = 1;
564 clear_bit(RTC_FEATURE_ALARM, pcf85063->rtc->features);
566 if (config->has_alarms && client->irq > 0) {
567 err = devm_request_threaded_irq(&client->dev, client->irq,
568 NULL, pcf85063_rtc_handle_irq,
569 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
570 "pcf85063", pcf85063);
572 dev_warn(&pcf85063->rtc->dev,
573 "unable to request IRQ, alarms disabled\n");
575 set_bit(RTC_FEATURE_ALARM, pcf85063->rtc->features);
576 device_init_wakeup(&client->dev, true);
577 err = dev_pm_set_wake_irq(&client->dev, client->irq);
579 dev_err(&pcf85063->rtc->dev,
580 "failed to enable irq wake\n");
584 nvmem_cfg.priv = pcf85063->regmap;
585 devm_rtc_nvmem_register(pcf85063->rtc, &nvmem_cfg);
587 #ifdef CONFIG_COMMON_CLK
588 /* register clk in common clk framework */
589 pcf85063_clkout_register_clk(pcf85063);
592 return devm_rtc_register_device(pcf85063->rtc);
596 static const struct pcf85063_config pcf85063a_config = {
600 .max_register = 0x11,
605 static const struct pcf85063_config rv8263_config = {
609 .max_register = 0x11,
615 static const struct of_device_id pcf85063_of_match[] = {
616 { .compatible = "nxp,pcf85063", .data = &pcf85063tp_config },
617 { .compatible = "nxp,pcf85063tp", .data = &pcf85063tp_config },
618 { .compatible = "nxp,pcf85063a", .data = &pcf85063a_config },
619 { .compatible = "microcrystal,rv8263", .data = &rv8263_config },
622 MODULE_DEVICE_TABLE(of, pcf85063_of_match);
625 static struct i2c_driver pcf85063_driver = {
627 .name = "rtc-pcf85063",
628 .of_match_table = of_match_ptr(pcf85063_of_match),
630 .probe_new = pcf85063_probe,
633 module_i2c_driver(pcf85063_driver);
635 MODULE_AUTHOR("Søren Andersen <san@rosetechnology.dk>");
636 MODULE_DESCRIPTION("PCF85063 RTC driver");
637 MODULE_LICENSE("GPL");