drivers/rtc/rtc-pcf2127.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * An I2C and SPI driver for the NXP PCF2127/29 RTC
   4  * Copyright 2013 Til-Technologies
   5  *
   6  * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
   7  *
   8  * Watchdog and tamper functions
   9  * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
  10  *
  11  * based on the other drivers in this same directory.
  12  *
  13  * Datasheet: https://www.nxp.com/docs/en/data-sheet/PCF2127.pdf
  14  */
  15
  16 #include <linux/i2c.h>
  17 #include <linux/spi/spi.h>
  18 #include <linux/bcd.h>
  19 #include <linux/rtc.h>
  20 #include <linux/slab.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/regmap.h>
  25 #include <linux/watchdog.h>
  26
  27 /* Control register 1 */
  28 #define PCF2127_REG_CTRL1               0x00
  29 #define PCF2127_BIT_CTRL1_POR_OVRD              BIT(3)
  30 #define PCF2127_BIT_CTRL1_TSF1                  BIT(4)
  31 /* Control register 2 */
  32 #define PCF2127_REG_CTRL2               0x01
  33 #define PCF2127_BIT_CTRL2_AIE                   BIT(1)
  34 #define PCF2127_BIT_CTRL2_TSIE                  BIT(2)
  35 #define PCF2127_BIT_CTRL2_AF                    BIT(4)
  36 #define PCF2127_BIT_CTRL2_TSF2                  BIT(5)
  37 #define PCF2127_BIT_CTRL2_WDTF                  BIT(6)
  38 /* Control register 3 */
  39 #define PCF2127_REG_CTRL3               0x02
  40 #define PCF2127_BIT_CTRL3_BLIE                  BIT(0)
  41 #define PCF2127_BIT_CTRL3_BIE                   BIT(1)
  42 #define PCF2127_BIT_CTRL3_BLF                   BIT(2)
  43 #define PCF2127_BIT_CTRL3_BF                    BIT(3)
  44 #define PCF2127_BIT_CTRL3_BTSE                  BIT(4)
  45 /* Time and date registers */
  46 #define PCF2127_REG_SC                  0x03
  47 #define PCF2127_BIT_SC_OSF                      BIT(7)
  48 #define PCF2127_REG_MN                  0x04
  49 #define PCF2127_REG_HR                  0x05
  50 #define PCF2127_REG_DM                  0x06
  51 #define PCF2127_REG_DW                  0x07
  52 #define PCF2127_REG_MO                  0x08
  53 #define PCF2127_REG_YR                  0x09
  54 /* Alarm registers */
  55 #define PCF2127_REG_ALARM_SC            0x0A
  56 #define PCF2127_REG_ALARM_MN            0x0B
  57 #define PCF2127_REG_ALARM_HR            0x0C
  58 #define PCF2127_REG_ALARM_DM            0x0D
  59 #define PCF2127_REG_ALARM_DW            0x0E
  60 #define PCF2127_BIT_ALARM_AE                    BIT(7)
  61 /* CLKOUT control register */
  62 #define PCF2127_REG_CLKOUT              0x0f
  63 #define PCF2127_BIT_CLKOUT_OTPR                 BIT(5)
  64 /* Watchdog registers */
  65 #define PCF2127_REG_WD_CTL              0x10
  66 #define PCF2127_BIT_WD_CTL_TF0                  BIT(0)
  67 #define PCF2127_BIT_WD_CTL_TF1                  BIT(1)
  68 #define PCF2127_BIT_WD_CTL_CD0                  BIT(6)
  69 #define PCF2127_BIT_WD_CTL_CD1                  BIT(7)
  70 #define PCF2127_REG_WD_VAL              0x11
  71 /* Tamper timestamp registers */
  72 #define PCF2127_REG_TS_CTRL             0x12
  73 #define PCF2127_BIT_TS_CTRL_TSOFF               BIT(6)
  74 #define PCF2127_BIT_TS_CTRL_TSM                 BIT(7)
  75 #define PCF2127_REG_TS_SC               0x13
  76 #define PCF2127_REG_TS_MN               0x14
  77 #define PCF2127_REG_TS_HR               0x15
  78 #define PCF2127_REG_TS_DM               0x16
  79 #define PCF2127_REG_TS_MO               0x17
  80 #define PCF2127_REG_TS_YR               0x18
  81 /*
  82  * RAM registers
  83  * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
  84  * battery backed and can survive a power outage.
  85  * PCF2129 doesn't have this feature.
  86  */
  87 #define PCF2127_REG_RAM_ADDR_MSB        0x1A
  88 #define PCF2127_REG_RAM_WRT_CMD         0x1C
  89 #define PCF2127_REG_RAM_RD_CMD          0x1D
  90
  91 /* Watchdog timer value constants */
  92 #define PCF2127_WD_VAL_STOP             0
  93 #define PCF2127_WD_VAL_MIN              2
  94 #define PCF2127_WD_VAL_MAX              255
  95 #define PCF2127_WD_VAL_DEFAULT          60
  96
  97 /* Mask for currently enabled interrupts */
  98 #define PCF2127_CTRL1_IRQ_MASK (PCF2127_BIT_CTRL1_TSF1)
  99 #define PCF2127_CTRL2_IRQ_MASK ( \
 100                 PCF2127_BIT_CTRL2_AF | \
 101                 PCF2127_BIT_CTRL2_WDTF | \
 102                 PCF2127_BIT_CTRL2_TSF2)
 103
 104 struct pcf2127 {
 105         struct rtc_device *rtc;
 106         struct watchdog_device wdd;
 107         struct regmap *regmap;
 108         time64_t ts;
 109         bool ts_valid;
 110         bool irq_enabled;
 111 };
 112
 113 /*
 114  * In the routines that deal directly with the pcf2127 hardware, we use
 115  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
 116  */
 117 static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
 118 {
 119         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 120         unsigned char buf[10];
 121         int ret;
 122
 123         /*
 124          * Avoid reading CTRL2 register as it causes WD_VAL register
 125          * value to reset to 0 which means watchdog is stopped.
 126          */
 127         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
 128                                (buf + PCF2127_REG_CTRL3),
 129                                ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
 130         if (ret) {
 131                 dev_err(dev, "%s: read error\n", __func__);
 132                 return ret;
 133         }
 134
 135         if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
 136                 dev_info(dev,
 137                         "low voltage detected, check/replace RTC battery.\n");
 138
 139         /* Clock integrity is not guaranteed when OSF flag is set. */
 140         if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
 141                 /*
 142                  * no need clear the flag here,
 143                  * it will be cleared once the new date is saved
 144                  */
 145                 dev_warn(dev,
 146                          "oscillator stop detected, date/time is not reliable\n");
 147                 return -EINVAL;
 148         }
 149
 150         dev_dbg(dev,
 151                 "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
 152                 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
 153                 __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
 154                 buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
 155                 buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
 156                 buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
 157
 158         tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
 159         tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
 160         tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
 161         tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
 162         tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
 163         tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
 164         tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
 165         tm->tm_year += 100;
 166
 167         dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
 168                 "mday=%d, mon=%d, year=%d, wday=%d\n",
 169                 __func__,
 170                 tm->tm_sec, tm->tm_min, tm->tm_hour,
 171                 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 172
 173         return 0;
 174 }
 175
 176 static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
 177 {
 178         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 179         unsigned char buf[7];
 180         int i = 0, err;
 181
 182         dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
 183                 "mday=%d, mon=%d, year=%d, wday=%d\n",
 184                 __func__,
 185                 tm->tm_sec, tm->tm_min, tm->tm_hour,
 186                 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
 187
 188         /* hours, minutes and seconds */
 189         buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */
 190         buf[i++] = bin2bcd(tm->tm_min);
 191         buf[i++] = bin2bcd(tm->tm_hour);
 192         buf[i++] = bin2bcd(tm->tm_mday);
 193         buf[i++] = tm->tm_wday & 0x07;
 194
 195         /* month, 1 - 12 */
 196         buf[i++] = bin2bcd(tm->tm_mon + 1);
 197
 198         /* year */
 199         buf[i++] = bin2bcd(tm->tm_year - 100);
 200
 201         /* write register's data */
 202         err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
 203         if (err) {
 204                 dev_err(dev,
 205                         "%s: err=%d", __func__, err);
 206                 return err;
 207         }
 208
 209         return 0;
 210 }
 211
 212 static int pcf2127_rtc_ioctl(struct device *dev,
 213                                 unsigned int cmd, unsigned long arg)
 214 {
 215         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 216         int val, touser = 0;
 217         int ret;
 218
 219         switch (cmd) {
 220         case RTC_VL_READ:
 221                 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &val);
 222                 if (ret)
 223                         return ret;
 224
 225                 if (val & PCF2127_BIT_CTRL3_BLF)
 226                         touser |= RTC_VL_BACKUP_LOW;
 227
 228                 if (val & PCF2127_BIT_CTRL3_BF)
 229                         touser |= RTC_VL_BACKUP_SWITCH;
 230
 231                 return put_user(touser, (unsigned int __user *)arg);
 232
 233         case RTC_VL_CLR:
 234                 return regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 235                                           PCF2127_BIT_CTRL3_BF, 0);
 236
 237         default:
 238                 return -ENOIOCTLCMD;
 239         }
 240 }
 241
 242 static int pcf2127_nvmem_read(void *priv, unsigned int offset,
 243                               void *val, size_t bytes)
 244 {
 245         struct pcf2127 *pcf2127 = priv;
 246         int ret;
 247         unsigned char offsetbuf[] = { offset >> 8, offset };
 248
 249         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 250                                 offsetbuf, 2);
 251         if (ret)
 252                 return ret;
 253
 254         return regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
 255                                 val, bytes);
 256 }
 257
 258 static int pcf2127_nvmem_write(void *priv, unsigned int offset,
 259                                void *val, size_t bytes)
 260 {
 261         struct pcf2127 *pcf2127 = priv;
 262         int ret;
 263         unsigned char offsetbuf[] = { offset >> 8, offset };
 264
 265         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
 266                                 offsetbuf, 2);
 267         if (ret)
 268                 return ret;
 269
 270         return regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
 271                                  val, bytes);
 272 }
 273
 274 /* watchdog driver */
 275
 276 static int pcf2127_wdt_ping(struct watchdog_device *wdd)
 277 {
 278         struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 279
 280         return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
 281 }
 282
 283 /*
 284  * Restart watchdog timer if feature is active.
 285  *
 286  * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
 287  * since register also contain control/status flags for other features.
 288  * Always call this function after reading CTRL2 register.
 289  */
 290 static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
 291 {
 292         int ret = 0;
 293
 294         if (watchdog_active(wdd)) {
 295                 ret = pcf2127_wdt_ping(wdd);
 296                 if (ret)
 297                         dev_err(wdd->parent,
 298                                 "%s: watchdog restart failed, ret=%d\n",
 299                                 __func__, ret);
 300         }
 301
 302         return ret;
 303 }
 304
 305 static int pcf2127_wdt_start(struct watchdog_device *wdd)
 306 {
 307         return pcf2127_wdt_ping(wdd);
 308 }
 309
 310 static int pcf2127_wdt_stop(struct watchdog_device *wdd)
 311 {
 312         struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
 313
 314         return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
 315                             PCF2127_WD_VAL_STOP);
 316 }
 317
 318 static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
 319                                    unsigned int new_timeout)
 320 {
 321         dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
 322                 new_timeout, wdd->timeout);
 323
 324         wdd->timeout = new_timeout;
 325
 326         return pcf2127_wdt_active_ping(wdd);
 327 }
 328
 329 static const struct watchdog_info pcf2127_wdt_info = {
 330         .identity = "NXP PCF2127/PCF2129 Watchdog",
 331         .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
 332 };
 333
 334 static const struct watchdog_ops pcf2127_watchdog_ops = {
 335         .owner = THIS_MODULE,
 336         .start = pcf2127_wdt_start,
 337         .stop = pcf2127_wdt_stop,
 338         .ping = pcf2127_wdt_ping,
 339         .set_timeout = pcf2127_wdt_set_timeout,
 340 };
 341
 342 static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127)
 343 {
 344         u32 wdd_timeout;
 345         int ret;
 346
 347         if (!IS_ENABLED(CONFIG_WATCHDOG) ||
 348             !device_property_read_bool(dev, "reset-source"))
 349                 return 0;
 350
 351         pcf2127->wdd.parent = dev;
 352         pcf2127->wdd.info = &pcf2127_wdt_info;
 353         pcf2127->wdd.ops = &pcf2127_watchdog_ops;
 354         pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
 355         pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
 356         pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
 357         pcf2127->wdd.min_hw_heartbeat_ms = 500;
 358         pcf2127->wdd.status = WATCHDOG_NOWAYOUT_INIT_STATUS;
 359
 360         watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
 361
 362         /* Test if watchdog timer is started by bootloader */
 363         ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout);
 364         if (ret)
 365                 return ret;
 366
 367         if (wdd_timeout)
 368                 set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status);
 369
 370         return devm_watchdog_register_device(dev, &pcf2127->wdd);
 371 }
 372
 373 /* Alarm */
 374 static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 375 {
 376         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 377         u8 buf[5];
 378         unsigned int ctrl2;
 379         int ret;
 380
 381         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 382         if (ret)
 383                 return ret;
 384
 385         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 386         if (ret)
 387                 return ret;
 388
 389         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 390                                sizeof(buf));
 391         if (ret)
 392                 return ret;
 393
 394         alrm->enabled = ctrl2 & PCF2127_BIT_CTRL2_AIE;
 395         alrm->pending = ctrl2 & PCF2127_BIT_CTRL2_AF;
 396
 397         alrm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
 398         alrm->time.tm_min = bcd2bin(buf[1] & 0x7F);
 399         alrm->time.tm_hour = bcd2bin(buf[2] & 0x3F);
 400         alrm->time.tm_mday = bcd2bin(buf[3] & 0x3F);
 401
 402         return 0;
 403 }
 404
 405 static int pcf2127_rtc_alarm_irq_enable(struct device *dev, u32 enable)
 406 {
 407         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 408         int ret;
 409
 410         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 411                                  PCF2127_BIT_CTRL2_AIE,
 412                                  enable ? PCF2127_BIT_CTRL2_AIE : 0);
 413         if (ret)
 414                 return ret;
 415
 416         return pcf2127_wdt_active_ping(&pcf2127->wdd);
 417 }
 418
 419 static int pcf2127_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 420 {
 421         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 422         uint8_t buf[5];
 423         int ret;
 424
 425         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 426                                  PCF2127_BIT_CTRL2_AF, 0);
 427         if (ret)
 428                 return ret;
 429
 430         ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 431         if (ret)
 432                 return ret;
 433
 434         buf[0] = bin2bcd(alrm->time.tm_sec);
 435         buf[1] = bin2bcd(alrm->time.tm_min);
 436         buf[2] = bin2bcd(alrm->time.tm_hour);
 437         buf[3] = bin2bcd(alrm->time.tm_mday);
 438         buf[4] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */
 439
 440         ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
 441                                 sizeof(buf));
 442         if (ret)
 443                 return ret;
 444
 445         return pcf2127_rtc_alarm_irq_enable(dev, alrm->enabled);
 446 }
 447
 448 /*
 449  * This function reads ctrl2 register, caller is responsible for calling
 450  * pcf2127_wdt_active_ping()
 451  */
 452 static int pcf2127_rtc_ts_read(struct device *dev, time64_t *ts)
 453 {
 454         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 455         struct rtc_time tm;
 456         int ret;
 457         unsigned char data[25];
 458
 459         ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data,
 460                                sizeof(data));
 461         if (ret) {
 462                 dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
 463                 return ret;
 464         }
 465
 466         dev_dbg(dev,
 467                 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
 468                 __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2],
 469                 data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC],
 470                 data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR],
 471                 data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO],
 472                 data[PCF2127_REG_TS_YR]);
 473
 474         tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F);
 475         tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F);
 476         tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F);
 477         tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F);
 478         /* TS_MO register (month) value range: 1-12 */
 479         tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1;
 480         tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]);
 481         if (tm.tm_year < 70)
 482                 tm.tm_year += 100; /* assume we are in 1970...2069 */
 483
 484         ret = rtc_valid_tm(&tm);
 485         if (ret) {
 486                 dev_err(dev, "Invalid timestamp. ret=%d\n", ret);
 487                 return ret;
 488         }
 489
 490         *ts = rtc_tm_to_time64(&tm);
 491         return 0;
 492 };
 493
 494 static void pcf2127_rtc_ts_snapshot(struct device *dev)
 495 {
 496         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 497         int ret;
 498
 499         /* Let userspace read the first timestamp */
 500         if (pcf2127->ts_valid)
 501                 return;
 502
 503         ret = pcf2127_rtc_ts_read(dev, &pcf2127->ts);
 504         if (!ret)
 505                 pcf2127->ts_valid = true;
 506 }
 507
 508 static irqreturn_t pcf2127_rtc_irq(int irq, void *dev)
 509 {
 510         struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
 511         unsigned int ctrl1, ctrl2;
 512         int ret = 0;
 513
 514         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1);
 515         if (ret)
 516                 return IRQ_NONE;
 517
 518         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 519         if (ret)
 520                 return IRQ_NONE;
 521
 522         if (!(ctrl1 & PCF2127_CTRL1_IRQ_MASK || ctrl2 & PCF2127_CTRL2_IRQ_MASK))
 523                 return IRQ_NONE;
 524
 525         if (ctrl1 & PCF2127_BIT_CTRL1_TSF1 || ctrl2 & PCF2127_BIT_CTRL2_TSF2)
 526                 pcf2127_rtc_ts_snapshot(dev);
 527
 528         if (ctrl1 & PCF2127_CTRL1_IRQ_MASK)
 529                 regmap_write(pcf2127->regmap, PCF2127_REG_CTRL1,
 530                         ctrl1 & ~PCF2127_CTRL1_IRQ_MASK);
 531
 532         if (ctrl2 & PCF2127_CTRL2_IRQ_MASK)
 533                 regmap_write(pcf2127->regmap, PCF2127_REG_CTRL2,
 534                         ctrl2 & ~PCF2127_CTRL2_IRQ_MASK);
 535
 536         if (ctrl2 & PCF2127_BIT_CTRL2_AF)
 537                 rtc_update_irq(pcf2127->rtc, 1, RTC_IRQF | RTC_AF);
 538
 539         pcf2127_wdt_active_ping(&pcf2127->wdd);
 540
 541         return IRQ_HANDLED;
 542 }
 543
 544 static const struct rtc_class_ops pcf2127_rtc_ops = {
 545         .ioctl            = pcf2127_rtc_ioctl,
 546         .read_time        = pcf2127_rtc_read_time,
 547         .set_time         = pcf2127_rtc_set_time,
 548         .read_alarm       = pcf2127_rtc_read_alarm,
 549         .set_alarm        = pcf2127_rtc_set_alarm,
 550         .alarm_irq_enable = pcf2127_rtc_alarm_irq_enable,
 551 };
 552
 553 /* sysfs interface */
 554
 555 static ssize_t timestamp0_store(struct device *dev,
 556                                 struct device_attribute *attr,
 557                                 const char *buf, size_t count)
 558 {
 559         struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 560         int ret;
 561
 562         if (pcf2127->irq_enabled) {
 563                 pcf2127->ts_valid = false;
 564         } else {
 565                 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 566                         PCF2127_BIT_CTRL1_TSF1, 0);
 567                 if (ret) {
 568                         dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
 569                         return ret;
 570                 }
 571
 572                 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 573                         PCF2127_BIT_CTRL2_TSF2, 0);
 574                 if (ret) {
 575                         dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
 576                         return ret;
 577                 }
 578
 579                 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 580                 if (ret)
 581                         return ret;
 582         }
 583
 584         return count;
 585 };
 586
 587 static ssize_t timestamp0_show(struct device *dev,
 588                                struct device_attribute *attr, char *buf)
 589 {
 590         struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
 591         unsigned int ctrl1, ctrl2;
 592         int ret;
 593         time64_t ts;
 594
 595         if (pcf2127->irq_enabled) {
 596                 if (!pcf2127->ts_valid)
 597                         return 0;
 598                 ts = pcf2127->ts;
 599         } else {
 600                 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1);
 601                 if (ret)
 602                         return 0;
 603
 604                 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
 605                 if (ret)
 606                         return 0;
 607
 608                 if (!(ctrl1 & PCF2127_BIT_CTRL1_TSF1) &&
 609                     !(ctrl2 & PCF2127_BIT_CTRL2_TSF2))
 610                         return 0;
 611
 612                 ret = pcf2127_rtc_ts_read(dev->parent, &ts);
 613                 if (ret)
 614                         return 0;
 615
 616                 ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
 617                 if (ret)
 618                         return ret;
 619         }
 620         return sprintf(buf, "%llu\n", (unsigned long long)ts);
 621 };
 622
 623 static DEVICE_ATTR_RW(timestamp0);
 624
 625 static struct attribute *pcf2127_attrs[] = {
 626         &dev_attr_timestamp0.attr,
 627         NULL
 628 };
 629
 630 static const struct attribute_group pcf2127_attr_group = {
 631         .attrs  = pcf2127_attrs,
 632 };
 633
 634 static int pcf2127_probe(struct device *dev, struct regmap *regmap,
 635                          int alarm_irq, const char *name, bool is_pcf2127)
 636 {
 637         struct pcf2127 *pcf2127;
 638         int ret = 0;
 639         unsigned int val;
 640
 641         dev_dbg(dev, "%s\n", __func__);
 642
 643         pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
 644         if (!pcf2127)
 645                 return -ENOMEM;
 646
 647         pcf2127->regmap = regmap;
 648
 649         dev_set_drvdata(dev, pcf2127);
 650
 651         pcf2127->rtc = devm_rtc_allocate_device(dev);
 652         if (IS_ERR(pcf2127->rtc))
 653                 return PTR_ERR(pcf2127->rtc);
 654
 655         pcf2127->rtc->ops = &pcf2127_rtc_ops;
 656         pcf2127->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 657         pcf2127->rtc->range_max = RTC_TIMESTAMP_END_2099;
 658         pcf2127->rtc->set_start_time = true; /* Sets actual start to 1970 */
 659         pcf2127->rtc->uie_unsupported = 1;
 660         clear_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
 661
 662         if (alarm_irq > 0) {
 663                 ret = devm_request_threaded_irq(dev, alarm_irq, NULL,
 664                                                 pcf2127_rtc_irq,
 665                                                 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
 666                                                 dev_name(dev), dev);
 667                 if (ret) {
 668                         dev_err(dev, "failed to request alarm irq\n");
 669                         return ret;
 670                 }
 671                 pcf2127->irq_enabled = true;
 672         }
 673
 674         if (alarm_irq > 0 || device_property_read_bool(dev, "wakeup-source")) {
 675                 device_init_wakeup(dev, true);
 676                 set_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
 677         }
 678
 679         if (is_pcf2127) {
 680                 struct nvmem_config nvmem_cfg = {
 681                         .priv = pcf2127,
 682                         .reg_read = pcf2127_nvmem_read,
 683                         .reg_write = pcf2127_nvmem_write,
 684                         .size = 512,
 685                 };
 686
 687                 ret = devm_rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
 688         }
 689
 690         /*
 691          * The "Power-On Reset Override" facility prevents the RTC to do a reset
 692          * after power on. For normal operation the PORO must be disabled.
 693          */
 694         regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 695                                 PCF2127_BIT_CTRL1_POR_OVRD);
 696
 697         ret = regmap_read(pcf2127->regmap, PCF2127_REG_CLKOUT, &val);
 698         if (ret < 0)
 699                 return ret;
 700
 701         if (!(val & PCF2127_BIT_CLKOUT_OTPR)) {
 702                 ret = regmap_set_bits(pcf2127->regmap, PCF2127_REG_CLKOUT,
 703                                       PCF2127_BIT_CLKOUT_OTPR);
 704                 if (ret < 0)
 705                         return ret;
 706
 707                 msleep(100);
 708         }
 709
 710         /*
 711          * Watchdog timer enabled and reset pin /RST activated when timed out.
 712          * Select 1Hz clock source for watchdog timer.
 713          * Note: Countdown timer disabled and not available.
 714          * For pca2129, pcf2129, only bit[7] is for Symbol WD_CD
 715          * of register watchdg_tim_ctl. The bit[6] is labeled
 716          * as T. Bits labeled as T must always be written with
 717          * logic 0.
 718          */
 719         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
 720                                  PCF2127_BIT_WD_CTL_CD1 |
 721                                  PCF2127_BIT_WD_CTL_CD0 |
 722                                  PCF2127_BIT_WD_CTL_TF1 |
 723                                  PCF2127_BIT_WD_CTL_TF0,
 724                                  PCF2127_BIT_WD_CTL_CD1 |
 725                                  (is_pcf2127 ? PCF2127_BIT_WD_CTL_CD0 : 0) |
 726                                  PCF2127_BIT_WD_CTL_TF1);
 727         if (ret) {
 728                 dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
 729                 return ret;
 730         }
 731
 732         pcf2127_watchdog_init(dev, pcf2127);
 733
 734         /*
 735          * Disable battery low/switch-over timestamp and interrupts.
 736          * Clear battery interrupt flags which can block new trigger events.
 737          * Note: This is the default chip behaviour but added to ensure
 738          * correct tamper timestamp and interrupt function.
 739          */
 740         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
 741                                  PCF2127_BIT_CTRL3_BTSE |
 742                                  PCF2127_BIT_CTRL3_BIE |
 743                                  PCF2127_BIT_CTRL3_BLIE, 0);
 744         if (ret) {
 745                 dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
 746                         __func__);
 747                 return ret;
 748         }
 749
 750         /*
 751          * Enable timestamp function and store timestamp of first trigger
 752          * event until TSF1 and TFS2 interrupt flags are cleared.
 753          */
 754         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
 755                                  PCF2127_BIT_TS_CTRL_TSOFF |
 756                                  PCF2127_BIT_TS_CTRL_TSM,
 757                                  PCF2127_BIT_TS_CTRL_TSM);
 758         if (ret) {
 759                 dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
 760                         __func__);
 761                 return ret;
 762         }
 763
 764         /*
 765          * Enable interrupt generation when TSF1 or TSF2 timestamp flags
 766          * are set. Interrupt signal is an open-drain output and can be
 767          * left floating if unused.
 768          */
 769         ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
 770                                  PCF2127_BIT_CTRL2_TSIE,
 771                                  PCF2127_BIT_CTRL2_TSIE);
 772         if (ret) {
 773                 dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
 774                         __func__);
 775                 return ret;
 776         }
 777
 778         ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
 779         if (ret) {
 780                 dev_err(dev, "%s: tamper sysfs registering failed\n",
 781                         __func__);
 782                 return ret;
 783         }
 784
 785         return devm_rtc_register_device(pcf2127->rtc);
 786 }
 787
 788 #ifdef CONFIG_OF
 789 static const struct of_device_id pcf2127_of_match[] = {
 790         { .compatible = "nxp,pcf2127" },
 791         { .compatible = "nxp,pcf2129" },
 792         { .compatible = "nxp,pca2129" },
 793         {}
 794 };
 795 MODULE_DEVICE_TABLE(of, pcf2127_of_match);
 796 #endif
 797
 798 #if IS_ENABLED(CONFIG_I2C)
 799
 800 static int pcf2127_i2c_write(void *context, const void *data, size_t count)
 801 {
 802         struct device *dev = context;
 803         struct i2c_client *client = to_i2c_client(dev);
 804         int ret;
 805
 806         ret = i2c_master_send(client, data, count);
 807         if (ret != count)
 808                 return ret < 0 ? ret : -EIO;
 809
 810         return 0;
 811 }
 812
 813 static int pcf2127_i2c_gather_write(void *context,
 814                                 const void *reg, size_t reg_size,
 815                                 const void *val, size_t val_size)
 816 {
 817         struct device *dev = context;
 818         struct i2c_client *client = to_i2c_client(dev);
 819         int ret;
 820         void *buf;
 821
 822         if (WARN_ON(reg_size != 1))
 823                 return -EINVAL;
 824
 825         buf = kmalloc(val_size + 1, GFP_KERNEL);
 826         if (!buf)
 827                 return -ENOMEM;
 828
 829         memcpy(buf, reg, 1);
 830         memcpy(buf + 1, val, val_size);
 831
 832         ret = i2c_master_send(client, buf, val_size + 1);
 833
 834         kfree(buf);
 835
 836         if (ret != val_size + 1)
 837                 return ret < 0 ? ret : -EIO;
 838
 839         return 0;
 840 }
 841
 842 static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
 843                                 void *val, size_t val_size)
 844 {
 845         struct device *dev = context;
 846         struct i2c_client *client = to_i2c_client(dev);
 847         int ret;
 848
 849         if (WARN_ON(reg_size != 1))
 850                 return -EINVAL;
 851
 852         ret = i2c_master_send(client, reg, 1);
 853         if (ret != 1)
 854                 return ret < 0 ? ret : -EIO;
 855
 856         ret = i2c_master_recv(client, val, val_size);
 857         if (ret != val_size)
 858                 return ret < 0 ? ret : -EIO;
 859
 860         return 0;
 861 }
 862
 863 /*
 864  * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
 865  * is that the STOP condition is required between set register address and
 866  * read register data when reading from registers.
 867  */
 868 static const struct regmap_bus pcf2127_i2c_regmap = {
 869         .write = pcf2127_i2c_write,
 870         .gather_write = pcf2127_i2c_gather_write,
 871         .read = pcf2127_i2c_read,
 872 };
 873
 874 static struct i2c_driver pcf2127_i2c_driver;
 875
 876 static int pcf2127_i2c_probe(struct i2c_client *client,
 877                                 const struct i2c_device_id *id)
 878 {
 879         struct regmap *regmap;
 880         static const struct regmap_config config = {
 881                 .reg_bits = 8,
 882                 .val_bits = 8,
 883                 .max_register = 0x1d,
 884         };
 885
 886         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
 887                 return -ENODEV;
 888
 889         regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
 890                                         &client->dev, &config);
 891         if (IS_ERR(regmap)) {
 892                 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
 893                         __func__, PTR_ERR(regmap));
 894                 return PTR_ERR(regmap);
 895         }
 896
 897         return pcf2127_probe(&client->dev, regmap, client->irq,
 898                              pcf2127_i2c_driver.driver.name, id->driver_data);
 899 }
 900
 901 static const struct i2c_device_id pcf2127_i2c_id[] = {
 902         { "pcf2127", 1 },
 903         { "pcf2129", 0 },
 904         { "pca2129", 0 },
 905         { }
 906 };
 907 MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
 908
 909 static struct i2c_driver pcf2127_i2c_driver = {
 910         .driver         = {
 911                 .name   = "rtc-pcf2127-i2c",
 912                 .of_match_table = of_match_ptr(pcf2127_of_match),
 913         },
 914         .probe          = pcf2127_i2c_probe,
 915         .id_table       = pcf2127_i2c_id,
 916 };
 917
 918 static int pcf2127_i2c_register_driver(void)
 919 {
 920         return i2c_add_driver(&pcf2127_i2c_driver);
 921 }
 922
 923 static void pcf2127_i2c_unregister_driver(void)
 924 {
 925         i2c_del_driver(&pcf2127_i2c_driver);
 926 }
 927
 928 #else
 929
 930 static int pcf2127_i2c_register_driver(void)
 931 {
 932         return 0;
 933 }
 934
 935 static void pcf2127_i2c_unregister_driver(void)
 936 {
 937 }
 938
 939 #endif
 940
 941 #if IS_ENABLED(CONFIG_SPI_MASTER)
 942
 943 static struct spi_driver pcf2127_spi_driver;
 944
 945 static int pcf2127_spi_probe(struct spi_device *spi)
 946 {
 947         static const struct regmap_config config = {
 948                 .reg_bits = 8,
 949                 .val_bits = 8,
 950                 .read_flag_mask = 0xa0,
 951                 .write_flag_mask = 0x20,
 952                 .max_register = 0x1d,
 953         };
 954         struct regmap *regmap;
 955
 956         regmap = devm_regmap_init_spi(spi, &config);
 957         if (IS_ERR(regmap)) {
 958                 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
 959                         __func__, PTR_ERR(regmap));
 960                 return PTR_ERR(regmap);
 961         }
 962
 963         return pcf2127_probe(&spi->dev, regmap, spi->irq,
 964                              pcf2127_spi_driver.driver.name,
 965                              spi_get_device_id(spi)->driver_data);
 966 }
 967
 968 static const struct spi_device_id pcf2127_spi_id[] = {
 969         { "pcf2127", 1 },
 970         { "pcf2129", 0 },
 971         { "pca2129", 0 },
 972         { }
 973 };
 974 MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
 975
 976 static struct spi_driver pcf2127_spi_driver = {
 977         .driver         = {
 978                 .name   = "rtc-pcf2127-spi",
 979                 .of_match_table = of_match_ptr(pcf2127_of_match),
 980         },
 981         .probe          = pcf2127_spi_probe,
 982         .id_table       = pcf2127_spi_id,
 983 };
 984
 985 static int pcf2127_spi_register_driver(void)
 986 {
 987         return spi_register_driver(&pcf2127_spi_driver);
 988 }
 989
 990 static void pcf2127_spi_unregister_driver(void)
 991 {
 992         spi_unregister_driver(&pcf2127_spi_driver);
 993 }
 994
 995 #else
 996
 997 static int pcf2127_spi_register_driver(void)
 998 {
 999         return 0;
1000 }
1001
1002 static void pcf2127_spi_unregister_driver(void)
1003 {
1004 }
1005
1006 #endif
1007
1008 static int __init pcf2127_init(void)
1009 {
1010         int ret;
1011
1012         ret = pcf2127_i2c_register_driver();
1013         if (ret) {
1014                 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
1015                 return ret;
1016         }
1017
1018         ret = pcf2127_spi_register_driver();
1019         if (ret) {
1020                 pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
1021                 pcf2127_i2c_unregister_driver();
1022         }
1023
1024         return ret;
1025 }
1026 module_init(pcf2127_init)
1027
1028 static void __exit pcf2127_exit(void)
1029 {
1030         pcf2127_spi_unregister_driver();
1031         pcf2127_i2c_unregister_driver();
1032 }
1033 module_exit(pcf2127_exit)
1034
1035 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
1036 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
1037 MODULE_LICENSE("GPL v2");