1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/delay.h>
4 #include <linux/export.h>
5 #include <linux/mc146818rtc.h>
8 #include <linux/acpi.h>
12 * Execute a function while the UIP (Update-in-progress) bit of the RTC is
15 * Warning: callback may be executed more then once.
17 bool mc146818_avoid_UIP(void (*callback)(unsigned char seconds, void *param),
22 unsigned char seconds;
24 for (i = 0; i < 10; i++) {
25 spin_lock_irqsave(&rtc_lock, flags);
28 * Check whether there is an update in progress during which the
29 * readout is unspecified. The maximum update time is ~2ms. Poll
30 * every msec for completion.
32 * Store the second value before checking UIP so a long lasting
33 * NMI which happens to hit after the UIP check cannot make
34 * an update cycle invisible.
36 seconds = CMOS_READ(RTC_SECONDS);
38 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {
39 spin_unlock_irqrestore(&rtc_lock, flags);
44 /* Revalidate the above readout */
45 if (seconds != CMOS_READ(RTC_SECONDS)) {
46 spin_unlock_irqrestore(&rtc_lock, flags);
51 callback(seconds, param);
54 * Check for the UIP bit again. If it is set now then
55 * the above values may contain garbage.
57 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {
58 spin_unlock_irqrestore(&rtc_lock, flags);
64 * A NMI might have interrupted the above sequence so check
65 * whether the seconds value has changed which indicates that
66 * the NMI took longer than the UIP bit was set. Unlikely, but
67 * possible and there is also virt...
69 if (seconds != CMOS_READ(RTC_SECONDS)) {
70 spin_unlock_irqrestore(&rtc_lock, flags);
73 spin_unlock_irqrestore(&rtc_lock, flags);
79 EXPORT_SYMBOL_GPL(mc146818_avoid_UIP);
82 * If the UIP (Update-in-progress) bit of the RTC is set for more then
83 * 10ms, the RTC is apparently broken or not present.
85 bool mc146818_does_rtc_work(void)
91 for (i = 0; i < 10; i++) {
92 spin_lock_irqsave(&rtc_lock, flags);
93 val = CMOS_READ(RTC_FREQ_SELECT);
94 spin_unlock_irqrestore(&rtc_lock, flags);
96 if ((val & RTC_UIP) == 0)
104 EXPORT_SYMBOL_GPL(mc146818_does_rtc_work);
106 int mc146818_get_time(struct rtc_time *time)
110 unsigned int iter_count = 0;
111 unsigned char century = 0;
114 #ifdef CONFIG_MACH_DECSTATION
115 unsigned int real_year;
119 if (iter_count > 10) {
120 memset(time, 0, sizeof(*time));
125 spin_lock_irqsave(&rtc_lock, flags);
128 * Check whether there is an update in progress during which the
129 * readout is unspecified. The maximum update time is ~2ms. Poll
130 * every msec for completion.
132 * Store the second value before checking UIP so a long lasting NMI
133 * which happens to hit after the UIP check cannot make an update
136 time->tm_sec = CMOS_READ(RTC_SECONDS);
138 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) {
139 spin_unlock_irqrestore(&rtc_lock, flags);
144 /* Revalidate the above readout */
145 if (time->tm_sec != CMOS_READ(RTC_SECONDS)) {
146 spin_unlock_irqrestore(&rtc_lock, flags);
151 * Only the values that we read from the RTC are set. We leave
152 * tm_wday, tm_yday and tm_isdst untouched. Even though the
153 * RTC has RTC_DAY_OF_WEEK, we ignore it, as it is only updated
154 * by the RTC when initially set to a non-zero value.
156 time->tm_min = CMOS_READ(RTC_MINUTES);
157 time->tm_hour = CMOS_READ(RTC_HOURS);
158 time->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
159 time->tm_mon = CMOS_READ(RTC_MONTH);
160 time->tm_year = CMOS_READ(RTC_YEAR);
161 #ifdef CONFIG_MACH_DECSTATION
162 real_year = CMOS_READ(RTC_DEC_YEAR);
165 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
166 acpi_gbl_FADT.century)
167 century = CMOS_READ(acpi_gbl_FADT.century);
169 ctrl = CMOS_READ(RTC_CONTROL);
171 * Check for the UIP bit again. If it is set now then
172 * the above values may contain garbage.
174 retry = CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP;
176 * A NMI might have interrupted the above sequence so check whether
177 * the seconds value has changed which indicates that the NMI took
178 * longer than the UIP bit was set. Unlikely, but possible and
179 * there is also virt...
181 retry |= time->tm_sec != CMOS_READ(RTC_SECONDS);
183 spin_unlock_irqrestore(&rtc_lock, flags);
188 if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
190 time->tm_sec = bcd2bin(time->tm_sec);
191 time->tm_min = bcd2bin(time->tm_min);
192 time->tm_hour = bcd2bin(time->tm_hour);
193 time->tm_mday = bcd2bin(time->tm_mday);
194 time->tm_mon = bcd2bin(time->tm_mon);
195 time->tm_year = bcd2bin(time->tm_year);
196 century = bcd2bin(century);
199 #ifdef CONFIG_MACH_DECSTATION
200 time->tm_year += real_year - 72;
204 time->tm_year += (century - 19) * 100;
207 * Account for differences between how the RTC uses the values
208 * and how they are defined in a struct rtc_time;
210 if (time->tm_year <= 69)
211 time->tm_year += 100;
217 EXPORT_SYMBOL_GPL(mc146818_get_time);
219 /* AMD systems don't allow access to AltCentury with DV1 */
220 static bool apply_amd_register_a_behavior(void)
223 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
224 boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
230 /* Set the current date and time in the real time clock. */
231 int mc146818_set_time(struct rtc_time *time)
234 unsigned char mon, day, hrs, min, sec;
235 unsigned char save_control, save_freq_select;
237 #ifdef CONFIG_MACH_DECSTATION
238 unsigned int real_yrs, leap_yr;
240 unsigned char century = 0;
243 mon = time->tm_mon + 1; /* tm_mon starts at zero */
249 if (yrs > 255) /* They are unsigned */
252 #ifdef CONFIG_MACH_DECSTATION
254 leap_yr = ((!((yrs + 1900) % 4) && ((yrs + 1900) % 100)) ||
255 !((yrs + 1900) % 400));
259 * We want to keep the year set to 73 until March
260 * for non-leap years, so that Feb, 29th is handled
263 if (!leap_yr && mon < 3) {
270 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
271 acpi_gbl_FADT.century) {
272 century = (yrs + 1900) / 100;
277 /* These limits and adjustments are independent of
278 * whether the chip is in binary mode or not.
286 spin_lock_irqsave(&rtc_lock, flags);
287 save_control = CMOS_READ(RTC_CONTROL);
288 spin_unlock_irqrestore(&rtc_lock, flags);
289 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
296 century = bin2bcd(century);
299 spin_lock_irqsave(&rtc_lock, flags);
300 save_control = CMOS_READ(RTC_CONTROL);
301 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
302 save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
303 if (apply_amd_register_a_behavior())
304 CMOS_WRITE((save_freq_select & ~RTC_AMD_BANK_SELECT), RTC_FREQ_SELECT);
306 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
308 #ifdef CONFIG_MACH_DECSTATION
309 CMOS_WRITE(real_yrs, RTC_DEC_YEAR);
311 CMOS_WRITE(yrs, RTC_YEAR);
312 CMOS_WRITE(mon, RTC_MONTH);
313 CMOS_WRITE(day, RTC_DAY_OF_MONTH);
314 CMOS_WRITE(hrs, RTC_HOURS);
315 CMOS_WRITE(min, RTC_MINUTES);
316 CMOS_WRITE(sec, RTC_SECONDS);
318 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
319 acpi_gbl_FADT.century)
320 CMOS_WRITE(century, acpi_gbl_FADT.century);
323 CMOS_WRITE(save_control, RTC_CONTROL);
324 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
326 spin_unlock_irqrestore(&rtc_lock, flags);
330 EXPORT_SYMBOL_GPL(mc146818_set_time);