1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C client/driver for the ST M41T80 family of i2c rtc chips.
5 * Author: Alexander Bigga <ab@mycable.de>
7 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com>
9 * 2006 (c) mycable GmbH
12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14 #include <linux/bcd.h>
15 #include <linux/clk-provider.h>
16 #include <linux/i2c.h>
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
21 #include <linux/rtc.h>
22 #include <linux/slab.h>
23 #include <linux/mutex.h>
24 #include <linux/string.h>
25 #ifdef CONFIG_RTC_DRV_M41T80_WDT
27 #include <linux/ioctl.h>
28 #include <linux/miscdevice.h>
29 #include <linux/reboot.h>
30 #include <linux/watchdog.h>
33 #define M41T80_REG_SSEC 0x00
34 #define M41T80_REG_SEC 0x01
35 #define M41T80_REG_MIN 0x02
36 #define M41T80_REG_HOUR 0x03
37 #define M41T80_REG_WDAY 0x04
38 #define M41T80_REG_DAY 0x05
39 #define M41T80_REG_MON 0x06
40 #define M41T80_REG_YEAR 0x07
41 #define M41T80_REG_ALARM_MON 0x0a
42 #define M41T80_REG_ALARM_DAY 0x0b
43 #define M41T80_REG_ALARM_HOUR 0x0c
44 #define M41T80_REG_ALARM_MIN 0x0d
45 #define M41T80_REG_ALARM_SEC 0x0e
46 #define M41T80_REG_FLAGS 0x0f
47 #define M41T80_REG_SQW 0x13
49 #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
50 #define M41T80_ALARM_REG_SIZE \
51 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
53 #define M41T80_SQW_MAX_FREQ 32768
55 #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
56 #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
57 #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
58 #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
59 #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
60 #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
61 #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
62 #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
63 #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
64 #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
66 #define M41T80_FEATURE_HT BIT(0) /* Halt feature */
67 #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
68 #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
69 #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
70 #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
72 static const struct i2c_device_id m41t80_id[] = {
73 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
74 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
75 { "m41t80", M41T80_FEATURE_SQ },
76 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
77 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
78 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
79 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
80 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
81 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
82 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
83 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
86 MODULE_DEVICE_TABLE(i2c, m41t80_id);
88 static const __maybe_unused struct of_device_id m41t80_of_match[] = {
90 .compatible = "st,m41t62",
91 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
94 .compatible = "st,m41t65",
95 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
98 .compatible = "st,m41t80",
99 .data = (void *)(M41T80_FEATURE_SQ)
102 .compatible = "st,m41t81",
103 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
106 .compatible = "st,m41t81s",
107 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
110 .compatible = "st,m41t82",
111 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
114 .compatible = "st,m41t83",
115 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
118 .compatible = "st,m41t84",
119 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
122 .compatible = "st,m41t85",
123 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
126 .compatible = "st,m41t87",
127 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
130 .compatible = "microcrystal,rv4162",
131 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
133 /* DT compatibility only, do not use compatibles below: */
135 .compatible = "st,rv4162",
136 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
139 .compatible = "rv4162",
140 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
144 MODULE_DEVICE_TABLE(of, m41t80_of_match);
147 unsigned long features;
148 struct i2c_client *client;
149 struct rtc_device *rtc;
150 #ifdef CONFIG_COMMON_CLK
157 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
159 struct i2c_client *client = dev_id;
160 struct m41t80_data *m41t80 = i2c_get_clientdata(client);
161 unsigned long events = 0;
162 int flags, flags_afe;
164 rtc_lock(m41t80->rtc);
166 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
168 rtc_unlock(m41t80->rtc);
172 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
174 rtc_unlock(m41t80->rtc);
178 if (flags & M41T80_FLAGS_AF) {
179 flags &= ~M41T80_FLAGS_AF;
180 flags_afe &= ~M41T80_ALMON_AFE;
185 rtc_update_irq(m41t80->rtc, 1, events);
186 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
187 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
191 rtc_unlock(m41t80->rtc);
196 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
198 struct i2c_client *client = to_i2c_client(dev);
199 unsigned char buf[8];
202 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
206 if (flags & M41T80_FLAGS_OF) {
207 dev_err(&client->dev, "Oscillator failure, data is invalid.\n");
211 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
214 dev_err(&client->dev, "Unable to read date\n");
218 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
219 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
220 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
221 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
222 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
223 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
225 /* assume 20YY not 19YY, and ignore the Century Bit */
226 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
230 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm)
232 struct i2c_client *client = to_i2c_client(dev);
233 struct m41t80_data *clientdata = i2c_get_clientdata(client);
234 unsigned char buf[8];
237 buf[M41T80_REG_SSEC] = 0;
238 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec);
239 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min);
240 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour);
241 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday);
242 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1);
243 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100);
244 buf[M41T80_REG_WDAY] = tm->tm_wday;
246 /* If the square wave output is controlled in the weekday register */
247 if (clientdata->features & M41T80_FEATURE_SQ_ALT) {
250 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY);
254 buf[M41T80_REG_WDAY] |= (val & 0xf0);
257 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
260 dev_err(&client->dev, "Unable to write to date registers\n");
264 /* Clear the OF bit of Flags Register */
265 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
269 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
270 flags & ~M41T80_FLAGS_OF);
272 dev_err(&client->dev, "Unable to write flags register\n");
279 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
281 struct i2c_client *client = to_i2c_client(dev);
282 struct m41t80_data *clientdata = i2c_get_clientdata(client);
285 if (clientdata->features & M41T80_FEATURE_BL) {
286 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
289 seq_printf(seq, "battery\t\t: %s\n",
290 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
295 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
297 struct i2c_client *client = to_i2c_client(dev);
300 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
305 flags |= M41T80_ALMON_AFE;
307 flags &= ~M41T80_ALMON_AFE;
309 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
311 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval);
317 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
319 struct i2c_client *client = to_i2c_client(dev);
323 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
324 alarmvals[1] = bin2bcd(alrm->time.tm_mday);
325 alarmvals[2] = bin2bcd(alrm->time.tm_hour);
326 alarmvals[3] = bin2bcd(alrm->time.tm_min);
327 alarmvals[4] = bin2bcd(alrm->time.tm_sec);
329 /* Clear AF and AFE flags */
330 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
333 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
334 ret & ~(M41T80_ALMON_AFE));
336 dev_err(dev, "Unable to clear AFE bit\n");
340 /* Keep SQWE bit value */
341 alarmvals[0] |= (ret & M41T80_ALMON_SQWE);
343 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
347 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
348 ret & ~(M41T80_FLAGS_AF));
350 dev_err(dev, "Unable to clear AF bit\n");
354 /* Write the alarm */
355 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
360 /* Enable the alarm interrupt */
362 alarmvals[0] |= M41T80_ALMON_AFE;
363 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
372 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
374 struct i2c_client *client = to_i2c_client(dev);
378 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
381 return ret < 0 ? ret : -EIO;
383 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
387 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
388 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
389 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
390 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
391 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1;
393 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
394 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
399 static const struct rtc_class_ops m41t80_rtc_ops = {
400 .read_time = m41t80_rtc_read_time,
401 .set_time = m41t80_rtc_set_time,
402 .proc = m41t80_rtc_proc,
403 .read_alarm = m41t80_read_alarm,
404 .set_alarm = m41t80_set_alarm,
405 .alarm_irq_enable = m41t80_alarm_irq_enable,
408 #ifdef CONFIG_PM_SLEEP
409 static int m41t80_suspend(struct device *dev)
411 struct i2c_client *client = to_i2c_client(dev);
413 if (client->irq >= 0 && device_may_wakeup(dev))
414 enable_irq_wake(client->irq);
419 static int m41t80_resume(struct device *dev)
421 struct i2c_client *client = to_i2c_client(dev);
423 if (client->irq >= 0 && device_may_wakeup(dev))
424 disable_irq_wake(client->irq);
430 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
432 #ifdef CONFIG_COMMON_CLK
433 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
435 static unsigned long m41t80_decode_freq(int setting)
437 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ :
438 M41T80_SQW_MAX_FREQ >> setting;
441 static unsigned long m41t80_get_freq(struct m41t80_data *m41t80)
443 struct i2c_client *client = m41t80->client;
444 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
445 M41T80_REG_WDAY : M41T80_REG_SQW;
446 int ret = i2c_smbus_read_byte_data(client, reg_sqw);
450 return m41t80_decode_freq(ret >> 4);
453 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
454 unsigned long parent_rate)
456 return sqw_to_m41t80_data(hw)->freq;
459 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
460 unsigned long *prate)
462 if (rate >= M41T80_SQW_MAX_FREQ)
463 return M41T80_SQW_MAX_FREQ;
464 if (rate >= M41T80_SQW_MAX_FREQ / 4)
465 return M41T80_SQW_MAX_FREQ / 4;
468 return 1 << ilog2(rate);
471 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
472 unsigned long parent_rate)
474 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
475 struct i2c_client *client = m41t80->client;
476 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
477 M41T80_REG_WDAY : M41T80_REG_SQW;
478 int reg, ret, val = 0;
480 if (rate >= M41T80_SQW_MAX_FREQ)
482 else if (rate >= M41T80_SQW_MAX_FREQ / 4)
485 val = 15 - ilog2(rate);
487 reg = i2c_smbus_read_byte_data(client, reg_sqw);
491 reg = (reg & 0x0f) | (val << 4);
493 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
495 m41t80->freq = m41t80_decode_freq(val);
499 static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
501 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
502 struct i2c_client *client = m41t80->client;
503 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
509 ret |= M41T80_ALMON_SQWE;
511 ret &= ~M41T80_ALMON_SQWE;
513 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
515 m41t80->sqwe = enable;
519 static int m41t80_sqw_prepare(struct clk_hw *hw)
521 return m41t80_sqw_control(hw, 1);
524 static void m41t80_sqw_unprepare(struct clk_hw *hw)
526 m41t80_sqw_control(hw, 0);
529 static int m41t80_sqw_is_prepared(struct clk_hw *hw)
531 return sqw_to_m41t80_data(hw)->sqwe;
534 static const struct clk_ops m41t80_sqw_ops = {
535 .prepare = m41t80_sqw_prepare,
536 .unprepare = m41t80_sqw_unprepare,
537 .is_prepared = m41t80_sqw_is_prepared,
538 .recalc_rate = m41t80_sqw_recalc_rate,
539 .round_rate = m41t80_sqw_round_rate,
540 .set_rate = m41t80_sqw_set_rate,
543 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
545 struct i2c_client *client = m41t80->client;
546 struct device_node *node = client->dev.of_node;
547 struct device_node *fixed_clock;
549 struct clk_init_data init;
552 fixed_clock = of_get_child_by_name(node, "clock");
555 * skip registering square wave clock when a fixed
556 * clock has been registered. The fixed clock is
557 * registered automatically when being referenced.
559 of_node_put(fixed_clock);
563 /* First disable the clock */
564 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
567 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
568 ret & ~(M41T80_ALMON_SQWE));
572 init.name = "m41t80-sqw";
573 init.ops = &m41t80_sqw_ops;
575 init.parent_names = NULL;
576 init.num_parents = 0;
577 m41t80->sqw.init = &init;
578 m41t80->freq = m41t80_get_freq(m41t80);
580 /* optional override of the clockname */
581 of_property_read_string(node, "clock-output-names", &init.name);
583 /* register the clock */
584 clk = clk_register(&client->dev, &m41t80->sqw);
586 of_clk_add_provider(node, of_clk_src_simple_get, clk);
592 #ifdef CONFIG_RTC_DRV_M41T80_WDT
594 *****************************************************************************
598 *****************************************************************************
600 static DEFINE_MUTEX(m41t80_rtc_mutex);
601 static struct i2c_client *save_client;
604 #define WD_TIMO 60 /* 1..31 seconds */
606 static int wdt_margin = WD_TIMO;
607 module_param(wdt_margin, int, 0);
608 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
610 static unsigned long wdt_is_open;
611 static int boot_flag;
614 * wdt_ping - Reload counter one with the watchdog timeout.
615 * We don't bother reloading the cascade counter.
617 static void wdt_ping(void)
619 unsigned char i2c_data[2];
620 struct i2c_msg msgs1[1] = {
622 .addr = save_client->addr,
628 struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
630 i2c_data[0] = 0x09; /* watchdog register */
633 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
636 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
638 i2c_data[1] = wdt_margin << 2 | 0x82;
641 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
642 * that would be an invalid resolution.
644 if (clientdata->features & M41T80_FEATURE_WD)
645 i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
647 i2c_transfer(save_client->adapter, msgs1, 1);
651 * wdt_disable - disables watchdog.
653 static void wdt_disable(void)
655 unsigned char i2c_data[2], i2c_buf[0x10];
656 struct i2c_msg msgs0[2] = {
658 .addr = save_client->addr,
664 .addr = save_client->addr,
670 struct i2c_msg msgs1[1] = {
672 .addr = save_client->addr,
680 i2c_transfer(save_client->adapter, msgs0, 2);
684 i2c_transfer(save_client->adapter, msgs1, 1);
688 * wdt_write - write to watchdog.
689 * @file: file handle to the watchdog
690 * @buf: buffer to write (unused as data does not matter here
691 * @count: count of bytes
692 * @ppos: pointer to the position to write. No seeks allowed
694 * A write to a watchdog device is defined as a keepalive signal. Any
695 * write of data will do, as we don't define content meaning.
697 static ssize_t wdt_write(struct file *file, const char __user *buf,
698 size_t count, loff_t *ppos)
707 static ssize_t wdt_read(struct file *file, char __user *buf,
708 size_t count, loff_t *ppos)
714 * wdt_ioctl - ioctl handler to set watchdog.
715 * @file: file handle to the device
716 * @cmd: watchdog command
717 * @arg: argument pointer
719 * The watchdog API defines a common set of functions for all watchdogs
720 * according to their available features. We only actually usefully support
721 * querying capabilities and current status.
723 static int wdt_ioctl(struct file *file, unsigned int cmd,
727 static struct watchdog_info ident = {
728 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
730 .firmware_version = 1,
731 .identity = "M41T80 WTD"
735 case WDIOC_GETSUPPORT:
736 return copy_to_user((struct watchdog_info __user *)arg, &ident,
737 sizeof(ident)) ? -EFAULT : 0;
739 case WDIOC_GETSTATUS:
740 case WDIOC_GETBOOTSTATUS:
741 return put_user(boot_flag, (int __user *)arg);
742 case WDIOC_KEEPALIVE:
745 case WDIOC_SETTIMEOUT:
746 if (get_user(new_margin, (int __user *)arg))
748 /* Arbitrary, can't find the card's limits */
749 if (new_margin < 1 || new_margin > 124)
751 wdt_margin = new_margin;
754 case WDIOC_GETTIMEOUT:
755 return put_user(wdt_margin, (int __user *)arg);
757 case WDIOC_SETOPTIONS:
758 if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
761 if (rv & WDIOS_DISABLECARD) {
762 pr_info("disable watchdog\n");
766 if (rv & WDIOS_ENABLECARD) {
767 pr_info("enable watchdog\n");
776 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
781 mutex_lock(&m41t80_rtc_mutex);
782 ret = wdt_ioctl(file, cmd, arg);
783 mutex_unlock(&m41t80_rtc_mutex);
789 * wdt_open - open a watchdog.
790 * @inode: inode of device
791 * @file: file handle to device
794 static int wdt_open(struct inode *inode, struct file *file)
796 if (iminor(inode) == WATCHDOG_MINOR) {
797 mutex_lock(&m41t80_rtc_mutex);
798 if (test_and_set_bit(0, &wdt_is_open)) {
799 mutex_unlock(&m41t80_rtc_mutex);
806 mutex_unlock(&m41t80_rtc_mutex);
807 return stream_open(inode, file);
813 * wdt_release - release a watchdog.
814 * @inode: inode to board
815 * @file: file handle to board
818 static int wdt_release(struct inode *inode, struct file *file)
820 if (iminor(inode) == WATCHDOG_MINOR)
821 clear_bit(0, &wdt_is_open);
826 * wdt_notify_sys - notify to watchdog.
827 * @this: our notifier block
828 * @code: the event being reported
831 * Our notifier is called on system shutdowns. We want to turn the card
832 * off at reboot otherwise the machine will reboot again during memory
833 * test or worse yet during the following fsck. This would suck, in fact
834 * trust me - if it happens it does suck.
836 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
839 if (code == SYS_DOWN || code == SYS_HALT)
840 /* Disable Watchdog */
845 static const struct file_operations wdt_fops = {
846 .owner = THIS_MODULE,
848 .unlocked_ioctl = wdt_unlocked_ioctl,
849 .compat_ioctl = compat_ptr_ioctl,
852 .release = wdt_release,
856 static struct miscdevice wdt_dev = {
857 .minor = WATCHDOG_MINOR,
863 * The WDT card needs to learn about soft shutdowns in order to
864 * turn the timebomb registers off.
866 static struct notifier_block wdt_notifier = {
867 .notifier_call = wdt_notify_sys,
869 #endif /* CONFIG_RTC_DRV_M41T80_WDT */
872 *****************************************************************************
876 *****************************************************************************
879 static int m41t80_probe(struct i2c_client *client)
881 struct i2c_adapter *adapter = client->adapter;
884 struct m41t80_data *m41t80_data = NULL;
885 bool wakeup_source = false;
887 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
888 I2C_FUNC_SMBUS_BYTE_DATA)) {
889 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
893 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
898 m41t80_data->client = client;
899 if (client->dev.of_node) {
900 m41t80_data->features = (unsigned long)
901 of_device_get_match_data(&client->dev);
903 const struct i2c_device_id *id = i2c_match_id(m41t80_id, client);
904 m41t80_data->features = id->driver_data;
906 i2c_set_clientdata(client, m41t80_data);
908 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev);
909 if (IS_ERR(m41t80_data->rtc))
910 return PTR_ERR(m41t80_data->rtc);
913 wakeup_source = of_property_read_bool(client->dev.of_node,
916 if (client->irq > 0) {
917 unsigned long irqflags = IRQF_TRIGGER_LOW;
919 if (dev_fwnode(&client->dev))
922 rc = devm_request_threaded_irq(&client->dev, client->irq,
923 NULL, m41t80_handle_irq,
924 irqflags | IRQF_ONESHOT,
927 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
929 wakeup_source = false;
932 if (client->irq > 0 || wakeup_source)
933 device_init_wakeup(&client->dev, true);
935 clear_bit(RTC_FEATURE_ALARM, m41t80_data->rtc->features);
937 m41t80_data->rtc->ops = &m41t80_rtc_ops;
938 m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
939 m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099;
941 if (client->irq <= 0)
942 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, m41t80_data->rtc->features);
944 /* Make sure HT (Halt Update) bit is cleared */
945 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
947 if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
948 if (m41t80_data->features & M41T80_FEATURE_HT) {
949 m41t80_rtc_read_time(&client->dev, &tm);
950 dev_info(&client->dev, "HT bit was set!\n");
951 dev_info(&client->dev, "Power Down at %ptR\n", &tm);
953 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
954 rc & ~M41T80_ALHOUR_HT);
958 dev_err(&client->dev, "Can't clear HT bit\n");
962 /* Make sure ST (stop) bit is cleared */
963 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
965 if (rc >= 0 && rc & M41T80_SEC_ST)
966 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
967 rc & ~M41T80_SEC_ST);
969 dev_err(&client->dev, "Can't clear ST bit\n");
973 #ifdef CONFIG_RTC_DRV_M41T80_WDT
974 if (m41t80_data->features & M41T80_FEATURE_HT) {
975 save_client = client;
976 rc = misc_register(&wdt_dev);
979 rc = register_reboot_notifier(&wdt_notifier);
981 misc_deregister(&wdt_dev);
986 #ifdef CONFIG_COMMON_CLK
987 if (m41t80_data->features & M41T80_FEATURE_SQ)
988 m41t80_sqw_register_clk(m41t80_data);
991 rc = devm_rtc_register_device(m41t80_data->rtc);
998 static void m41t80_remove(struct i2c_client *client)
1000 #ifdef CONFIG_RTC_DRV_M41T80_WDT
1001 struct m41t80_data *clientdata = i2c_get_clientdata(client);
1003 if (clientdata->features & M41T80_FEATURE_HT) {
1004 misc_deregister(&wdt_dev);
1005 unregister_reboot_notifier(&wdt_notifier);
1010 static struct i2c_driver m41t80_driver = {
1012 .name = "rtc-m41t80",
1013 .of_match_table = of_match_ptr(m41t80_of_match),
1016 .probe = m41t80_probe,
1017 .remove = m41t80_remove,
1018 .id_table = m41t80_id,
1021 module_i2c_driver(m41t80_driver);
1023 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>");
1024 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
1025 MODULE_LICENSE("GPL");