2 * rtc-fm3130.c - RTC driver for Ramtron FM3130 I2C chip.
4 * Copyright (C) 2008 Sergey Lapin
5 * Based on ds1307 driver by James Chapman and David Brownell
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/i2c.h>
14 #include <linux/rtc.h>
15 #include <linux/bcd.h>
16 #include <linux/slab.h>
18 #define FM3130_RTC_CONTROL (0x0)
19 #define FM3130_CAL_CONTROL (0x1)
20 #define FM3130_RTC_SECONDS (0x2)
21 #define FM3130_RTC_MINUTES (0x3)
22 #define FM3130_RTC_HOURS (0x4)
23 #define FM3130_RTC_DAY (0x5)
24 #define FM3130_RTC_DATE (0x6)
25 #define FM3130_RTC_MONTHS (0x7)
26 #define FM3130_RTC_YEARS (0x8)
28 #define FM3130_ALARM_SECONDS (0x9)
29 #define FM3130_ALARM_MINUTES (0xa)
30 #define FM3130_ALARM_HOURS (0xb)
31 #define FM3130_ALARM_DATE (0xc)
32 #define FM3130_ALARM_MONTHS (0xd)
33 #define FM3130_ALARM_WP_CONTROL (0xe)
35 #define FM3130_CAL_CONTROL_BIT_nOSCEN (1 << 7) /* Osciallator enabled */
36 #define FM3130_RTC_CONTROL_BIT_LB (1 << 7) /* Low battery */
37 #define FM3130_RTC_CONTROL_BIT_AF (1 << 6) /* Alarm flag */
38 #define FM3130_RTC_CONTROL_BIT_CF (1 << 5) /* Century overflow */
39 #define FM3130_RTC_CONTROL_BIT_POR (1 << 4) /* Power on reset */
40 #define FM3130_RTC_CONTROL_BIT_AEN (1 << 3) /* Alarm enable */
41 #define FM3130_RTC_CONTROL_BIT_CAL (1 << 2) /* Calibration mode */
42 #define FM3130_RTC_CONTROL_BIT_WRITE (1 << 1) /* W=1 -> write mode W=0 normal */
43 #define FM3130_RTC_CONTROL_BIT_READ (1 << 0) /* R=1 -> read mode R=0 normal */
45 #define FM3130_CLOCK_REGS 7
46 #define FM3130_ALARM_REGS 5
52 struct i2c_msg msg[4];
53 struct i2c_client *client;
54 struct rtc_device *rtc;
58 static const struct i2c_device_id fm3130_id[] = {
62 MODULE_DEVICE_TABLE(i2c, fm3130_id);
64 #define FM3130_MODE_NORMAL 0
65 #define FM3130_MODE_WRITE 1
66 #define FM3130_MODE_READ 2
68 static void fm3130_rtc_mode(struct device *dev, int mode)
70 struct fm3130 *fm3130 = dev_get_drvdata(dev);
72 fm3130->regs[FM3130_RTC_CONTROL] =
73 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
75 case FM3130_MODE_NORMAL:
76 fm3130->regs[FM3130_RTC_CONTROL] &=
77 ~(FM3130_RTC_CONTROL_BIT_WRITE |
78 FM3130_RTC_CONTROL_BIT_READ);
80 case FM3130_MODE_WRITE:
81 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE;
83 case FM3130_MODE_READ:
84 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ;
87 dev_dbg(dev, "invalid mode %d\n", mode);
91 i2c_smbus_write_byte_data(fm3130->client,
92 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]);
95 static int fm3130_get_time(struct device *dev, struct rtc_time *t)
97 struct fm3130 *fm3130 = dev_get_drvdata(dev);
100 if (!fm3130->data_valid) {
101 /* We have invalid data in RTC, probably due
102 to battery faults or other problems. Return EIO
103 for now, it will allow us to set data later instead
104 of error during probing which disables device */
107 fm3130_rtc_mode(dev, FM3130_MODE_READ);
109 /* read the RTC date and time registers all at once */
110 tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
113 dev_err(dev, "%s error %d\n", "read", tmp);
117 fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
119 dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs);
121 t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
122 t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
123 tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f;
124 t->tm_hour = bcd2bin(tmp);
125 t->tm_wday = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x07) - 1;
126 t->tm_mday = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
127 tmp = fm3130->regs[FM3130_RTC_MONTHS] & 0x1f;
128 t->tm_mon = bcd2bin(tmp) - 1;
130 /* assume 20YY not 19YY, and ignore CF bit */
131 t->tm_year = bcd2bin(fm3130->regs[FM3130_RTC_YEARS]) + 100;
133 dev_dbg(dev, "%s secs=%d, mins=%d, "
134 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
135 "read", t->tm_sec, t->tm_min,
136 t->tm_hour, t->tm_mday,
137 t->tm_mon, t->tm_year, t->tm_wday);
139 /* initial clock setting can be undefined */
140 return rtc_valid_tm(t);
144 static int fm3130_set_time(struct device *dev, struct rtc_time *t)
146 struct fm3130 *fm3130 = dev_get_drvdata(dev);
148 u8 *buf = fm3130->regs;
150 dev_dbg(dev, "%s secs=%d, mins=%d, "
151 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
152 "write", t->tm_sec, t->tm_min,
153 t->tm_hour, t->tm_mday,
154 t->tm_mon, t->tm_year, t->tm_wday);
156 /* first register addr */
157 buf[FM3130_RTC_SECONDS] = bin2bcd(t->tm_sec);
158 buf[FM3130_RTC_MINUTES] = bin2bcd(t->tm_min);
159 buf[FM3130_RTC_HOURS] = bin2bcd(t->tm_hour);
160 buf[FM3130_RTC_DAY] = bin2bcd(t->tm_wday + 1);
161 buf[FM3130_RTC_DATE] = bin2bcd(t->tm_mday);
162 buf[FM3130_RTC_MONTHS] = bin2bcd(t->tm_mon + 1);
164 /* assume 20YY not 19YY */
165 tmp = t->tm_year - 100;
166 buf[FM3130_RTC_YEARS] = bin2bcd(tmp);
168 dev_dbg(dev, "%s: %15ph\n", "write", buf);
170 fm3130_rtc_mode(dev, FM3130_MODE_WRITE);
172 /* Writing time registers, we don't support multibyte transfers */
173 for (i = 0; i < FM3130_CLOCK_REGS; i++) {
174 i2c_smbus_write_byte_data(fm3130->client,
175 FM3130_RTC_SECONDS + i,
176 fm3130->regs[FM3130_RTC_SECONDS + i]);
179 fm3130_rtc_mode(dev, FM3130_MODE_NORMAL);
181 /* We assume here that data are valid once written */
182 if (!fm3130->data_valid)
183 fm3130->data_valid = 1;
187 static int fm3130_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
189 struct fm3130 *fm3130 = dev_get_drvdata(dev);
191 struct rtc_time *tm = &alrm->time;
193 if (!fm3130->alarm_valid) {
195 * We have invalid alarm in RTC, probably due to battery faults
196 * or other problems. Return EIO for now, it will allow us to
197 * set alarm value later instead of error during probing which
203 /* read the RTC alarm registers all at once */
204 tmp = i2c_transfer(to_i2c_adapter(fm3130->client->dev.parent),
207 dev_err(dev, "%s error %d\n", "read", tmp);
210 dev_dbg(dev, "alarm read %02x %02x %02x %02x %02x\n",
211 fm3130->regs[FM3130_ALARM_SECONDS],
212 fm3130->regs[FM3130_ALARM_MINUTES],
213 fm3130->regs[FM3130_ALARM_HOURS],
214 fm3130->regs[FM3130_ALARM_DATE],
215 fm3130->regs[FM3130_ALARM_MONTHS]);
217 tm->tm_sec = bcd2bin(fm3130->regs[FM3130_ALARM_SECONDS] & 0x7F);
218 tm->tm_min = bcd2bin(fm3130->regs[FM3130_ALARM_MINUTES] & 0x7F);
219 tm->tm_hour = bcd2bin(fm3130->regs[FM3130_ALARM_HOURS] & 0x3F);
220 tm->tm_mday = bcd2bin(fm3130->regs[FM3130_ALARM_DATE] & 0x3F);
221 tm->tm_mon = bcd2bin(fm3130->regs[FM3130_ALARM_MONTHS] & 0x1F);
224 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
226 dev_dbg(dev, "%s secs=%d, mins=%d, "
227 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
228 "read alarm", tm->tm_sec, tm->tm_min,
229 tm->tm_hour, tm->tm_mday,
230 tm->tm_mon, tm->tm_year, tm->tm_wday);
232 /* check if alarm enabled */
233 fm3130->regs[FM3130_RTC_CONTROL] =
234 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
236 if ((fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_AEN) &&
237 (~fm3130->regs[FM3130_RTC_CONTROL] &
238 FM3130_RTC_CONTROL_BIT_CAL)) {
245 static int fm3130_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
247 struct fm3130 *fm3130 = dev_get_drvdata(dev);
248 struct rtc_time *tm = &alrm->time;
251 dev_dbg(dev, "%s secs=%d, mins=%d, "
252 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
253 "write alarm", tm->tm_sec, tm->tm_min,
254 tm->tm_hour, tm->tm_mday,
255 tm->tm_mon, tm->tm_year, tm->tm_wday);
257 fm3130->regs[FM3130_ALARM_SECONDS] =
258 (tm->tm_sec != -1) ? bin2bcd(tm->tm_sec) : 0x80;
260 fm3130->regs[FM3130_ALARM_MINUTES] =
261 (tm->tm_min != -1) ? bin2bcd(tm->tm_min) : 0x80;
263 fm3130->regs[FM3130_ALARM_HOURS] =
264 (tm->tm_hour != -1) ? bin2bcd(tm->tm_hour) : 0x80;
266 fm3130->regs[FM3130_ALARM_DATE] =
267 (tm->tm_mday != -1) ? bin2bcd(tm->tm_mday) : 0x80;
269 fm3130->regs[FM3130_ALARM_MONTHS] =
270 (tm->tm_mon != -1) ? bin2bcd(tm->tm_mon + 1) : 0x80;
272 dev_dbg(dev, "alarm write %02x %02x %02x %02x %02x\n",
273 fm3130->regs[FM3130_ALARM_SECONDS],
274 fm3130->regs[FM3130_ALARM_MINUTES],
275 fm3130->regs[FM3130_ALARM_HOURS],
276 fm3130->regs[FM3130_ALARM_DATE],
277 fm3130->regs[FM3130_ALARM_MONTHS]);
278 /* Writing time registers, we don't support multibyte transfers */
279 for (i = 0; i < FM3130_ALARM_REGS; i++) {
280 i2c_smbus_write_byte_data(fm3130->client,
281 FM3130_ALARM_SECONDS + i,
282 fm3130->regs[FM3130_ALARM_SECONDS + i]);
284 fm3130->regs[FM3130_RTC_CONTROL] =
285 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
287 /* enable or disable alarm */
289 i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
290 (fm3130->regs[FM3130_RTC_CONTROL] &
291 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
292 FM3130_RTC_CONTROL_BIT_AEN);
294 i2c_smbus_write_byte_data(fm3130->client, FM3130_RTC_CONTROL,
295 fm3130->regs[FM3130_RTC_CONTROL] &
296 ~(FM3130_RTC_CONTROL_BIT_CAL) &
297 ~(FM3130_RTC_CONTROL_BIT_AEN));
300 /* We assume here that data is valid once written */
301 if (!fm3130->alarm_valid)
302 fm3130->alarm_valid = 1;
307 static int fm3130_alarm_irq_enable(struct device *dev, unsigned int enabled)
309 struct fm3130 *fm3130 = dev_get_drvdata(dev);
312 fm3130->regs[FM3130_RTC_CONTROL] =
313 i2c_smbus_read_byte_data(fm3130->client, FM3130_RTC_CONTROL);
315 dev_dbg(dev, "alarm_irq_enable: enable=%d, FM3130_RTC_CONTROL=%02x\n",
316 enabled, fm3130->regs[FM3130_RTC_CONTROL]);
319 case 0: /* alarm off */
320 ret = i2c_smbus_write_byte_data(fm3130->client,
321 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL] &
322 ~(FM3130_RTC_CONTROL_BIT_CAL) &
323 ~(FM3130_RTC_CONTROL_BIT_AEN));
325 case 1: /* alarm on */
326 ret = i2c_smbus_write_byte_data(fm3130->client,
327 FM3130_RTC_CONTROL, (fm3130->regs[FM3130_RTC_CONTROL] &
328 ~(FM3130_RTC_CONTROL_BIT_CAL)) |
329 FM3130_RTC_CONTROL_BIT_AEN);
339 static const struct rtc_class_ops fm3130_rtc_ops = {
340 .read_time = fm3130_get_time,
341 .set_time = fm3130_set_time,
342 .read_alarm = fm3130_read_alarm,
343 .set_alarm = fm3130_set_alarm,
344 .alarm_irq_enable = fm3130_alarm_irq_enable,
347 static struct i2c_driver fm3130_driver;
349 static int fm3130_probe(struct i2c_client *client,
350 const struct i2c_device_id *id)
352 struct fm3130 *fm3130;
355 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
357 if (!i2c_check_functionality(adapter,
358 I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
361 fm3130 = devm_kzalloc(&client->dev, sizeof(struct fm3130), GFP_KERNEL);
366 fm3130->client = client;
367 i2c_set_clientdata(client, fm3130);
368 fm3130->reg_addr_time = FM3130_RTC_SECONDS;
369 fm3130->reg_addr_alarm = FM3130_ALARM_SECONDS;
371 /* Messages to read time */
372 fm3130->msg[0].addr = client->addr;
373 fm3130->msg[0].flags = 0;
374 fm3130->msg[0].len = 1;
375 fm3130->msg[0].buf = &fm3130->reg_addr_time;
377 fm3130->msg[1].addr = client->addr;
378 fm3130->msg[1].flags = I2C_M_RD;
379 fm3130->msg[1].len = FM3130_CLOCK_REGS;
380 fm3130->msg[1].buf = &fm3130->regs[FM3130_RTC_SECONDS];
382 /* Messages to read alarm */
383 fm3130->msg[2].addr = client->addr;
384 fm3130->msg[2].flags = 0;
385 fm3130->msg[2].len = 1;
386 fm3130->msg[2].buf = &fm3130->reg_addr_alarm;
388 fm3130->msg[3].addr = client->addr;
389 fm3130->msg[3].flags = I2C_M_RD;
390 fm3130->msg[3].len = FM3130_ALARM_REGS;
391 fm3130->msg[3].buf = &fm3130->regs[FM3130_ALARM_SECONDS];
393 fm3130->alarm_valid = 0;
394 fm3130->data_valid = 0;
396 tmp = i2c_transfer(adapter, fm3130->msg, 4);
398 dev_dbg(&client->dev, "read error %d\n", tmp);
403 fm3130->regs[FM3130_RTC_CONTROL] =
404 i2c_smbus_read_byte_data(client, FM3130_RTC_CONTROL);
405 fm3130->regs[FM3130_CAL_CONTROL] =
406 i2c_smbus_read_byte_data(client, FM3130_CAL_CONTROL);
408 /* Disabling calibration mode */
409 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
410 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
411 fm3130->regs[FM3130_RTC_CONTROL] &
412 ~(FM3130_RTC_CONTROL_BIT_CAL));
413 dev_warn(&client->dev, "Disabling calibration mode!\n");
416 /* Disabling read and write modes */
417 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
418 fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
419 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
420 fm3130->regs[FM3130_RTC_CONTROL] &
421 ~(FM3130_RTC_CONTROL_BIT_READ |
422 FM3130_RTC_CONTROL_BIT_WRITE));
423 dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
426 /* oscillator off? turn it on, so clock can tick. */
427 if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
428 i2c_smbus_write_byte_data(client, FM3130_CAL_CONTROL,
429 fm3130->regs[FM3130_CAL_CONTROL] &
430 ~(FM3130_CAL_CONTROL_BIT_nOSCEN));
432 /* low battery? clear flag, and warn */
433 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_LB) {
434 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
435 fm3130->regs[FM3130_RTC_CONTROL] &
436 ~(FM3130_RTC_CONTROL_BIT_LB));
437 dev_warn(&client->dev, "Low battery!\n");
440 /* check if Power On Reset bit is set */
441 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_POR) {
442 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
443 fm3130->regs[FM3130_RTC_CONTROL] &
444 ~FM3130_RTC_CONTROL_BIT_POR);
445 dev_dbg(&client->dev, "POR bit is set\n");
447 /* ACS is controlled by alarm */
448 i2c_smbus_write_byte_data(client, FM3130_ALARM_WP_CONTROL, 0x80);
450 /* alarm registers sanity check */
451 tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
455 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
459 tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
463 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
464 if (tmp == 0 || tmp > 31)
467 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
468 if (tmp == 0 || tmp > 12)
471 fm3130->alarm_valid = 1;
475 /* clock registers sanity chek */
476 tmp = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f);
480 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f);
484 tmp = bcd2bin(fm3130->regs[FM3130_RTC_HOURS] & 0x3f);
488 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DAY] & 0x7);
489 if (tmp == 0 || tmp > 7)
492 tmp = bcd2bin(fm3130->regs[FM3130_RTC_DATE] & 0x3f);
493 if (tmp == 0 || tmp > 31)
496 tmp = bcd2bin(fm3130->regs[FM3130_RTC_MONTHS] & 0x1f);
497 if (tmp == 0 || tmp > 12)
500 fm3130->data_valid = 1;
504 if (!fm3130->data_valid || !fm3130->alarm_valid)
505 dev_dbg(&client->dev, "%s: %15ph\n", "bogus registers",
508 /* We won't bail out here because we just got invalid data.
509 Time setting from u-boot doesn't work anyway */
510 fm3130->rtc = devm_rtc_device_register(&client->dev, client->name,
511 &fm3130_rtc_ops, THIS_MODULE);
512 if (IS_ERR(fm3130->rtc)) {
513 err = PTR_ERR(fm3130->rtc);
514 dev_err(&client->dev,
515 "unable to register the class device\n");
523 static struct i2c_driver fm3130_driver = {
525 .name = "rtc-fm3130",
526 .owner = THIS_MODULE,
528 .probe = fm3130_probe,
529 .id_table = fm3130_id,
532 module_i2c_driver(fm3130_driver);
534 MODULE_DESCRIPTION("RTC driver for FM3130");
535 MODULE_AUTHOR("Sergey Lapin <slapin@ossfans.org>");
536 MODULE_LICENSE("GPL");