1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6 * Copyright (C) 2006 David Brownell (convert to new framework)
10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11 * That defined the register interface now provided by all PCs, some
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
13 * integrate an MC146818 clone in their southbridge, and boards use
14 * that instead of discrete clones like the DS12887 or M48T86. There
15 * are also clones that connect using the LPC bus.
17 * That register API is also used directly by various other drivers
18 * (notably for integrated NVRAM), infrastructure (x86 has code to
19 * bypass the RTC framework, directly reading the RTC during boot
20 * and updating minutes/seconds for systems using NTP synch) and
21 * utilities (like userspace 'hwclock', if no /dev node exists).
23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24 * interrupts disabled, holding the global rtc_lock, to exclude those
25 * other drivers and utilities on correctly configured systems.
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/interrupt.h>
34 #include <linux/spinlock.h>
35 #include <linux/platform_device.h>
36 #include <linux/log2.h>
39 #include <linux/of_platform.h>
41 #include <asm/i8259.h>
42 #include <asm/processor.h>
43 #include <linux/dmi.h>
46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47 #include <linux/mc146818rtc.h>
51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
53 * If cleared, ACPI SCI is only used to wake up the system from suspend
55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
58 static bool use_acpi_alarm;
59 module_param(use_acpi_alarm, bool, 0444);
61 static inline int cmos_use_acpi_alarm(void)
63 return use_acpi_alarm;
65 #else /* !CONFIG_ACPI */
67 static inline int cmos_use_acpi_alarm(void)
74 struct rtc_device *rtc;
77 struct resource *iomem;
78 time64_t alarm_expires;
80 void (*wake_on)(struct device *);
81 void (*wake_off)(struct device *);
86 /* newer hardware extends the original register set */
91 struct rtc_wkalrm saved_wkalrm;
94 /* both platform and pnp busses use negative numbers for invalid irqs */
95 #define is_valid_irq(n) ((n) > 0)
97 static const char driver_name[] = "rtc_cmos";
99 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
103 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
105 static inline int is_intr(u8 rtc_intr)
107 if (!(rtc_intr & RTC_IRQF))
109 return rtc_intr & RTC_IRQMASK;
112 /*----------------------------------------------------------------*/
114 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116 * used in a broken "legacy replacement" mode. The breakage includes
117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118 * other (better) use.
120 * When that broken mode is in use, platform glue provides a partial
121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
122 * want to use HPET for anything except those IRQs though...
124 #ifdef CONFIG_HPET_EMULATE_RTC
125 #include <asm/hpet.h>
128 static inline int is_hpet_enabled(void)
133 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
138 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
144 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
149 static inline int hpet_set_periodic_freq(unsigned long freq)
154 static inline int hpet_rtc_dropped_irq(void)
159 static inline int hpet_rtc_timer_init(void)
164 extern irq_handler_t hpet_rtc_interrupt;
166 static inline int hpet_register_irq_handler(irq_handler_t handler)
171 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
178 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179 static inline int use_hpet_alarm(void)
181 return is_hpet_enabled() && !cmos_use_acpi_alarm();
184 /*----------------------------------------------------------------*/
188 /* Most newer x86 systems have two register banks, the first used
189 * for RTC and NVRAM and the second only for NVRAM. Caller must
190 * own rtc_lock ... and we won't worry about access during NMI.
192 #define can_bank2 true
194 static inline unsigned char cmos_read_bank2(unsigned char addr)
196 outb(addr, RTC_PORT(2));
197 return inb(RTC_PORT(3));
200 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
202 outb(addr, RTC_PORT(2));
203 outb(val, RTC_PORT(3));
208 #define can_bank2 false
210 static inline unsigned char cmos_read_bank2(unsigned char addr)
215 static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
221 /*----------------------------------------------------------------*/
223 static int cmos_read_time(struct device *dev, struct rtc_time *t)
228 * If pm_trace abused the RTC for storage, set the timespec to 0,
229 * which tells the caller that this RTC value is unusable.
231 if (!pm_trace_rtc_valid())
234 ret = mc146818_get_time(t);
236 dev_err_ratelimited(dev, "unable to read current time\n");
243 static int cmos_set_time(struct device *dev, struct rtc_time *t)
245 /* NOTE: this ignores the issue whereby updating the seconds
246 * takes effect exactly 500ms after we write the register.
247 * (Also queueing and other delays before we get this far.)
249 return mc146818_set_time(t);
252 struct cmos_read_alarm_callback_param {
253 struct cmos_rtc *cmos;
254 struct rtc_time *time;
255 unsigned char rtc_control;
258 static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
261 struct cmos_read_alarm_callback_param *p =
262 (struct cmos_read_alarm_callback_param *)param_in;
263 struct rtc_time *time = p->time;
265 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
266 time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
267 time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
269 if (p->cmos->day_alrm) {
270 /* ignore upper bits on readback per ACPI spec */
271 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
275 if (p->cmos->mon_alrm) {
276 time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
282 p->rtc_control = CMOS_READ(RTC_CONTROL);
285 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
287 struct cmos_rtc *cmos = dev_get_drvdata(dev);
288 struct cmos_read_alarm_callback_param p = {
293 /* This not only a rtc_op, but also called directly */
294 if (!is_valid_irq(cmos->irq))
297 /* Basic alarms only support hour, minute, and seconds fields.
298 * Some also support day and month, for alarms up to a year in
302 /* Some Intel chipsets disconnect the alarm registers when the clock
303 * update is in progress - during this time reads return bogus values
304 * and writes may fail silently. See for example "7th Generation Intel®
305 * Processor Family I/O for U/Y Platforms [...] Datasheet", section
308 * Use the mc146818_avoid_UIP() function to avoid this.
310 if (!mc146818_avoid_UIP(cmos_read_alarm_callback, &p))
313 if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
314 if (((unsigned)t->time.tm_sec) < 0x60)
315 t->time.tm_sec = bcd2bin(t->time.tm_sec);
318 if (((unsigned)t->time.tm_min) < 0x60)
319 t->time.tm_min = bcd2bin(t->time.tm_min);
322 if (((unsigned)t->time.tm_hour) < 0x24)
323 t->time.tm_hour = bcd2bin(t->time.tm_hour);
325 t->time.tm_hour = -1;
327 if (cmos->day_alrm) {
328 if (((unsigned)t->time.tm_mday) <= 0x31)
329 t->time.tm_mday = bcd2bin(t->time.tm_mday);
331 t->time.tm_mday = -1;
333 if (cmos->mon_alrm) {
334 if (((unsigned)t->time.tm_mon) <= 0x12)
335 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
342 t->enabled = !!(p.rtc_control & RTC_AIE);
348 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
350 unsigned char rtc_intr;
352 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
353 * allegedly some older rtcs need that to handle irqs properly
355 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
357 if (use_hpet_alarm())
360 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
361 if (is_intr(rtc_intr))
362 rtc_update_irq(cmos->rtc, 1, rtc_intr);
365 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
367 unsigned char rtc_control;
369 /* flush any pending IRQ status, notably for update irqs,
370 * before we enable new IRQs
372 rtc_control = CMOS_READ(RTC_CONTROL);
373 cmos_checkintr(cmos, rtc_control);
376 CMOS_WRITE(rtc_control, RTC_CONTROL);
377 if (use_hpet_alarm())
378 hpet_set_rtc_irq_bit(mask);
380 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
382 cmos->wake_on(cmos->dev);
385 cmos_checkintr(cmos, rtc_control);
388 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
390 unsigned char rtc_control;
392 rtc_control = CMOS_READ(RTC_CONTROL);
393 rtc_control &= ~mask;
394 CMOS_WRITE(rtc_control, RTC_CONTROL);
395 if (use_hpet_alarm())
396 hpet_mask_rtc_irq_bit(mask);
398 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
400 cmos->wake_off(cmos->dev);
403 cmos_checkintr(cmos, rtc_control);
406 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
408 struct cmos_rtc *cmos = dev_get_drvdata(dev);
411 cmos_read_time(dev, &now);
413 if (!cmos->day_alrm) {
417 t_max_date = rtc_tm_to_time64(&now);
418 t_max_date += 24 * 60 * 60 - 1;
419 t_alrm = rtc_tm_to_time64(&t->time);
420 if (t_alrm > t_max_date) {
422 "Alarms can be up to one day in the future\n");
425 } else if (!cmos->mon_alrm) {
426 struct rtc_time max_date = now;
431 if (max_date.tm_mon == 11) {
433 max_date.tm_year += 1;
435 max_date.tm_mon += 1;
437 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
438 if (max_date.tm_mday > max_mday)
439 max_date.tm_mday = max_mday;
441 t_max_date = rtc_tm_to_time64(&max_date);
443 t_alrm = rtc_tm_to_time64(&t->time);
444 if (t_alrm > t_max_date) {
446 "Alarms can be up to one month in the future\n");
450 struct rtc_time max_date = now;
455 max_date.tm_year += 1;
456 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
457 if (max_date.tm_mday > max_mday)
458 max_date.tm_mday = max_mday;
460 t_max_date = rtc_tm_to_time64(&max_date);
462 t_alrm = rtc_tm_to_time64(&t->time);
463 if (t_alrm > t_max_date) {
465 "Alarms can be up to one year in the future\n");
473 struct cmos_set_alarm_callback_param {
474 struct cmos_rtc *cmos;
475 unsigned char mon, mday, hrs, min, sec;
476 struct rtc_wkalrm *t;
479 /* Note: this function may be executed by mc146818_avoid_UIP() more then
482 static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
485 struct cmos_set_alarm_callback_param *p =
486 (struct cmos_set_alarm_callback_param *)param_in;
488 /* next rtc irq must not be from previous alarm setting */
489 cmos_irq_disable(p->cmos, RTC_AIE);
492 CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
493 CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
494 CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
496 /* the system may support an "enhanced" alarm */
497 if (p->cmos->day_alrm) {
498 CMOS_WRITE(p->mday, p->cmos->day_alrm);
499 if (p->cmos->mon_alrm)
500 CMOS_WRITE(p->mon, p->cmos->mon_alrm);
503 if (use_hpet_alarm()) {
505 * FIXME the HPET alarm glue currently ignores day_alrm
508 hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
513 cmos_irq_enable(p->cmos, RTC_AIE);
516 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
518 struct cmos_rtc *cmos = dev_get_drvdata(dev);
519 struct cmos_set_alarm_callback_param p = {
523 unsigned char rtc_control;
526 /* This not only a rtc_op, but also called directly */
527 if (!is_valid_irq(cmos->irq))
530 ret = cmos_validate_alarm(dev, t);
534 p.mon = t->time.tm_mon + 1;
535 p.mday = t->time.tm_mday;
536 p.hrs = t->time.tm_hour;
537 p.min = t->time.tm_min;
538 p.sec = t->time.tm_sec;
540 spin_lock_irq(&rtc_lock);
541 rtc_control = CMOS_READ(RTC_CONTROL);
542 spin_unlock_irq(&rtc_lock);
544 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
545 /* Writing 0xff means "don't care" or "match all". */
546 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
547 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
548 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
549 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
550 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
554 * Some Intel chipsets disconnect the alarm registers when the clock
555 * update is in progress - during this time writes fail silently.
557 * Use mc146818_avoid_UIP() to avoid this.
559 if (!mc146818_avoid_UIP(cmos_set_alarm_callback, &p))
562 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
567 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
569 struct cmos_rtc *cmos = dev_get_drvdata(dev);
572 spin_lock_irqsave(&rtc_lock, flags);
575 cmos_irq_enable(cmos, RTC_AIE);
577 cmos_irq_disable(cmos, RTC_AIE);
579 spin_unlock_irqrestore(&rtc_lock, flags);
583 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
585 static int cmos_procfs(struct device *dev, struct seq_file *seq)
587 struct cmos_rtc *cmos = dev_get_drvdata(dev);
588 unsigned char rtc_control, valid;
590 spin_lock_irq(&rtc_lock);
591 rtc_control = CMOS_READ(RTC_CONTROL);
592 valid = CMOS_READ(RTC_VALID);
593 spin_unlock_irq(&rtc_lock);
595 /* NOTE: at least ICH6 reports battery status using a different
596 * (non-RTC) bit; and SQWE is ignored on many current systems.
599 "periodic_IRQ\t: %s\n"
601 "HPET_emulated\t: %s\n"
602 // "square_wave\t: %s\n"
605 "periodic_freq\t: %d\n"
606 "batt_status\t: %s\n",
607 (rtc_control & RTC_PIE) ? "yes" : "no",
608 (rtc_control & RTC_UIE) ? "yes" : "no",
609 use_hpet_alarm() ? "yes" : "no",
610 // (rtc_control & RTC_SQWE) ? "yes" : "no",
611 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
612 (rtc_control & RTC_DST_EN) ? "yes" : "no",
614 (valid & RTC_VRT) ? "okay" : "dead");
620 #define cmos_procfs NULL
623 static const struct rtc_class_ops cmos_rtc_ops = {
624 .read_time = cmos_read_time,
625 .set_time = cmos_set_time,
626 .read_alarm = cmos_read_alarm,
627 .set_alarm = cmos_set_alarm,
629 .alarm_irq_enable = cmos_alarm_irq_enable,
632 /*----------------------------------------------------------------*/
635 * All these chips have at least 64 bytes of address space, shared by
636 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
637 * by boot firmware. Modern chips have 128 or 256 bytes.
640 #define NVRAM_OFFSET (RTC_REG_D + 1)
642 static int cmos_nvram_read(void *priv, unsigned int off, void *val,
645 unsigned char *buf = val;
649 spin_lock_irq(&rtc_lock);
650 for (retval = 0; count; count--, off++, retval++) {
652 *buf++ = CMOS_READ(off);
654 *buf++ = cmos_read_bank2(off);
658 spin_unlock_irq(&rtc_lock);
663 static int cmos_nvram_write(void *priv, unsigned int off, void *val,
666 struct cmos_rtc *cmos = priv;
667 unsigned char *buf = val;
670 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
671 * checksum on part of the NVRAM data. That's currently ignored
672 * here. If userspace is smart enough to know what fields of
673 * NVRAM to update, updating checksums is also part of its job.
676 spin_lock_irq(&rtc_lock);
677 for (retval = 0; count; count--, off++, retval++) {
678 /* don't trash RTC registers */
679 if (off == cmos->day_alrm
680 || off == cmos->mon_alrm
681 || off == cmos->century)
684 CMOS_WRITE(*buf++, off);
686 cmos_write_bank2(*buf++, off);
690 spin_unlock_irq(&rtc_lock);
695 /*----------------------------------------------------------------*/
697 static struct cmos_rtc cmos_rtc;
699 static irqreturn_t cmos_interrupt(int irq, void *p)
704 spin_lock(&rtc_lock);
706 /* When the HPET interrupt handler calls us, the interrupt
707 * status is passed as arg1 instead of the irq number. But
708 * always clear irq status, even when HPET is in the way.
710 * Note that HPET and RTC are almost certainly out of phase,
711 * giving different IRQ status ...
713 irqstat = CMOS_READ(RTC_INTR_FLAGS);
714 rtc_control = CMOS_READ(RTC_CONTROL);
715 if (use_hpet_alarm())
716 irqstat = (unsigned long)irq & 0xF0;
718 /* If we were suspended, RTC_CONTROL may not be accurate since the
719 * bios may have cleared it.
721 if (!cmos_rtc.suspend_ctrl)
722 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
724 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
726 /* All Linux RTC alarms should be treated as if they were oneshot.
727 * Similar code may be needed in system wakeup paths, in case the
728 * alarm woke the system.
730 if (irqstat & RTC_AIE) {
731 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
732 rtc_control &= ~RTC_AIE;
733 CMOS_WRITE(rtc_control, RTC_CONTROL);
734 if (use_hpet_alarm())
735 hpet_mask_rtc_irq_bit(RTC_AIE);
736 CMOS_READ(RTC_INTR_FLAGS);
738 spin_unlock(&rtc_lock);
740 if (is_intr(irqstat)) {
741 rtc_update_irq(p, 1, irqstat);
749 #include <linux/acpi.h>
751 static u32 rtc_handler(void *context)
753 struct device *dev = context;
754 struct cmos_rtc *cmos = dev_get_drvdata(dev);
755 unsigned char rtc_control = 0;
756 unsigned char rtc_intr;
761 * Always update rtc irq when ACPI is used as RTC Alarm.
762 * Or else, ACPI SCI is enabled during suspend/resume only,
763 * update rtc irq in that case.
765 if (cmos_use_acpi_alarm())
766 cmos_interrupt(0, (void *)cmos->rtc);
768 /* Fix me: can we use cmos_interrupt() here as well? */
769 spin_lock_irqsave(&rtc_lock, flags);
770 if (cmos_rtc.suspend_ctrl)
771 rtc_control = CMOS_READ(RTC_CONTROL);
772 if (rtc_control & RTC_AIE) {
773 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
774 CMOS_WRITE(rtc_control, RTC_CONTROL);
775 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
776 rtc_update_irq(cmos->rtc, 1, rtc_intr);
778 spin_unlock_irqrestore(&rtc_lock, flags);
781 pm_wakeup_hard_event(dev);
782 acpi_clear_event(ACPI_EVENT_RTC);
783 acpi_disable_event(ACPI_EVENT_RTC, 0);
784 return ACPI_INTERRUPT_HANDLED;
787 static void acpi_rtc_event_setup(struct device *dev)
792 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
794 * After the RTC handler is installed, the Fixed_RTC event should
795 * be disabled. Only when the RTC alarm is set will it be enabled.
797 acpi_clear_event(ACPI_EVENT_RTC);
798 acpi_disable_event(ACPI_EVENT_RTC, 0);
801 static void acpi_rtc_event_cleanup(void)
806 acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
809 static void rtc_wake_on(struct device *dev)
811 acpi_clear_event(ACPI_EVENT_RTC);
812 acpi_enable_event(ACPI_EVENT_RTC, 0);
815 static void rtc_wake_off(struct device *dev)
817 acpi_disable_event(ACPI_EVENT_RTC, 0);
821 /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
822 static void use_acpi_alarm_quirks(void)
824 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
827 if (!is_hpet_enabled())
830 if (dmi_get_bios_year() < 2015)
833 use_acpi_alarm = true;
836 static inline void use_acpi_alarm_quirks(void) { }
839 static void acpi_cmos_wake_setup(struct device *dev)
844 use_acpi_alarm_quirks();
846 cmos_rtc.wake_on = rtc_wake_on;
847 cmos_rtc.wake_off = rtc_wake_off;
849 /* ACPI tables bug workaround. */
850 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
851 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
852 acpi_gbl_FADT.month_alarm);
853 acpi_gbl_FADT.month_alarm = 0;
856 cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
857 cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
858 cmos_rtc.century = acpi_gbl_FADT.century;
860 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
861 dev_info(dev, "RTC can wake from S4\n");
863 /* RTC always wakes from S1/S2/S3, and often S4/STD */
864 device_init_wakeup(dev, 1);
867 static void cmos_check_acpi_rtc_status(struct device *dev,
868 unsigned char *rtc_control)
870 struct cmos_rtc *cmos = dev_get_drvdata(dev);
871 acpi_event_status rtc_status;
874 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
877 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
878 if (ACPI_FAILURE(status)) {
879 dev_err(dev, "Could not get RTC status\n");
880 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
882 *rtc_control &= ~RTC_AIE;
883 CMOS_WRITE(*rtc_control, RTC_CONTROL);
884 mask = CMOS_READ(RTC_INTR_FLAGS);
885 rtc_update_irq(cmos->rtc, 1, mask);
889 #else /* !CONFIG_ACPI */
891 static inline void acpi_rtc_event_setup(struct device *dev)
895 static inline void acpi_rtc_event_cleanup(void)
899 static inline void acpi_cmos_wake_setup(struct device *dev)
903 static inline void cmos_check_acpi_rtc_status(struct device *dev,
904 unsigned char *rtc_control)
907 #endif /* CONFIG_ACPI */
913 #define INITSECTION __init
916 static int INITSECTION
917 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
919 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
921 unsigned char rtc_control;
922 unsigned address_space;
924 struct nvmem_config nvmem_cfg = {
925 .name = "cmos_nvram",
928 .reg_read = cmos_nvram_read,
929 .reg_write = cmos_nvram_write,
933 /* there can be only one ... */
940 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
942 * REVISIT non-x86 systems may instead use memory space resources
943 * (needing ioremap etc), not i/o space resources like this ...
946 ports = request_region(ports->start, resource_size(ports),
949 ports = request_mem_region(ports->start, resource_size(ports),
952 dev_dbg(dev, "i/o registers already in use\n");
956 cmos_rtc.irq = rtc_irq;
957 cmos_rtc.iomem = ports;
959 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
960 * driver did, but don't reject unknown configs. Old hardware
961 * won't address 128 bytes. Newer chips have multiple banks,
962 * though they may not be listed in one I/O resource.
964 #if defined(CONFIG_ATARI)
966 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
967 || defined(__sparc__) || defined(__mips__) \
968 || defined(__powerpc__)
971 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
974 if (can_bank2 && ports->end > (ports->start + 1))
977 /* For ACPI systems extension info comes from the FADT. On others,
978 * board specific setup provides it as appropriate. Systems where
979 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
980 * some almost-clones) can provide hooks to make that behave.
982 * Note that ACPI doesn't preclude putting these registers into
983 * "extended" areas of the chip, including some that we won't yet
984 * expect CMOS_READ and friends to handle.
989 if (info->address_space)
990 address_space = info->address_space;
992 cmos_rtc.day_alrm = info->rtc_day_alarm;
993 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
994 cmos_rtc.century = info->rtc_century;
996 if (info->wake_on && info->wake_off) {
997 cmos_rtc.wake_on = info->wake_on;
998 cmos_rtc.wake_off = info->wake_off;
1001 acpi_cmos_wake_setup(dev);
1004 if (cmos_rtc.day_alrm >= 128)
1005 cmos_rtc.day_alrm = 0;
1007 if (cmos_rtc.mon_alrm >= 128)
1008 cmos_rtc.mon_alrm = 0;
1010 if (cmos_rtc.century >= 128)
1011 cmos_rtc.century = 0;
1014 dev_set_drvdata(dev, &cmos_rtc);
1016 cmos_rtc.rtc = devm_rtc_allocate_device(dev);
1017 if (IS_ERR(cmos_rtc.rtc)) {
1018 retval = PTR_ERR(cmos_rtc.rtc);
1022 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
1024 if (!mc146818_does_rtc_work()) {
1025 dev_warn(dev, "broken or not accessible\n");
1030 spin_lock_irq(&rtc_lock);
1032 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
1033 /* force periodic irq to CMOS reset default of 1024Hz;
1035 * REVISIT it's been reported that at least one x86_64 ALI
1036 * mobo doesn't use 32KHz here ... for portability we might
1037 * need to do something about other clock frequencies.
1039 cmos_rtc.rtc->irq_freq = 1024;
1040 if (use_hpet_alarm())
1041 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
1042 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
1046 if (is_valid_irq(rtc_irq))
1047 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
1049 rtc_control = CMOS_READ(RTC_CONTROL);
1051 spin_unlock_irq(&rtc_lock);
1053 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
1054 dev_warn(dev, "only 24-hr supported\n");
1059 if (use_hpet_alarm())
1060 hpet_rtc_timer_init();
1062 if (is_valid_irq(rtc_irq)) {
1063 irq_handler_t rtc_cmos_int_handler;
1065 if (use_hpet_alarm()) {
1066 rtc_cmos_int_handler = hpet_rtc_interrupt;
1067 retval = hpet_register_irq_handler(cmos_interrupt);
1069 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
1070 dev_warn(dev, "hpet_register_irq_handler "
1071 " failed in rtc_init().");
1075 rtc_cmos_int_handler = cmos_interrupt;
1077 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
1078 0, dev_name(&cmos_rtc.rtc->dev),
1081 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
1085 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
1088 cmos_rtc.rtc->ops = &cmos_rtc_ops;
1090 retval = devm_rtc_register_device(cmos_rtc.rtc);
1094 /* Set the sync offset for the periodic 11min update correct */
1095 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
1097 /* export at least the first block of NVRAM */
1098 nvmem_cfg.size = address_space - NVRAM_OFFSET;
1099 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
1102 * Everything has gone well so far, so by default register a handler for
1103 * the ACPI RTC fixed event.
1106 acpi_rtc_event_setup(dev);
1108 dev_info(dev, "%s%s, %d bytes nvram%s\n",
1109 !is_valid_irq(rtc_irq) ? "no alarms" :
1110 cmos_rtc.mon_alrm ? "alarms up to one year" :
1111 cmos_rtc.day_alrm ? "alarms up to one month" :
1112 "alarms up to one day",
1113 cmos_rtc.century ? ", y3k" : "",
1115 use_hpet_alarm() ? ", hpet irqs" : "");
1120 if (is_valid_irq(rtc_irq))
1121 free_irq(rtc_irq, cmos_rtc.rtc);
1123 cmos_rtc.dev = NULL;
1126 release_region(ports->start, resource_size(ports));
1128 release_mem_region(ports->start, resource_size(ports));
1132 static void cmos_do_shutdown(int rtc_irq)
1134 spin_lock_irq(&rtc_lock);
1135 if (is_valid_irq(rtc_irq))
1136 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
1137 spin_unlock_irq(&rtc_lock);
1140 static void cmos_do_remove(struct device *dev)
1142 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1143 struct resource *ports;
1145 cmos_do_shutdown(cmos->irq);
1147 if (is_valid_irq(cmos->irq)) {
1148 free_irq(cmos->irq, cmos->rtc);
1149 if (use_hpet_alarm())
1150 hpet_unregister_irq_handler(cmos_interrupt);
1153 if (!dev_get_platdata(dev))
1154 acpi_rtc_event_cleanup();
1158 ports = cmos->iomem;
1160 release_region(ports->start, resource_size(ports));
1162 release_mem_region(ports->start, resource_size(ports));
1168 static int cmos_aie_poweroff(struct device *dev)
1170 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1171 struct rtc_time now;
1174 unsigned char rtc_control;
1176 if (!cmos->alarm_expires)
1179 spin_lock_irq(&rtc_lock);
1180 rtc_control = CMOS_READ(RTC_CONTROL);
1181 spin_unlock_irq(&rtc_lock);
1183 /* We only care about the situation where AIE is disabled. */
1184 if (rtc_control & RTC_AIE)
1187 cmos_read_time(dev, &now);
1188 t_now = rtc_tm_to_time64(&now);
1191 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
1192 * automatically right after shutdown on some buggy boxes.
1193 * This automatic rebooting issue won't happen when the alarm
1194 * time is larger than now+1 seconds.
1196 * If the alarm time is equal to now+1 seconds, the issue can be
1197 * prevented by cancelling the alarm.
1199 if (cmos->alarm_expires == t_now + 1) {
1200 struct rtc_wkalrm alarm;
1202 /* Cancel the AIE timer by configuring the past time. */
1203 rtc_time64_to_tm(t_now - 1, &alarm.time);
1205 retval = cmos_set_alarm(dev, &alarm);
1206 } else if (cmos->alarm_expires > t_now + 1) {
1213 static int cmos_suspend(struct device *dev)
1215 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1218 /* only the alarm might be a wakeup event source */
1219 spin_lock_irq(&rtc_lock);
1220 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
1221 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
1224 if (device_may_wakeup(dev))
1225 mask = RTC_IRQMASK & ~RTC_AIE;
1229 CMOS_WRITE(tmp, RTC_CONTROL);
1230 if (use_hpet_alarm())
1231 hpet_mask_rtc_irq_bit(mask);
1232 cmos_checkintr(cmos, tmp);
1234 spin_unlock_irq(&rtc_lock);
1236 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1237 cmos->enabled_wake = 1;
1241 enable_irq_wake(cmos->irq);
1244 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1245 cmos_read_alarm(dev, &cmos->saved_wkalrm);
1247 dev_dbg(dev, "suspend%s, ctrl %02x\n",
1248 (tmp & RTC_AIE) ? ", alarm may wake" : "",
1254 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1255 * after a detour through G3 "mechanical off", although the ACPI spec
1256 * says wakeup should only work from G1/S4 "hibernate". To most users,
1257 * distinctions between S4 and S5 are pointless. So when the hardware
1258 * allows, don't draw that distinction.
1260 static inline int cmos_poweroff(struct device *dev)
1262 if (!IS_ENABLED(CONFIG_PM))
1265 return cmos_suspend(dev);
1268 static void cmos_check_wkalrm(struct device *dev)
1270 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1271 struct rtc_wkalrm current_alarm;
1273 time64_t t_current_expires;
1274 time64_t t_saved_expires;
1275 struct rtc_time now;
1277 /* Check if we have RTC Alarm armed */
1278 if (!(cmos->suspend_ctrl & RTC_AIE))
1281 cmos_read_time(dev, &now);
1282 t_now = rtc_tm_to_time64(&now);
1285 * ACPI RTC wake event is cleared after resume from STR,
1286 * ACK the rtc irq here
1288 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1289 local_irq_disable();
1290 cmos_interrupt(0, (void *)cmos->rtc);
1295 memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm));
1296 cmos_read_alarm(dev, ¤t_alarm);
1297 t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
1298 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1299 if (t_current_expires != t_saved_expires ||
1300 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1301 cmos_set_alarm(dev, &cmos->saved_wkalrm);
1305 static int __maybe_unused cmos_resume(struct device *dev)
1307 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1310 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1312 cmos->wake_off(dev);
1314 disable_irq_wake(cmos->irq);
1315 cmos->enabled_wake = 0;
1318 /* The BIOS might have changed the alarm, restore it */
1319 cmos_check_wkalrm(dev);
1321 spin_lock_irq(&rtc_lock);
1322 tmp = cmos->suspend_ctrl;
1323 cmos->suspend_ctrl = 0;
1324 /* re-enable any irqs previously active */
1325 if (tmp & RTC_IRQMASK) {
1328 if (device_may_wakeup(dev) && use_hpet_alarm())
1329 hpet_rtc_timer_init();
1332 CMOS_WRITE(tmp, RTC_CONTROL);
1333 if (use_hpet_alarm())
1334 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1336 mask = CMOS_READ(RTC_INTR_FLAGS);
1337 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1338 if (!use_hpet_alarm() || !is_intr(mask))
1341 /* force one-shot behavior if HPET blocked
1342 * the wake alarm's irq
1344 rtc_update_irq(cmos->rtc, 1, mask);
1346 hpet_mask_rtc_irq_bit(RTC_AIE);
1347 } while (mask & RTC_AIE);
1350 cmos_check_acpi_rtc_status(dev, &tmp);
1352 spin_unlock_irq(&rtc_lock);
1354 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1359 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1361 /*----------------------------------------------------------------*/
1363 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1364 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1365 * probably list them in similar PNPBIOS tables; so PNP is more common.
1367 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1368 * predate even PNPBIOS should set up platform_bus devices.
1373 #include <linux/pnp.h>
1375 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1379 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1382 /* Some machines contain a PNP entry for the RTC, but
1383 * don't define the IRQ. It should always be safe to
1384 * hardcode it on systems with a legacy PIC.
1386 if (nr_legacy_irqs())
1390 irq = pnp_irq(pnp, 0);
1393 return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1396 static void cmos_pnp_remove(struct pnp_dev *pnp)
1398 cmos_do_remove(&pnp->dev);
1401 static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1403 struct device *dev = &pnp->dev;
1404 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1406 if (system_state == SYSTEM_POWER_OFF) {
1407 int retval = cmos_poweroff(dev);
1409 if (cmos_aie_poweroff(dev) < 0 && !retval)
1413 cmos_do_shutdown(cmos->irq);
1416 static const struct pnp_device_id rtc_ids[] = {
1417 { .id = "PNP0b00", },
1418 { .id = "PNP0b01", },
1419 { .id = "PNP0b02", },
1422 MODULE_DEVICE_TABLE(pnp, rtc_ids);
1424 static struct pnp_driver cmos_pnp_driver = {
1425 .name = driver_name,
1426 .id_table = rtc_ids,
1427 .probe = cmos_pnp_probe,
1428 .remove = cmos_pnp_remove,
1429 .shutdown = cmos_pnp_shutdown,
1431 /* flag ensures resume() gets called, and stops syslog spam */
1432 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1438 #endif /* CONFIG_PNP */
1441 static const struct of_device_id of_cmos_match[] = {
1443 .compatible = "motorola,mc146818",
1447 MODULE_DEVICE_TABLE(of, of_cmos_match);
1449 static __init void cmos_of_init(struct platform_device *pdev)
1451 struct device_node *node = pdev->dev.of_node;
1457 val = of_get_property(node, "ctrl-reg", NULL);
1459 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1461 val = of_get_property(node, "freq-reg", NULL);
1463 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1466 static inline void cmos_of_init(struct platform_device *pdev) {}
1468 /*----------------------------------------------------------------*/
1470 /* Platform setup should have set up an RTC device, when PNP is
1471 * unavailable ... this could happen even on (older) PCs.
1474 static int __init cmos_platform_probe(struct platform_device *pdev)
1476 struct resource *resource;
1482 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1484 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1485 irq = platform_get_irq(pdev, 0);
1489 return cmos_do_probe(&pdev->dev, resource, irq);
1492 static void cmos_platform_remove(struct platform_device *pdev)
1494 cmos_do_remove(&pdev->dev);
1497 static void cmos_platform_shutdown(struct platform_device *pdev)
1499 struct device *dev = &pdev->dev;
1500 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1502 if (system_state == SYSTEM_POWER_OFF) {
1503 int retval = cmos_poweroff(dev);
1505 if (cmos_aie_poweroff(dev) < 0 && !retval)
1509 cmos_do_shutdown(cmos->irq);
1512 /* work with hotplug and coldplug */
1513 MODULE_ALIAS("platform:rtc_cmos");
1515 static struct platform_driver cmos_platform_driver = {
1516 .remove_new = cmos_platform_remove,
1517 .shutdown = cmos_platform_shutdown,
1519 .name = driver_name,
1521 .of_match_table = of_match_ptr(of_cmos_match),
1526 static bool pnp_driver_registered;
1528 static bool platform_driver_registered;
1530 static int __init cmos_init(void)
1535 retval = pnp_register_driver(&cmos_pnp_driver);
1537 pnp_driver_registered = true;
1540 if (!cmos_rtc.dev) {
1541 retval = platform_driver_probe(&cmos_platform_driver,
1542 cmos_platform_probe);
1544 platform_driver_registered = true;
1551 if (pnp_driver_registered)
1552 pnp_unregister_driver(&cmos_pnp_driver);
1556 module_init(cmos_init);
1558 static void __exit cmos_exit(void)
1561 if (pnp_driver_registered)
1562 pnp_unregister_driver(&cmos_pnp_driver);
1564 if (platform_driver_registered)
1565 platform_driver_unregister(&cmos_platform_driver);
1567 module_exit(cmos_exit);
1570 MODULE_AUTHOR("David Brownell");
1571 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1572 MODULE_LICENSE("GPL");