1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2001-2008
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Keith Outwater, keith_outwater@mvis.com`
10 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
11 * DS1337 Real Time Clock (RTC).
21 * RTC register addresses
23 #if defined CONFIG_RTC_DS1337
24 #define RTC_SEC_REG_ADDR 0x0
25 #define RTC_MIN_REG_ADDR 0x1
26 #define RTC_HR_REG_ADDR 0x2
27 #define RTC_DAY_REG_ADDR 0x3
28 #define RTC_DATE_REG_ADDR 0x4
29 #define RTC_MON_REG_ADDR 0x5
30 #define RTC_YR_REG_ADDR 0x6
31 #define RTC_CTL_REG_ADDR 0x0e
32 #define RTC_STAT_REG_ADDR 0x0f
33 #define RTC_TC_REG_ADDR 0x10
34 #elif defined CONFIG_RTC_DS1388
35 #define RTC_SEC_REG_ADDR 0x1
36 #define RTC_MIN_REG_ADDR 0x2
37 #define RTC_HR_REG_ADDR 0x3
38 #define RTC_DAY_REG_ADDR 0x4
39 #define RTC_DATE_REG_ADDR 0x5
40 #define RTC_MON_REG_ADDR 0x6
41 #define RTC_YR_REG_ADDR 0x7
42 #define RTC_CTL_REG_ADDR 0x0c
43 #define RTC_STAT_REG_ADDR 0x0b
44 #define RTC_TC_REG_ADDR 0x0a
48 * RTC control register bits
50 #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */
51 #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */
52 #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */
53 #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */
54 #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */
55 #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */
58 * RTC status register bits
60 #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */
61 #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */
62 #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */
65 #if !CONFIG_IS_ENABLED(DM_RTC)
66 static uchar rtc_read (uchar reg);
67 static void rtc_write (uchar reg, uchar val);
70 * Get the current time from the RTC
72 int rtc_get (struct rtc_time *tmp)
75 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
77 control = rtc_read (RTC_CTL_REG_ADDR);
78 status = rtc_read (RTC_STAT_REG_ADDR);
79 sec = rtc_read (RTC_SEC_REG_ADDR);
80 min = rtc_read (RTC_MIN_REG_ADDR);
81 hour = rtc_read (RTC_HR_REG_ADDR);
82 wday = rtc_read (RTC_DAY_REG_ADDR);
83 mday = rtc_read (RTC_DATE_REG_ADDR);
84 mon_cent = rtc_read (RTC_MON_REG_ADDR);
85 year = rtc_read (RTC_YR_REG_ADDR);
87 /* No century bit, assume year 2000 */
88 #ifdef CONFIG_RTC_DS1388
92 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
93 "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
94 year, mon_cent, mday, wday, hour, min, sec, control, status);
96 if (status & RTC_STAT_BIT_OSF) {
97 printf ("### Warning: RTC oscillator has stopped\n");
98 /* clear the OSF flag */
99 rtc_write (RTC_STAT_REG_ADDR,
100 rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
104 tmp->tm_sec = bcd2bin (sec & 0x7F);
105 tmp->tm_min = bcd2bin (min & 0x7F);
106 tmp->tm_hour = bcd2bin (hour & 0x3F);
107 tmp->tm_mday = bcd2bin (mday & 0x3F);
108 tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
109 tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
110 tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
114 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
115 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
116 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
125 int rtc_set (struct rtc_time *tmp)
129 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
130 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
131 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
133 rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
135 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
136 rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
138 rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
139 rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
140 rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
141 rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
142 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
149 * Reset the RTC. We also enable the oscillator output on the
150 * SQW/INTB* pin and program it for 32,768 Hz output. Note that
151 * according to the datasheet, turning on the square wave output
152 * increases the current drain on the backup battery from about
153 * 600 nA to 2uA. Define CONFIG_RTC_DS1337_NOOSC if you wish to turn
154 * off the OSC output.
157 #ifdef CONFIG_RTC_DS1337_NOOSC
158 #define RTC_DS1337_RESET_VAL \
159 (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
161 #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
163 void rtc_reset (void)
165 #ifdef CONFIG_RTC_DS1337
166 rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
167 #elif defined CONFIG_RTC_DS1388
168 rtc_write(RTC_CTL_REG_ADDR, 0x0); /* hw default */
170 #ifdef CONFIG_RTC_DS1339_TCR_VAL
171 rtc_write (RTC_TC_REG_ADDR, CONFIG_RTC_DS1339_TCR_VAL);
173 #ifdef CONFIG_RTC_DS1388_TCR_VAL
174 rtc_write(RTC_TC_REG_ADDR, CONFIG_RTC_DS1388_TCR_VAL);
184 uchar rtc_read (uchar reg)
186 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
190 static void rtc_write (uchar reg, uchar val)
192 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
195 static uchar rtc_read(struct udevice *dev, uchar reg)
197 return dm_i2c_reg_read(dev, reg);
200 static void rtc_write(struct udevice *dev, uchar reg, uchar val)
202 dm_i2c_reg_write(dev, reg, val);
205 static int ds1337_rtc_get(struct udevice *dev, struct rtc_time *tmp)
208 uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
210 control = rtc_read(dev, RTC_CTL_REG_ADDR);
211 status = rtc_read(dev, RTC_STAT_REG_ADDR);
212 sec = rtc_read(dev, RTC_SEC_REG_ADDR);
213 min = rtc_read(dev, RTC_MIN_REG_ADDR);
214 hour = rtc_read(dev, RTC_HR_REG_ADDR);
215 wday = rtc_read(dev, RTC_DAY_REG_ADDR);
216 mday = rtc_read(dev, RTC_DATE_REG_ADDR);
217 mon_cent = rtc_read(dev, RTC_MON_REG_ADDR);
218 year = rtc_read(dev, RTC_YR_REG_ADDR);
220 /* No century bit, assume year 2000 */
221 #ifdef CONFIG_RTC_DS1388
225 debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x\n",
226 year, mon_cent, mday, wday);
227 debug("hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
228 hour, min, sec, control, status);
230 if (status & RTC_STAT_BIT_OSF) {
231 printf("### Warning: RTC oscillator has stopped\n");
232 /* clear the OSF flag */
233 rtc_write(dev, RTC_STAT_REG_ADDR,
234 rtc_read(dev, RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
238 tmp->tm_sec = bcd2bin(sec & 0x7F);
239 tmp->tm_min = bcd2bin(min & 0x7F);
240 tmp->tm_hour = bcd2bin(hour & 0x3F);
241 tmp->tm_mday = bcd2bin(mday & 0x3F);
242 tmp->tm_mon = bcd2bin(mon_cent & 0x1F);
243 tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900);
244 tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
248 debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
249 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
250 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
255 static int ds1337_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
259 debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
260 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
261 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
263 rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
265 century = (tmp->tm_year >= 2000) ? 0x80 : 0;
266 rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century);
268 rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
269 rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
270 rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
271 rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
272 rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
277 #ifdef CONFIG_RTC_DS1337_NOOSC
278 #define RTC_DS1337_RESET_VAL \
279 (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
281 #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
283 static int ds1337_rtc_reset(struct udevice *dev)
285 #ifdef CONFIG_RTC_DS1337
286 rtc_write(dev, RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
287 #elif defined CONFIG_RTC_DS1388
288 rtc_write(dev, RTC_CTL_REG_ADDR, 0x0); /* hw default */
290 #ifdef CONFIG_RTC_DS1339_TCR_VAL
291 rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1339_TCR_VAL);
293 #ifdef CONFIG_RTC_DS1388_TCR_VAL
294 rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1388_TCR_VAL);
299 static const struct rtc_ops ds1337_rtc_ops = {
300 .get = ds1337_rtc_get,
301 .set = ds1337_rtc_set,
302 .reset = ds1337_rtc_reset,
305 static const struct udevice_id ds1337_rtc_ids[] = {
306 { .compatible = "ds1337" },
307 { .compatible = "ds1338" },
308 { .compatible = "ds1338" },
312 U_BOOT_DRIVER(rtc_ds1337) = {
313 .name = "rtc-ds1337",
315 .of_match = ds1337_rtc_ids,
316 .ops = &ds1337_rtc_ops,