3 * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Date & Time support for the internal Real-time Timer
26 * of AT91SAM9260 and compatibles.
27 * Compatible with the LinuX rtc driver workaround:
28 * The RTT cannot be written to, but only reset.
29 * The actual time is the sum of RTT and one of
30 * the four GPBR registers.
32 * The at91sam9260 has 4 GPBR (0-3).
33 * For their typical use see at91_gpbr.h !
35 * make sure u-boot and kernel use the same GPBR !
41 #include <asm/errno.h>
42 #include <asm/arch/hardware.h>
43 #include <asm/arch/io.h>
44 #include <asm/arch/at91_rtt.h>
45 #include <asm/arch/at91_gpbr.h>
47 #if defined(CONFIG_CMD_DATE)
49 int rtc_get (struct rtc_time *tmp)
51 at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
52 at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
58 tim = readl(&rtt->vr);
59 tim2 = readl(&rtt->vr);
61 off = readl(&gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
62 /* off==0 means time is invalid, but we ignore that */
67 int rtc_set (struct rtc_time *tmp)
69 at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
70 at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
73 tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
74 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
76 /* clear alarm, set prescaler to 32768, clear counter */
77 writel(32768+AT91_RTT_RTTRST, &rtt->mr);
79 writel(tim, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
80 /* wait for counter clear to happen, takes less than a 1/32768th second */
81 while (readl(&rtt->vr) != 0)
88 at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
89 at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
91 /* clear alarm, set prescaler to 32768, clear counter */
92 writel(32768+AT91_RTT_RTTRST, &rtt->mr);
94 writel(0, &gpbr->reg[AT91_GPBR_INDEX_TIMEOFF]);
95 /* wait for counter clear to happen, takes less than a 1/32768th second */
96 while (readl(&rtt->vr) != 0)