1 # SPDX-License-Identifier: GPL-2.0-only
2 config ARCH_HAS_RESET_CONTROLLER
5 menuconfig RESET_CONTROLLER
6 bool "Reset Controller Support"
7 default y if ARCH_HAS_RESET_CONTROLLER
9 Generic Reset Controller support.
11 This framework is designed to abstract reset handling of devices
12 via GPIOs or SoC-internal reset controller modules.
19 tristate "Altera Arria10 System Resource Reset"
20 depends on MFD_ALTERA_A10SR
22 This option enables support for the external reset functions for
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
26 bool "AR71xx Reset Driver" if COMPILE_TEST
29 This enables the ATH79 reset controller driver that supports the
30 AR71xx SoC reset controller.
33 bool "AXS10x Reset Driver" if COMPILE_TEST
34 default ARC_PLAT_AXS10X
36 This enables the reset controller driver for AXS10x.
39 bool "Berlin Reset Driver" if COMPILE_TEST
42 This enables the reset controller driver for Marvell Berlin SoCs.
45 tristate "Broadcom STB reset controller"
46 depends on ARCH_BRCMSTB || COMPILE_TEST
49 This enables the reset controller driver for Broadcom STB SoCs using
50 a SUN_TOP_CTRL_SW_INIT style controller.
52 config RESET_BRCMSTB_RESCAL
53 bool "Broadcom STB RESCAL reset controller"
55 default ARCH_BRCMSTB || COMPILE_TEST
57 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
61 bool "Synopsys HSDK Reset Driver"
63 depends on ARC_SOC_HSDK || COMPILE_TEST
65 This enables the reset controller driver for HSDK board.
68 tristate "i.MX7/8 Reset Driver"
70 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
71 default y if SOC_IMX7D
74 This enables the reset controller driver for i.MX7 SoCs.
77 bool "Intel Reset Controller Driver"
78 depends on OF && HAS_IOMEM
81 This enables the reset controller driver for Intel Gateway SoCs.
82 Say Y to control the reset signals provided by reset controller.
86 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
89 This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
92 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
95 This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
98 bool "Meson Reset Driver" if COMPILE_TEST
101 This enables the reset driver for Amlogic Meson SoCs.
103 config RESET_MESON_AUDIO_ARB
104 tristate "Meson Audio Memory Arbiter Reset Driver"
105 depends on ARCH_MESON || COMPILE_TEST
107 This enables the reset driver for Audio Memory Arbiter of
108 Amlogic's A113 based SoCs
111 bool "NPCM BMC Reset Driver" if COMPILE_TEST
114 This enables the reset controller driver for Nuvoton NPCM
120 config RESET_PISTACHIO
121 bool "Pistachio Reset Driver" if COMPILE_TEST
122 default MACH_PISTACHIO
124 This enables the reset driver for ImgTec Pistachio SoCs.
126 config RESET_QCOM_AOSS
127 tristate "Qcom AOSS Reset Driver"
128 depends on ARCH_QCOM || COMPILE_TEST
130 This enables the AOSS (always on subsystem) reset driver
131 for Qualcomm SDM845 SoCs. Say Y if you want to control
132 reset signals provided by AOSS for Modem, Venus, ADSP,
133 GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
135 config RESET_QCOM_PDC
136 tristate "Qualcomm PDC Reset Driver"
137 depends on ARCH_QCOM || COMPILE_TEST
139 This enables the PDC (Power Domain Controller) reset driver
140 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
141 to control reset signals provided by PDC for Modem, Compute,
142 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
144 config RESET_RASPBERRYPI
145 tristate "Raspberry Pi 4 Firmware Reset Driver"
146 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
149 Raspberry Pi 4's co-processor controls some of the board's HW
150 initialization process, but it's up to Linux to trigger it when
151 relevant. This driver provides a reset controller capable of
152 interfacing with RPi4's co-processor and model these firmware
153 initialization routines as reset lines.
156 tristate "Reset driver controlled via ARM SCMI interface"
157 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
158 default ARM_SCMI_PROTOCOL
160 This driver provides support for reset signal/domains that are
161 controlled by firmware that implements the SCMI interface.
163 This driver uses SCMI Message Protocol to interact with the
164 firmware controlling all the reset signals.
167 bool "Simple Reset Controller Driver" if COMPILE_TEST
168 default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
170 This enables a simple reset controller driver for reset lines that
171 that can be asserted and deasserted by toggling bits in a contiguous,
172 exclusive register space.
174 Currently this driver supports:
179 - RCC reset controller in STM32 MCUs
181 - ZTE's zx2967 family
183 config RESET_STM32MP157
184 bool "STM32MP157 Reset Driver" if COMPILE_TEST
185 default MACH_STM32MP157
187 This enables the RCC reset controller driver for STM32 MPUs.
190 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
194 This enables the reset driver for the SoCFPGA ARMv7 platforms. This
195 driver gets initialized early during platform init calls.
198 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
202 This enables the reset driver for Allwinner SoCs.
205 tristate "TI System Control Interface (TI-SCI) reset driver"
206 depends on TI_SCI_PROTOCOL
208 This enables the reset driver support over TI System Control Interface
209 available on some new TI's SoCs. If you wish to use reset resources
210 managed by the TI System Controller, say Y here. Otherwise, say N.
212 config RESET_TI_SYSCON
213 tristate "TI SYSCON Reset Driver"
217 This enables the reset driver support for TI devices with
218 memory-mapped reset registers as part of a syscon device node. If
219 you wish to use the reset framework for such memory-mapped devices,
220 say Y here. Otherwise, say N.
222 config RESET_UNIPHIER
223 tristate "Reset controller driver for UniPhier SoCs"
224 depends on ARCH_UNIPHIER || COMPILE_TEST
225 depends on OF && MFD_SYSCON
226 default ARCH_UNIPHIER
228 Support for reset controllers on UniPhier SoCs.
229 Say Y if you want to control reset signals provided by System Control
230 block, Media I/O block, Peripheral Block.
232 config RESET_UNIPHIER_GLUE
233 tristate "Reset driver in glue layer for UniPhier SoCs"
234 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
235 default ARCH_UNIPHIER
238 Support for peripheral core reset included in its own glue layer
239 on UniPhier SoCs. Say Y if you want to control reset signals
240 provided by the glue layer.
243 bool "ZYNQ Reset Driver" if COMPILE_TEST
246 This enables the reset controller driver for Xilinx Zynq SoCs.
248 source "drivers/reset/sti/Kconfig"
249 source "drivers/reset/hisilicon/Kconfig"
250 source "drivers/reset/tegra/Kconfig"