1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/firmware.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/pm_domain.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/firmware/qcom/qcom_scm.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/remoteproc.h>
24 #include <linux/soc/qcom/mdt_loader.h>
25 #include <linux/soc/qcom/smem.h>
26 #include <linux/soc/qcom/smem_state.h>
28 #include "qcom_common.h"
29 #include "qcom_pil_info.h"
30 #include "qcom_q6v5.h"
31 #include "remoteproc_internal.h"
33 #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100
36 int crash_reason_smem;
37 const char *firmware_name;
38 const char *dtb_firmware_name;
41 unsigned int minidump_id;
43 bool decrypt_shutdown;
45 char **proxy_pd_names;
47 const char *load_state;
49 const char *sysmon_name;
52 int region_assign_idx;
59 struct qcom_q6v5 q6v5;
62 struct clk *aggre2_clk;
64 struct regulator *cx_supply;
65 struct regulator *px_supply;
67 struct device *proxy_pds[3];
71 const char *dtb_firmware_name;
74 unsigned int minidump_id;
75 int crash_reason_smem;
76 bool decrypt_shutdown;
77 const char *info_name;
79 const struct firmware *firmware;
80 const struct firmware *dtb_firmware;
82 struct completion start_done;
83 struct completion stop_done;
86 phys_addr_t dtb_mem_phys;
87 phys_addr_t mem_reloc;
88 phys_addr_t dtb_mem_reloc;
89 phys_addr_t region_assign_phys;
94 size_t region_assign_size;
96 int region_assign_idx;
97 u64 region_assign_perms;
99 struct qcom_rproc_glink glink_subdev;
100 struct qcom_rproc_subdev smd_subdev;
101 struct qcom_rproc_ssr ssr_subdev;
102 struct qcom_sysmon *sysmon;
104 struct qcom_scm_pas_metadata pas_metadata;
105 struct qcom_scm_pas_metadata dtb_pas_metadata;
108 void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment,
109 void *dest, size_t offset, size_t size)
111 struct qcom_adsp *adsp = rproc->priv;
114 total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
115 if (total_offset < 0 || total_offset + size > adsp->mem_size) {
117 "invalid copy request for segment %pad with offset %zu and size %zu)\n",
118 &segment->da, offset, size);
119 memset(dest, 0xff, size);
123 memcpy_fromio(dest, adsp->mem_region + total_offset, size);
126 static void adsp_minidump(struct rproc *rproc)
128 struct qcom_adsp *adsp = rproc->priv;
130 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
133 qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
136 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
142 for (i = 0; i < pd_count; i++) {
143 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
144 ret = pm_runtime_get_sync(pds[i]);
146 pm_runtime_put_noidle(pds[i]);
147 dev_pm_genpd_set_performance_state(pds[i], 0);
148 goto unroll_pd_votes;
155 for (i--; i >= 0; i--) {
156 dev_pm_genpd_set_performance_state(pds[i], 0);
157 pm_runtime_put(pds[i]);
163 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
168 for (i = 0; i < pd_count; i++) {
169 dev_pm_genpd_set_performance_state(pds[i], 0);
170 pm_runtime_put(pds[i]);
174 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
176 unsigned int retry_num = 50;
180 msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
181 ret = qcom_scm_pas_shutdown(adsp->pas_id);
182 } while (ret == -EINVAL && --retry_num);
187 static int adsp_unprepare(struct rproc *rproc)
189 struct qcom_adsp *adsp = rproc->priv;
192 * adsp_load() did pass pas_metadata to the SCM driver for storing
193 * metadata context. It might have been released already if
194 * auth_and_reset() was successful, but in other cases clean it up
197 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
198 if (adsp->dtb_pas_id)
199 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
204 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
206 struct qcom_adsp *adsp = rproc->priv;
209 /* Store firmware handle to be used in adsp_start() */
212 if (adsp->dtb_pas_id) {
213 ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
215 dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
216 adsp->dtb_firmware_name, ret);
220 ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
221 adsp->dtb_pas_id, adsp->dtb_mem_phys,
222 &adsp->dtb_pas_metadata);
224 goto release_dtb_firmware;
226 ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
227 adsp->dtb_pas_id, adsp->dtb_mem_region,
228 adsp->dtb_mem_phys, adsp->dtb_mem_size,
229 &adsp->dtb_mem_reloc);
231 goto release_dtb_metadata;
236 release_dtb_metadata:
237 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
239 release_dtb_firmware:
240 release_firmware(adsp->dtb_firmware);
245 static int adsp_start(struct rproc *rproc)
247 struct qcom_adsp *adsp = rproc->priv;
250 ret = qcom_q6v5_prepare(&adsp->q6v5);
254 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
258 ret = clk_prepare_enable(adsp->xo);
260 goto disable_proxy_pds;
262 ret = clk_prepare_enable(adsp->aggre2_clk);
266 if (adsp->cx_supply) {
267 ret = regulator_enable(adsp->cx_supply);
269 goto disable_aggre2_clk;
272 if (adsp->px_supply) {
273 ret = regulator_enable(adsp->px_supply);
275 goto disable_cx_supply;
278 if (adsp->dtb_pas_id) {
279 ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
282 "failed to authenticate dtb image and release reset\n");
283 goto disable_px_supply;
287 ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
288 adsp->mem_phys, &adsp->pas_metadata);
290 goto disable_px_supply;
292 ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
293 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
296 goto release_pas_metadata;
298 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
300 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
303 "failed to authenticate image and release reset\n");
304 goto release_pas_metadata;
307 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
308 if (ret == -ETIMEDOUT) {
309 dev_err(adsp->dev, "start timed out\n");
310 qcom_scm_pas_shutdown(adsp->pas_id);
311 goto release_pas_metadata;
314 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
315 if (adsp->dtb_pas_id)
316 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
318 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
319 adsp->firmware = NULL;
323 release_pas_metadata:
324 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
325 if (adsp->dtb_pas_id)
326 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
329 regulator_disable(adsp->px_supply);
332 regulator_disable(adsp->cx_supply);
334 clk_disable_unprepare(adsp->aggre2_clk);
336 clk_disable_unprepare(adsp->xo);
338 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
340 qcom_q6v5_unprepare(&adsp->q6v5);
342 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
343 adsp->firmware = NULL;
348 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
350 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
353 regulator_disable(adsp->px_supply);
355 regulator_disable(adsp->cx_supply);
356 clk_disable_unprepare(adsp->aggre2_clk);
357 clk_disable_unprepare(adsp->xo);
358 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
361 static int adsp_stop(struct rproc *rproc)
363 struct qcom_adsp *adsp = rproc->priv;
367 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
368 if (ret == -ETIMEDOUT)
369 dev_err(adsp->dev, "timed out on wait\n");
371 ret = qcom_scm_pas_shutdown(adsp->pas_id);
372 if (ret && adsp->decrypt_shutdown)
373 ret = adsp_shutdown_poll_decrypt(adsp);
376 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
378 if (adsp->dtb_pas_id) {
379 ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
381 dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
384 handover = qcom_q6v5_unprepare(&adsp->q6v5);
386 qcom_pas_handover(&adsp->q6v5);
391 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
393 struct qcom_adsp *adsp = rproc->priv;
396 offset = da - adsp->mem_reloc;
397 if (offset < 0 || offset + len > adsp->mem_size)
403 return adsp->mem_region + offset;
406 static unsigned long adsp_panic(struct rproc *rproc)
408 struct qcom_adsp *adsp = rproc->priv;
410 return qcom_q6v5_panic(&adsp->q6v5);
413 static const struct rproc_ops adsp_ops = {
414 .unprepare = adsp_unprepare,
417 .da_to_va = adsp_da_to_va,
418 .parse_fw = qcom_register_dump_segments,
423 static const struct rproc_ops adsp_minidump_ops = {
424 .unprepare = adsp_unprepare,
427 .da_to_va = adsp_da_to_va,
430 .coredump = adsp_minidump,
433 static int adsp_init_clock(struct qcom_adsp *adsp)
437 adsp->xo = devm_clk_get(adsp->dev, "xo");
438 if (IS_ERR(adsp->xo)) {
439 ret = PTR_ERR(adsp->xo);
440 if (ret != -EPROBE_DEFER)
441 dev_err(adsp->dev, "failed to get xo clock");
445 adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
446 if (IS_ERR(adsp->aggre2_clk)) {
447 ret = PTR_ERR(adsp->aggre2_clk);
448 if (ret != -EPROBE_DEFER)
450 "failed to get aggre2 clock");
457 static int adsp_init_regulator(struct qcom_adsp *adsp)
459 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
460 if (IS_ERR(adsp->cx_supply)) {
461 if (PTR_ERR(adsp->cx_supply) == -ENODEV)
462 adsp->cx_supply = NULL;
464 return PTR_ERR(adsp->cx_supply);
468 regulator_set_load(adsp->cx_supply, 100000);
470 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
471 if (IS_ERR(adsp->px_supply)) {
472 if (PTR_ERR(adsp->px_supply) == -ENODEV)
473 adsp->px_supply = NULL;
475 return PTR_ERR(adsp->px_supply);
481 static int adsp_pds_attach(struct device *dev, struct device **devs,
491 /* Handle single power domain */
492 if (dev->pm_domain) {
494 pm_runtime_enable(dev);
498 while (pd_names[num_pds])
501 for (i = 0; i < num_pds; i++) {
502 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
503 if (IS_ERR_OR_NULL(devs[i])) {
504 ret = PTR_ERR(devs[i]) ? : -ENODATA;
512 for (i--; i >= 0; i--)
513 dev_pm_domain_detach(devs[i], false);
518 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
521 struct device *dev = adsp->dev;
524 /* Handle single power domain */
525 if (dev->pm_domain && pd_count) {
526 pm_runtime_disable(dev);
530 for (i = 0; i < pd_count; i++)
531 dev_pm_domain_detach(pds[i], false);
534 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
536 struct device_node *node;
540 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
542 dev_err(adsp->dev, "no memory-region specified\n");
546 ret = of_address_to_resource(node, 0, &r);
551 adsp->mem_phys = adsp->mem_reloc = r.start;
552 adsp->mem_size = resource_size(&r);
553 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
554 if (!adsp->mem_region) {
555 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
556 &r.start, adsp->mem_size);
560 if (!adsp->dtb_pas_id)
563 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
565 dev_err(adsp->dev, "no dtb memory-region specified\n");
569 ret = of_address_to_resource(node, 0, &r);
573 adsp->dtb_mem_phys = adsp->dtb_mem_reloc = r.start;
574 adsp->dtb_mem_size = resource_size(&r);
575 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
576 if (!adsp->dtb_mem_region) {
577 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
578 &r.start, adsp->dtb_mem_size);
585 static int adsp_assign_memory_region(struct qcom_adsp *adsp)
587 struct qcom_scm_vmperm perm;
588 struct device_node *node;
592 if (!adsp->region_assign_idx)
595 node = of_parse_phandle(adsp->dev->of_node, "memory-region", adsp->region_assign_idx);
597 dev_err(adsp->dev, "missing shareable memory-region\n");
601 ret = of_address_to_resource(node, 0, &r);
605 perm.vmid = QCOM_SCM_VMID_MSS_MSA;
606 perm.perm = QCOM_SCM_PERM_RW;
608 adsp->region_assign_phys = r.start;
609 adsp->region_assign_size = resource_size(&r);
610 adsp->region_assign_perms = BIT(QCOM_SCM_VMID_HLOS);
612 ret = qcom_scm_assign_mem(adsp->region_assign_phys,
613 adsp->region_assign_size,
614 &adsp->region_assign_perms,
617 dev_err(adsp->dev, "assign memory failed\n");
624 static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
626 struct qcom_scm_vmperm perm;
629 if (!adsp->region_assign_idx)
632 perm.vmid = QCOM_SCM_VMID_HLOS;
633 perm.perm = QCOM_SCM_PERM_RW;
635 ret = qcom_scm_assign_mem(adsp->region_assign_phys,
636 adsp->region_assign_size,
637 &adsp->region_assign_perms,
640 dev_err(adsp->dev, "unassign memory failed\n");
643 static int adsp_probe(struct platform_device *pdev)
645 const struct adsp_data *desc;
646 struct qcom_adsp *adsp;
648 const char *fw_name, *dtb_fw_name = NULL;
649 const struct rproc_ops *ops = &adsp_ops;
652 desc = of_device_get_match_data(&pdev->dev);
656 if (!qcom_scm_is_available())
657 return -EPROBE_DEFER;
659 fw_name = desc->firmware_name;
660 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
662 if (ret < 0 && ret != -EINVAL)
665 if (desc->dtb_firmware_name) {
666 dtb_fw_name = desc->dtb_firmware_name;
667 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1,
669 if (ret < 0 && ret != -EINVAL)
673 if (desc->minidump_id)
674 ops = &adsp_minidump_ops;
676 rproc = rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
679 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
683 rproc->auto_boot = desc->auto_boot;
684 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
687 adsp->dev = &pdev->dev;
689 adsp->minidump_id = desc->minidump_id;
690 adsp->pas_id = desc->pas_id;
691 adsp->info_name = desc->sysmon_name;
692 adsp->decrypt_shutdown = desc->decrypt_shutdown;
693 adsp->region_assign_idx = desc->region_assign_idx;
695 adsp->dtb_firmware_name = dtb_fw_name;
696 adsp->dtb_pas_id = desc->dtb_pas_id;
698 platform_set_drvdata(pdev, adsp);
700 ret = device_init_wakeup(adsp->dev, true);
704 ret = adsp_alloc_memory_region(adsp);
708 ret = adsp_assign_memory_region(adsp);
712 ret = adsp_init_clock(adsp);
716 ret = adsp_init_regulator(adsp);
720 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
721 desc->proxy_pd_names);
724 adsp->proxy_pd_count = ret;
726 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
729 goto detach_proxy_pds;
731 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
732 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
733 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
736 if (IS_ERR(adsp->sysmon)) {
737 ret = PTR_ERR(adsp->sysmon);
738 goto detach_proxy_pds;
741 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
742 ret = rproc_add(rproc);
744 goto detach_proxy_pds;
749 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
751 device_init_wakeup(adsp->dev, false);
757 static void adsp_remove(struct platform_device *pdev)
759 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
761 rproc_del(adsp->rproc);
763 qcom_q6v5_deinit(&adsp->q6v5);
764 adsp_unassign_memory_region(adsp);
765 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
766 qcom_remove_sysmon_subdev(adsp->sysmon);
767 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
768 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
769 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
770 device_init_wakeup(adsp->dev, false);
771 rproc_free(adsp->rproc);
774 static const struct adsp_data adsp_resource_init = {
775 .crash_reason_smem = 423,
776 .firmware_name = "adsp.mdt",
780 .sysmon_name = "adsp",
784 static const struct adsp_data sdm845_adsp_resource_init = {
785 .crash_reason_smem = 423,
786 .firmware_name = "adsp.mdt",
789 .load_state = "adsp",
791 .sysmon_name = "adsp",
795 static const struct adsp_data sm6350_adsp_resource = {
796 .crash_reason_smem = 423,
797 .firmware_name = "adsp.mdt",
800 .proxy_pd_names = (char*[]){
805 .load_state = "adsp",
807 .sysmon_name = "adsp",
811 static const struct adsp_data sm8150_adsp_resource = {
812 .crash_reason_smem = 423,
813 .firmware_name = "adsp.mdt",
816 .proxy_pd_names = (char*[]){
820 .load_state = "adsp",
822 .sysmon_name = "adsp",
826 static const struct adsp_data sm8250_adsp_resource = {
827 .crash_reason_smem = 423,
828 .firmware_name = "adsp.mdt",
831 .proxy_pd_names = (char*[]){
836 .load_state = "adsp",
838 .sysmon_name = "adsp",
842 static const struct adsp_data sm8350_adsp_resource = {
843 .crash_reason_smem = 423,
844 .firmware_name = "adsp.mdt",
847 .proxy_pd_names = (char*[]){
852 .load_state = "adsp",
854 .sysmon_name = "adsp",
858 static const struct adsp_data msm8996_adsp_resource = {
859 .crash_reason_smem = 423,
860 .firmware_name = "adsp.mdt",
863 .proxy_pd_names = (char*[]){
868 .sysmon_name = "adsp",
872 static const struct adsp_data cdsp_resource_init = {
873 .crash_reason_smem = 601,
874 .firmware_name = "cdsp.mdt",
878 .sysmon_name = "cdsp",
882 static const struct adsp_data sdm845_cdsp_resource_init = {
883 .crash_reason_smem = 601,
884 .firmware_name = "cdsp.mdt",
887 .load_state = "cdsp",
889 .sysmon_name = "cdsp",
893 static const struct adsp_data sm6350_cdsp_resource = {
894 .crash_reason_smem = 601,
895 .firmware_name = "cdsp.mdt",
898 .proxy_pd_names = (char*[]){
903 .load_state = "cdsp",
905 .sysmon_name = "cdsp",
909 static const struct adsp_data sm8150_cdsp_resource = {
910 .crash_reason_smem = 601,
911 .firmware_name = "cdsp.mdt",
914 .proxy_pd_names = (char*[]){
918 .load_state = "cdsp",
920 .sysmon_name = "cdsp",
924 static const struct adsp_data sm8250_cdsp_resource = {
925 .crash_reason_smem = 601,
926 .firmware_name = "cdsp.mdt",
929 .proxy_pd_names = (char*[]){
933 .load_state = "cdsp",
935 .sysmon_name = "cdsp",
939 static const struct adsp_data sc8280xp_nsp0_resource = {
940 .crash_reason_smem = 601,
941 .firmware_name = "cdsp.mdt",
944 .proxy_pd_names = (char*[]){
949 .sysmon_name = "cdsp",
953 static const struct adsp_data sc8280xp_nsp1_resource = {
954 .crash_reason_smem = 633,
955 .firmware_name = "cdsp.mdt",
958 .proxy_pd_names = (char*[]){
963 .sysmon_name = "cdsp1",
967 static const struct adsp_data sm8350_cdsp_resource = {
968 .crash_reason_smem = 601,
969 .firmware_name = "cdsp.mdt",
972 .proxy_pd_names = (char*[]){
977 .load_state = "cdsp",
979 .sysmon_name = "cdsp",
983 static const struct adsp_data mpss_resource_init = {
984 .crash_reason_smem = 421,
985 .firmware_name = "modem.mdt",
989 .proxy_pd_names = (char*[]){
994 .load_state = "modem",
996 .sysmon_name = "modem",
1000 static const struct adsp_data sc8180x_mpss_resource = {
1001 .crash_reason_smem = 421,
1002 .firmware_name = "modem.mdt",
1005 .proxy_pd_names = (char*[]){
1009 .load_state = "modem",
1011 .sysmon_name = "modem",
1015 static const struct adsp_data slpi_resource_init = {
1016 .crash_reason_smem = 424,
1017 .firmware_name = "slpi.mdt",
1020 .proxy_pd_names = (char*[]){
1025 .sysmon_name = "slpi",
1029 static const struct adsp_data sm8150_slpi_resource = {
1030 .crash_reason_smem = 424,
1031 .firmware_name = "slpi.mdt",
1034 .proxy_pd_names = (char*[]){
1039 .load_state = "slpi",
1041 .sysmon_name = "slpi",
1045 static const struct adsp_data sm8250_slpi_resource = {
1046 .crash_reason_smem = 424,
1047 .firmware_name = "slpi.mdt",
1050 .proxy_pd_names = (char*[]){
1055 .load_state = "slpi",
1057 .sysmon_name = "slpi",
1061 static const struct adsp_data sm8350_slpi_resource = {
1062 .crash_reason_smem = 424,
1063 .firmware_name = "slpi.mdt",
1066 .proxy_pd_names = (char*[]){
1071 .load_state = "slpi",
1073 .sysmon_name = "slpi",
1077 static const struct adsp_data wcss_resource_init = {
1078 .crash_reason_smem = 421,
1079 .firmware_name = "wcnss.mdt",
1083 .sysmon_name = "wcnss",
1087 static const struct adsp_data sdx55_mpss_resource = {
1088 .crash_reason_smem = 421,
1089 .firmware_name = "modem.mdt",
1092 .proxy_pd_names = (char*[]){
1098 .sysmon_name = "modem",
1102 static const struct adsp_data sm8450_mpss_resource = {
1103 .crash_reason_smem = 421,
1104 .firmware_name = "modem.mdt",
1108 .decrypt_shutdown = true,
1109 .proxy_pd_names = (char*[]){
1114 .load_state = "modem",
1116 .sysmon_name = "modem",
1120 static const struct adsp_data sm8550_adsp_resource = {
1121 .crash_reason_smem = 423,
1122 .firmware_name = "adsp.mdt",
1123 .dtb_firmware_name = "adsp_dtb.mdt",
1128 .proxy_pd_names = (char*[]){
1133 .load_state = "adsp",
1134 .ssr_name = "lpass",
1135 .sysmon_name = "adsp",
1139 static const struct adsp_data sm8550_cdsp_resource = {
1140 .crash_reason_smem = 601,
1141 .firmware_name = "cdsp.mdt",
1142 .dtb_firmware_name = "cdsp_dtb.mdt",
1147 .proxy_pd_names = (char*[]){
1153 .load_state = "cdsp",
1155 .sysmon_name = "cdsp",
1159 static const struct adsp_data sm8550_mpss_resource = {
1160 .crash_reason_smem = 421,
1161 .firmware_name = "modem.mdt",
1162 .dtb_firmware_name = "modem_dtb.mdt",
1167 .decrypt_shutdown = true,
1168 .proxy_pd_names = (char*[]){
1173 .load_state = "modem",
1175 .sysmon_name = "modem",
1177 .region_assign_idx = 2,
1180 static const struct of_device_id adsp_of_match[] = {
1181 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
1182 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
1183 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
1184 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
1185 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
1186 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
1187 { .compatible = "qcom,msm8998-slpi-pas", .data = &slpi_resource_init},
1188 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
1189 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
1190 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
1191 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
1192 { .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
1193 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
1194 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
1195 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
1196 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
1197 { .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
1198 { .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
1199 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
1200 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
1201 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
1202 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
1203 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
1204 { .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init},
1205 { .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource},
1206 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
1207 { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
1208 { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
1209 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
1210 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
1211 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
1212 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
1213 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
1214 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
1215 { .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource},
1216 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
1217 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
1218 { .compatible = "qcom,sm8350-slpi-pas", .data = &sm8350_slpi_resource},
1219 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
1220 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
1221 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
1222 { .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource},
1223 { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
1224 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},
1225 { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource},
1226 { .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource},
1229 MODULE_DEVICE_TABLE(of, adsp_of_match);
1231 static struct platform_driver adsp_driver = {
1232 .probe = adsp_probe,
1233 .remove_new = adsp_remove,
1235 .name = "qcom_q6v5_pas",
1236 .of_match_table = adsp_of_match,
1240 module_platform_driver(adsp_driver);
1241 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
1242 MODULE_LICENSE("GPL v2");