1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/firmware.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
17 #include <linux/of_address.h>
18 #include <linux/of_reserved_mem.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/firmware/qcom/qcom_scm.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/remoteproc.h>
25 #include <linux/soc/qcom/mdt_loader.h>
26 #include <linux/soc/qcom/smem.h>
27 #include <linux/soc/qcom/smem_state.h>
29 #include "qcom_common.h"
30 #include "qcom_pil_info.h"
31 #include "qcom_q6v5.h"
32 #include "remoteproc_internal.h"
34 #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100
37 int crash_reason_smem;
38 const char *firmware_name;
39 const char *dtb_firmware_name;
42 unsigned int minidump_id;
44 bool decrypt_shutdown;
46 char **proxy_pd_names;
48 const char *load_state;
50 const char *sysmon_name;
53 int region_assign_idx;
60 struct qcom_q6v5 q6v5;
63 struct clk *aggre2_clk;
65 struct regulator *cx_supply;
66 struct regulator *px_supply;
68 struct device *proxy_pds[3];
72 const char *dtb_firmware_name;
75 unsigned int minidump_id;
76 int crash_reason_smem;
77 bool decrypt_shutdown;
78 const char *info_name;
80 const struct firmware *firmware;
81 const struct firmware *dtb_firmware;
83 struct completion start_done;
84 struct completion stop_done;
87 phys_addr_t dtb_mem_phys;
88 phys_addr_t mem_reloc;
89 phys_addr_t dtb_mem_reloc;
90 phys_addr_t region_assign_phys;
95 size_t region_assign_size;
97 int region_assign_idx;
98 u64 region_assign_perms;
100 struct qcom_rproc_glink glink_subdev;
101 struct qcom_rproc_subdev smd_subdev;
102 struct qcom_rproc_ssr ssr_subdev;
103 struct qcom_sysmon *sysmon;
105 struct qcom_scm_pas_metadata pas_metadata;
106 struct qcom_scm_pas_metadata dtb_pas_metadata;
109 static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment,
110 void *dest, size_t offset, size_t size)
112 struct qcom_adsp *adsp = rproc->priv;
115 total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
116 if (total_offset < 0 || total_offset + size > adsp->mem_size) {
118 "invalid copy request for segment %pad with offset %zu and size %zu)\n",
119 &segment->da, offset, size);
120 memset(dest, 0xff, size);
124 memcpy_fromio(dest, adsp->mem_region + total_offset, size);
127 static void adsp_minidump(struct rproc *rproc)
129 struct qcom_adsp *adsp = rproc->priv;
131 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
134 qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
137 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
143 for (i = 0; i < pd_count; i++) {
144 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
145 ret = pm_runtime_get_sync(pds[i]);
147 pm_runtime_put_noidle(pds[i]);
148 dev_pm_genpd_set_performance_state(pds[i], 0);
149 goto unroll_pd_votes;
156 for (i--; i >= 0; i--) {
157 dev_pm_genpd_set_performance_state(pds[i], 0);
158 pm_runtime_put(pds[i]);
164 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
169 for (i = 0; i < pd_count; i++) {
170 dev_pm_genpd_set_performance_state(pds[i], 0);
171 pm_runtime_put(pds[i]);
175 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
177 unsigned int retry_num = 50;
181 msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
182 ret = qcom_scm_pas_shutdown(adsp->pas_id);
183 } while (ret == -EINVAL && --retry_num);
188 static int adsp_unprepare(struct rproc *rproc)
190 struct qcom_adsp *adsp = rproc->priv;
193 * adsp_load() did pass pas_metadata to the SCM driver for storing
194 * metadata context. It might have been released already if
195 * auth_and_reset() was successful, but in other cases clean it up
198 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
199 if (adsp->dtb_pas_id)
200 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
205 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
207 struct qcom_adsp *adsp = rproc->priv;
210 /* Store firmware handle to be used in adsp_start() */
213 if (adsp->dtb_pas_id) {
214 ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
216 dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
217 adsp->dtb_firmware_name, ret);
221 ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
222 adsp->dtb_pas_id, adsp->dtb_mem_phys,
223 &adsp->dtb_pas_metadata);
225 goto release_dtb_firmware;
227 ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
228 adsp->dtb_pas_id, adsp->dtb_mem_region,
229 adsp->dtb_mem_phys, adsp->dtb_mem_size,
230 &adsp->dtb_mem_reloc);
232 goto release_dtb_metadata;
237 release_dtb_metadata:
238 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
240 release_dtb_firmware:
241 release_firmware(adsp->dtb_firmware);
246 static int adsp_start(struct rproc *rproc)
248 struct qcom_adsp *adsp = rproc->priv;
251 ret = qcom_q6v5_prepare(&adsp->q6v5);
255 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
259 ret = clk_prepare_enable(adsp->xo);
261 goto disable_proxy_pds;
263 ret = clk_prepare_enable(adsp->aggre2_clk);
267 if (adsp->cx_supply) {
268 ret = regulator_enable(adsp->cx_supply);
270 goto disable_aggre2_clk;
273 if (adsp->px_supply) {
274 ret = regulator_enable(adsp->px_supply);
276 goto disable_cx_supply;
279 if (adsp->dtb_pas_id) {
280 ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
283 "failed to authenticate dtb image and release reset\n");
284 goto disable_px_supply;
288 ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
289 adsp->mem_phys, &adsp->pas_metadata);
291 goto disable_px_supply;
293 ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
294 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
297 goto release_pas_metadata;
299 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
301 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
304 "failed to authenticate image and release reset\n");
305 goto release_pas_metadata;
308 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
309 if (ret == -ETIMEDOUT) {
310 dev_err(adsp->dev, "start timed out\n");
311 qcom_scm_pas_shutdown(adsp->pas_id);
312 goto release_pas_metadata;
315 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
316 if (adsp->dtb_pas_id)
317 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
319 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
320 adsp->firmware = NULL;
324 release_pas_metadata:
325 qcom_scm_pas_metadata_release(&adsp->pas_metadata);
326 if (adsp->dtb_pas_id)
327 qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
330 regulator_disable(adsp->px_supply);
333 regulator_disable(adsp->cx_supply);
335 clk_disable_unprepare(adsp->aggre2_clk);
337 clk_disable_unprepare(adsp->xo);
339 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
341 qcom_q6v5_unprepare(&adsp->q6v5);
343 /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
344 adsp->firmware = NULL;
349 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
351 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
354 regulator_disable(adsp->px_supply);
356 regulator_disable(adsp->cx_supply);
357 clk_disable_unprepare(adsp->aggre2_clk);
358 clk_disable_unprepare(adsp->xo);
359 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
362 static int adsp_stop(struct rproc *rproc)
364 struct qcom_adsp *adsp = rproc->priv;
368 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
369 if (ret == -ETIMEDOUT)
370 dev_err(adsp->dev, "timed out on wait\n");
372 ret = qcom_scm_pas_shutdown(adsp->pas_id);
373 if (ret && adsp->decrypt_shutdown)
374 ret = adsp_shutdown_poll_decrypt(adsp);
377 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
379 if (adsp->dtb_pas_id) {
380 ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
382 dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
385 handover = qcom_q6v5_unprepare(&adsp->q6v5);
387 qcom_pas_handover(&adsp->q6v5);
392 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
394 struct qcom_adsp *adsp = rproc->priv;
397 offset = da - adsp->mem_reloc;
398 if (offset < 0 || offset + len > adsp->mem_size)
404 return adsp->mem_region + offset;
407 static unsigned long adsp_panic(struct rproc *rproc)
409 struct qcom_adsp *adsp = rproc->priv;
411 return qcom_q6v5_panic(&adsp->q6v5);
414 static const struct rproc_ops adsp_ops = {
415 .unprepare = adsp_unprepare,
418 .da_to_va = adsp_da_to_va,
419 .parse_fw = qcom_register_dump_segments,
424 static const struct rproc_ops adsp_minidump_ops = {
425 .unprepare = adsp_unprepare,
428 .da_to_va = adsp_da_to_va,
429 .parse_fw = qcom_register_dump_segments,
432 .coredump = adsp_minidump,
435 static int adsp_init_clock(struct qcom_adsp *adsp)
439 adsp->xo = devm_clk_get(adsp->dev, "xo");
440 if (IS_ERR(adsp->xo)) {
441 ret = PTR_ERR(adsp->xo);
442 if (ret != -EPROBE_DEFER)
443 dev_err(adsp->dev, "failed to get xo clock");
447 adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
448 if (IS_ERR(adsp->aggre2_clk)) {
449 ret = PTR_ERR(adsp->aggre2_clk);
450 if (ret != -EPROBE_DEFER)
452 "failed to get aggre2 clock");
459 static int adsp_init_regulator(struct qcom_adsp *adsp)
461 adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
462 if (IS_ERR(adsp->cx_supply)) {
463 if (PTR_ERR(adsp->cx_supply) == -ENODEV)
464 adsp->cx_supply = NULL;
466 return PTR_ERR(adsp->cx_supply);
470 regulator_set_load(adsp->cx_supply, 100000);
472 adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
473 if (IS_ERR(adsp->px_supply)) {
474 if (PTR_ERR(adsp->px_supply) == -ENODEV)
475 adsp->px_supply = NULL;
477 return PTR_ERR(adsp->px_supply);
483 static int adsp_pds_attach(struct device *dev, struct device **devs,
493 /* Handle single power domain */
494 if (dev->pm_domain) {
496 pm_runtime_enable(dev);
500 while (pd_names[num_pds])
503 for (i = 0; i < num_pds; i++) {
504 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
505 if (IS_ERR_OR_NULL(devs[i])) {
506 ret = PTR_ERR(devs[i]) ? : -ENODATA;
514 for (i--; i >= 0; i--)
515 dev_pm_domain_detach(devs[i], false);
520 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
523 struct device *dev = adsp->dev;
526 /* Handle single power domain */
527 if (dev->pm_domain && pd_count) {
528 pm_runtime_disable(dev);
532 for (i = 0; i < pd_count; i++)
533 dev_pm_domain_detach(pds[i], false);
536 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
538 struct reserved_mem *rmem;
539 struct device_node *node;
541 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
543 dev_err(adsp->dev, "no memory-region specified\n");
547 rmem = of_reserved_mem_lookup(node);
550 dev_err(adsp->dev, "unable to resolve memory-region\n");
554 adsp->mem_phys = adsp->mem_reloc = rmem->base;
555 adsp->mem_size = rmem->size;
556 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
557 if (!adsp->mem_region) {
558 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
559 &rmem->base, adsp->mem_size);
563 if (!adsp->dtb_pas_id)
566 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
568 dev_err(adsp->dev, "no dtb memory-region specified\n");
572 rmem = of_reserved_mem_lookup(node);
575 dev_err(adsp->dev, "unable to resolve dtb memory-region\n");
579 adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base;
580 adsp->dtb_mem_size = rmem->size;
581 adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
582 if (!adsp->dtb_mem_region) {
583 dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
584 &rmem->base, adsp->dtb_mem_size);
591 static int adsp_assign_memory_region(struct qcom_adsp *adsp)
593 struct reserved_mem *rmem = NULL;
594 struct qcom_scm_vmperm perm;
595 struct device_node *node;
598 if (!adsp->region_assign_idx)
601 node = of_parse_phandle(adsp->dev->of_node, "memory-region", adsp->region_assign_idx);
603 rmem = of_reserved_mem_lookup(node);
606 dev_err(adsp->dev, "unable to resolve shareable memory-region\n");
610 perm.vmid = QCOM_SCM_VMID_MSS_MSA;
611 perm.perm = QCOM_SCM_PERM_RW;
613 adsp->region_assign_phys = rmem->base;
614 adsp->region_assign_size = rmem->size;
615 adsp->region_assign_perms = BIT(QCOM_SCM_VMID_HLOS);
617 ret = qcom_scm_assign_mem(adsp->region_assign_phys,
618 adsp->region_assign_size,
619 &adsp->region_assign_perms,
622 dev_err(adsp->dev, "assign memory failed\n");
629 static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
631 struct qcom_scm_vmperm perm;
634 if (!adsp->region_assign_idx)
637 perm.vmid = QCOM_SCM_VMID_HLOS;
638 perm.perm = QCOM_SCM_PERM_RW;
640 ret = qcom_scm_assign_mem(adsp->region_assign_phys,
641 adsp->region_assign_size,
642 &adsp->region_assign_perms,
645 dev_err(adsp->dev, "unassign memory failed\n");
648 static int adsp_probe(struct platform_device *pdev)
650 const struct adsp_data *desc;
651 struct qcom_adsp *adsp;
653 const char *fw_name, *dtb_fw_name = NULL;
654 const struct rproc_ops *ops = &adsp_ops;
657 desc = of_device_get_match_data(&pdev->dev);
661 if (!qcom_scm_is_available())
662 return -EPROBE_DEFER;
664 fw_name = desc->firmware_name;
665 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
667 if (ret < 0 && ret != -EINVAL)
670 if (desc->dtb_firmware_name) {
671 dtb_fw_name = desc->dtb_firmware_name;
672 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1,
674 if (ret < 0 && ret != -EINVAL)
678 if (desc->minidump_id)
679 ops = &adsp_minidump_ops;
681 rproc = rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
684 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
688 rproc->auto_boot = desc->auto_boot;
689 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
692 adsp->dev = &pdev->dev;
694 adsp->minidump_id = desc->minidump_id;
695 adsp->pas_id = desc->pas_id;
696 adsp->info_name = desc->sysmon_name;
697 adsp->decrypt_shutdown = desc->decrypt_shutdown;
698 adsp->region_assign_idx = desc->region_assign_idx;
700 adsp->dtb_firmware_name = dtb_fw_name;
701 adsp->dtb_pas_id = desc->dtb_pas_id;
703 platform_set_drvdata(pdev, adsp);
705 ret = device_init_wakeup(adsp->dev, true);
709 ret = adsp_alloc_memory_region(adsp);
713 ret = adsp_assign_memory_region(adsp);
717 ret = adsp_init_clock(adsp);
721 ret = adsp_init_regulator(adsp);
725 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
726 desc->proxy_pd_names);
729 adsp->proxy_pd_count = ret;
731 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
734 goto detach_proxy_pds;
736 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
737 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
738 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
741 if (IS_ERR(adsp->sysmon)) {
742 ret = PTR_ERR(adsp->sysmon);
743 goto detach_proxy_pds;
746 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
747 ret = rproc_add(rproc);
749 goto detach_proxy_pds;
754 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
756 device_init_wakeup(adsp->dev, false);
762 static void adsp_remove(struct platform_device *pdev)
764 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
766 rproc_del(adsp->rproc);
768 qcom_q6v5_deinit(&adsp->q6v5);
769 adsp_unassign_memory_region(adsp);
770 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
771 qcom_remove_sysmon_subdev(adsp->sysmon);
772 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
773 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
774 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
775 device_init_wakeup(adsp->dev, false);
776 rproc_free(adsp->rproc);
779 static const struct adsp_data adsp_resource_init = {
780 .crash_reason_smem = 423,
781 .firmware_name = "adsp.mdt",
785 .sysmon_name = "adsp",
789 static const struct adsp_data sdm845_adsp_resource_init = {
790 .crash_reason_smem = 423,
791 .firmware_name = "adsp.mdt",
794 .load_state = "adsp",
796 .sysmon_name = "adsp",
800 static const struct adsp_data sm6350_adsp_resource = {
801 .crash_reason_smem = 423,
802 .firmware_name = "adsp.mdt",
805 .proxy_pd_names = (char*[]){
810 .load_state = "adsp",
812 .sysmon_name = "adsp",
816 static const struct adsp_data sm8150_adsp_resource = {
817 .crash_reason_smem = 423,
818 .firmware_name = "adsp.mdt",
821 .proxy_pd_names = (char*[]){
825 .load_state = "adsp",
827 .sysmon_name = "adsp",
831 static const struct adsp_data sm8250_adsp_resource = {
832 .crash_reason_smem = 423,
833 .firmware_name = "adsp.mdt",
836 .proxy_pd_names = (char*[]){
841 .load_state = "adsp",
843 .sysmon_name = "adsp",
847 static const struct adsp_data sm8350_adsp_resource = {
848 .crash_reason_smem = 423,
849 .firmware_name = "adsp.mdt",
852 .proxy_pd_names = (char*[]){
857 .load_state = "adsp",
859 .sysmon_name = "adsp",
863 static const struct adsp_data msm8996_adsp_resource = {
864 .crash_reason_smem = 423,
865 .firmware_name = "adsp.mdt",
868 .proxy_pd_names = (char*[]){
873 .sysmon_name = "adsp",
877 static const struct adsp_data cdsp_resource_init = {
878 .crash_reason_smem = 601,
879 .firmware_name = "cdsp.mdt",
883 .sysmon_name = "cdsp",
887 static const struct adsp_data sdm845_cdsp_resource_init = {
888 .crash_reason_smem = 601,
889 .firmware_name = "cdsp.mdt",
892 .load_state = "cdsp",
894 .sysmon_name = "cdsp",
898 static const struct adsp_data sm6350_cdsp_resource = {
899 .crash_reason_smem = 601,
900 .firmware_name = "cdsp.mdt",
903 .proxy_pd_names = (char*[]){
908 .load_state = "cdsp",
910 .sysmon_name = "cdsp",
914 static const struct adsp_data sm8150_cdsp_resource = {
915 .crash_reason_smem = 601,
916 .firmware_name = "cdsp.mdt",
919 .proxy_pd_names = (char*[]){
923 .load_state = "cdsp",
925 .sysmon_name = "cdsp",
929 static const struct adsp_data sm8250_cdsp_resource = {
930 .crash_reason_smem = 601,
931 .firmware_name = "cdsp.mdt",
934 .proxy_pd_names = (char*[]){
938 .load_state = "cdsp",
940 .sysmon_name = "cdsp",
944 static const struct adsp_data sc8280xp_nsp0_resource = {
945 .crash_reason_smem = 601,
946 .firmware_name = "cdsp.mdt",
949 .proxy_pd_names = (char*[]){
954 .sysmon_name = "cdsp",
958 static const struct adsp_data sc8280xp_nsp1_resource = {
959 .crash_reason_smem = 633,
960 .firmware_name = "cdsp.mdt",
963 .proxy_pd_names = (char*[]){
968 .sysmon_name = "cdsp1",
972 static const struct adsp_data sm8350_cdsp_resource = {
973 .crash_reason_smem = 601,
974 .firmware_name = "cdsp.mdt",
977 .proxy_pd_names = (char*[]){
982 .load_state = "cdsp",
984 .sysmon_name = "cdsp",
988 static const struct adsp_data mpss_resource_init = {
989 .crash_reason_smem = 421,
990 .firmware_name = "modem.mdt",
994 .proxy_pd_names = (char*[]){
999 .load_state = "modem",
1001 .sysmon_name = "modem",
1005 static const struct adsp_data sc8180x_mpss_resource = {
1006 .crash_reason_smem = 421,
1007 .firmware_name = "modem.mdt",
1010 .proxy_pd_names = (char*[]){
1014 .load_state = "modem",
1016 .sysmon_name = "modem",
1020 static const struct adsp_data msm8996_slpi_resource_init = {
1021 .crash_reason_smem = 424,
1022 .firmware_name = "slpi.mdt",
1025 .proxy_pd_names = (char*[]){
1030 .sysmon_name = "slpi",
1034 static const struct adsp_data sdm845_slpi_resource_init = {
1035 .crash_reason_smem = 424,
1036 .firmware_name = "slpi.mdt",
1039 .proxy_pd_names = (char*[]){
1044 .load_state = "slpi",
1046 .sysmon_name = "slpi",
1050 static const struct adsp_data wcss_resource_init = {
1051 .crash_reason_smem = 421,
1052 .firmware_name = "wcnss.mdt",
1056 .sysmon_name = "wcnss",
1060 static const struct adsp_data sdx55_mpss_resource = {
1061 .crash_reason_smem = 421,
1062 .firmware_name = "modem.mdt",
1065 .proxy_pd_names = (char*[]){
1071 .sysmon_name = "modem",
1075 static const struct adsp_data sm8450_mpss_resource = {
1076 .crash_reason_smem = 421,
1077 .firmware_name = "modem.mdt",
1081 .decrypt_shutdown = true,
1082 .proxy_pd_names = (char*[]){
1087 .load_state = "modem",
1089 .sysmon_name = "modem",
1093 static const struct adsp_data sm8550_adsp_resource = {
1094 .crash_reason_smem = 423,
1095 .firmware_name = "adsp.mdt",
1096 .dtb_firmware_name = "adsp_dtb.mdt",
1101 .proxy_pd_names = (char*[]){
1106 .load_state = "adsp",
1107 .ssr_name = "lpass",
1108 .sysmon_name = "adsp",
1112 static const struct adsp_data sm8550_cdsp_resource = {
1113 .crash_reason_smem = 601,
1114 .firmware_name = "cdsp.mdt",
1115 .dtb_firmware_name = "cdsp_dtb.mdt",
1120 .proxy_pd_names = (char*[]){
1126 .load_state = "cdsp",
1128 .sysmon_name = "cdsp",
1132 static const struct adsp_data sm8550_mpss_resource = {
1133 .crash_reason_smem = 421,
1134 .firmware_name = "modem.mdt",
1135 .dtb_firmware_name = "modem_dtb.mdt",
1140 .decrypt_shutdown = true,
1141 .proxy_pd_names = (char*[]){
1146 .load_state = "modem",
1148 .sysmon_name = "modem",
1150 .region_assign_idx = 2,
1153 static const struct of_device_id adsp_of_match[] = {
1154 { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
1155 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
1156 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
1157 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
1158 { .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init},
1159 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
1160 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8996_slpi_resource_init},
1161 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
1162 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
1163 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
1164 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
1165 { .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
1166 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
1167 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
1168 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
1169 { .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
1170 { .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
1171 { .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
1172 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
1173 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
1174 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
1175 { .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init},
1176 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
1177 { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
1178 { .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init},
1179 { .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource},
1180 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
1181 { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
1182 { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
1183 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
1184 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
1185 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
1186 { .compatible = "qcom,sm8150-slpi-pas", .data = &sdm845_slpi_resource_init},
1187 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
1188 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
1189 { .compatible = "qcom,sm8250-slpi-pas", .data = &sdm845_slpi_resource_init},
1190 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
1191 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
1192 { .compatible = "qcom,sm8350-slpi-pas", .data = &sdm845_slpi_resource_init},
1193 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
1194 { .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
1195 { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
1196 { .compatible = "qcom,sm8450-slpi-pas", .data = &sdm845_slpi_resource_init},
1197 { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
1198 { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},
1199 { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource},
1200 { .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource},
1203 MODULE_DEVICE_TABLE(of, adsp_of_match);
1205 static struct platform_driver adsp_driver = {
1206 .probe = adsp_probe,
1207 .remove_new = adsp_remove,
1209 .name = "qcom_q6v5_pas",
1210 .of_match_table = adsp_of_match,
1214 module_platform_driver(adsp_driver);
1215 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
1216 MODULE_LICENSE("GPL v2");