1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/firmware.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_domain.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/qcom_scm.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/remoteproc.h>
23 #include <linux/soc/qcom/mdt_loader.h>
24 #include <linux/soc/qcom/smem.h>
25 #include <linux/soc/qcom/smem_state.h>
27 #include "qcom_common.h"
28 #include "qcom_pil_info.h"
29 #include "qcom_q6v5.h"
30 #include "remoteproc_internal.h"
33 int crash_reason_smem;
34 const char *firmware_name;
36 unsigned int minidump_id;
40 char **active_pd_names;
41 char **proxy_pd_names;
44 const char *sysmon_name;
52 struct qcom_q6v5 q6v5;
55 struct clk *aggre2_clk;
57 struct regulator *cx_supply;
58 struct regulator *px_supply;
60 struct device *active_pds[1];
61 struct device *proxy_pds[3];
67 unsigned int minidump_id;
68 int crash_reason_smem;
70 const char *info_name;
72 struct completion start_done;
73 struct completion stop_done;
76 phys_addr_t mem_reloc;
80 struct qcom_rproc_glink glink_subdev;
81 struct qcom_rproc_subdev smd_subdev;
82 struct qcom_rproc_ssr ssr_subdev;
83 struct qcom_sysmon *sysmon;
86 static void adsp_minidump(struct rproc *rproc)
88 struct qcom_adsp *adsp = rproc->priv;
90 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
93 qcom_minidump(rproc, adsp->minidump_id);
96 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
102 for (i = 0; i < pd_count; i++) {
103 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
104 ret = pm_runtime_get_sync(pds[i]);
106 pm_runtime_put_noidle(pds[i]);
107 dev_pm_genpd_set_performance_state(pds[i], 0);
108 goto unroll_pd_votes;
115 for (i--; i >= 0; i--) {
116 dev_pm_genpd_set_performance_state(pds[i], 0);
117 pm_runtime_put(pds[i]);
123 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
128 for (i = 0; i < pd_count; i++) {
129 dev_pm_genpd_set_performance_state(pds[i], 0);
130 pm_runtime_put(pds[i]);
134 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
136 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
139 ret = qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
140 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
145 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
150 static int adsp_start(struct rproc *rproc)
152 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
155 qcom_q6v5_prepare(&adsp->q6v5);
157 ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count);
161 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
163 goto disable_active_pds;
165 ret = clk_prepare_enable(adsp->xo);
167 goto disable_proxy_pds;
169 ret = clk_prepare_enable(adsp->aggre2_clk);
173 ret = regulator_enable(adsp->cx_supply);
175 goto disable_aggre2_clk;
177 ret = regulator_enable(adsp->px_supply);
179 goto disable_cx_supply;
181 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
184 "failed to authenticate image and release reset\n");
185 goto disable_px_supply;
188 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
189 if (ret == -ETIMEDOUT) {
190 dev_err(adsp->dev, "start timed out\n");
191 qcom_scm_pas_shutdown(adsp->pas_id);
192 goto disable_px_supply;
198 regulator_disable(adsp->px_supply);
200 regulator_disable(adsp->cx_supply);
202 clk_disable_unprepare(adsp->aggre2_clk);
204 clk_disable_unprepare(adsp->xo);
206 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
208 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
210 qcom_q6v5_unprepare(&adsp->q6v5);
215 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
217 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
219 regulator_disable(adsp->px_supply);
220 regulator_disable(adsp->cx_supply);
221 clk_disable_unprepare(adsp->aggre2_clk);
222 clk_disable_unprepare(adsp->xo);
223 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
226 static int adsp_stop(struct rproc *rproc)
228 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
232 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
233 if (ret == -ETIMEDOUT)
234 dev_err(adsp->dev, "timed out on wait\n");
236 ret = qcom_scm_pas_shutdown(adsp->pas_id);
238 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
240 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count);
241 handover = qcom_q6v5_unprepare(&adsp->q6v5);
243 qcom_pas_handover(&adsp->q6v5);
248 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
250 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
253 offset = da - adsp->mem_reloc;
254 if (offset < 0 || offset + len > adsp->mem_size)
257 return adsp->mem_region + offset;
260 static unsigned long adsp_panic(struct rproc *rproc)
262 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
264 return qcom_q6v5_panic(&adsp->q6v5);
267 static const struct rproc_ops adsp_ops = {
270 .da_to_va = adsp_da_to_va,
271 .parse_fw = qcom_register_dump_segments,
276 static const struct rproc_ops adsp_minidump_ops = {
279 .da_to_va = adsp_da_to_va,
282 .coredump = adsp_minidump,
285 static int adsp_init_clock(struct qcom_adsp *adsp)
289 adsp->xo = devm_clk_get(adsp->dev, "xo");
290 if (IS_ERR(adsp->xo)) {
291 ret = PTR_ERR(adsp->xo);
292 if (ret != -EPROBE_DEFER)
293 dev_err(adsp->dev, "failed to get xo clock");
297 if (adsp->has_aggre2_clk) {
298 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
299 if (IS_ERR(adsp->aggre2_clk)) {
300 ret = PTR_ERR(adsp->aggre2_clk);
301 if (ret != -EPROBE_DEFER)
303 "failed to get aggre2 clock");
311 static int adsp_init_regulator(struct qcom_adsp *adsp)
313 adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
314 if (IS_ERR(adsp->cx_supply))
315 return PTR_ERR(adsp->cx_supply);
317 regulator_set_load(adsp->cx_supply, 100000);
319 adsp->px_supply = devm_regulator_get(adsp->dev, "px");
320 return PTR_ERR_OR_ZERO(adsp->px_supply);
323 static int adsp_pds_attach(struct device *dev, struct device **devs,
333 /* Handle single power domain */
334 if (dev->pm_domain) {
336 pm_runtime_enable(dev);
340 while (pd_names[num_pds])
343 for (i = 0; i < num_pds; i++) {
344 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
345 if (IS_ERR_OR_NULL(devs[i])) {
346 ret = PTR_ERR(devs[i]) ? : -ENODATA;
354 for (i--; i >= 0; i--)
355 dev_pm_domain_detach(devs[i], false);
360 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
363 struct device *dev = adsp->dev;
366 /* Handle single power domain */
367 if (dev->pm_domain && pd_count) {
368 pm_runtime_disable(dev);
372 for (i = 0; i < pd_count; i++)
373 dev_pm_domain_detach(pds[i], false);
376 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
378 struct device_node *node;
382 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
384 dev_err(adsp->dev, "no memory-region specified\n");
388 ret = of_address_to_resource(node, 0, &r);
392 adsp->mem_phys = adsp->mem_reloc = r.start;
393 adsp->mem_size = resource_size(&r);
394 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
395 if (!adsp->mem_region) {
396 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
397 &r.start, adsp->mem_size);
404 static int adsp_probe(struct platform_device *pdev)
406 const struct adsp_data *desc;
407 struct qcom_adsp *adsp;
410 const struct rproc_ops *ops = &adsp_ops;
413 desc = of_device_get_match_data(&pdev->dev);
417 if (!qcom_scm_is_available())
418 return -EPROBE_DEFER;
420 fw_name = desc->firmware_name;
421 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
423 if (ret < 0 && ret != -EINVAL)
426 if (desc->minidump_id)
427 ops = &adsp_minidump_ops;
429 rproc = rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
432 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
436 rproc->auto_boot = desc->auto_boot;
437 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
439 adsp = (struct qcom_adsp *)rproc->priv;
440 adsp->dev = &pdev->dev;
442 adsp->minidump_id = desc->minidump_id;
443 adsp->pas_id = desc->pas_id;
444 adsp->has_aggre2_clk = desc->has_aggre2_clk;
445 adsp->info_name = desc->sysmon_name;
446 platform_set_drvdata(pdev, adsp);
448 device_wakeup_enable(adsp->dev);
450 ret = adsp_alloc_memory_region(adsp);
454 ret = adsp_init_clock(adsp);
458 ret = adsp_init_regulator(adsp);
462 ret = adsp_pds_attach(&pdev->dev, adsp->active_pds,
463 desc->active_pd_names);
466 adsp->active_pd_count = ret;
468 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
469 desc->proxy_pd_names);
471 goto detach_active_pds;
472 adsp->proxy_pd_count = ret;
474 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
477 goto detach_proxy_pds;
479 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
480 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
481 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
482 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
485 if (IS_ERR(adsp->sysmon)) {
486 ret = PTR_ERR(adsp->sysmon);
487 goto detach_proxy_pds;
490 ret = rproc_add(rproc);
492 goto detach_proxy_pds;
497 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
499 adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count);
501 device_init_wakeup(adsp->dev, false);
507 static int adsp_remove(struct platform_device *pdev)
509 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
511 rproc_del(adsp->rproc);
513 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
514 qcom_remove_sysmon_subdev(adsp->sysmon);
515 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
516 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
517 device_init_wakeup(adsp->dev, false);
518 rproc_free(adsp->rproc);
523 static const struct adsp_data adsp_resource_init = {
524 .crash_reason_smem = 423,
525 .firmware_name = "adsp.mdt",
527 .has_aggre2_clk = false,
530 .sysmon_name = "adsp",
534 static const struct adsp_data sm8150_adsp_resource = {
535 .crash_reason_smem = 423,
536 .firmware_name = "adsp.mdt",
538 .has_aggre2_clk = false,
540 .active_pd_names = (char*[]){
544 .proxy_pd_names = (char*[]){
549 .sysmon_name = "adsp",
553 static const struct adsp_data sm8250_adsp_resource = {
554 .crash_reason_smem = 423,
555 .firmware_name = "adsp.mdt",
557 .has_aggre2_clk = false,
559 .active_pd_names = (char*[]){
563 .proxy_pd_names = (char*[]){
569 .sysmon_name = "adsp",
573 static const struct adsp_data sm8350_adsp_resource = {
574 .crash_reason_smem = 423,
575 .firmware_name = "adsp.mdt",
577 .has_aggre2_clk = false,
579 .active_pd_names = (char*[]){
583 .proxy_pd_names = (char*[]){
589 .sysmon_name = "adsp",
593 static const struct adsp_data msm8998_adsp_resource = {
594 .crash_reason_smem = 423,
595 .firmware_name = "adsp.mdt",
597 .has_aggre2_clk = false,
599 .proxy_pd_names = (char*[]){
604 .sysmon_name = "adsp",
608 static const struct adsp_data cdsp_resource_init = {
609 .crash_reason_smem = 601,
610 .firmware_name = "cdsp.mdt",
612 .has_aggre2_clk = false,
615 .sysmon_name = "cdsp",
619 static const struct adsp_data sm8150_cdsp_resource = {
620 .crash_reason_smem = 601,
621 .firmware_name = "cdsp.mdt",
623 .has_aggre2_clk = false,
625 .active_pd_names = (char*[]){
629 .proxy_pd_names = (char*[]){
634 .sysmon_name = "cdsp",
638 static const struct adsp_data sm8250_cdsp_resource = {
639 .crash_reason_smem = 601,
640 .firmware_name = "cdsp.mdt",
642 .has_aggre2_clk = false,
644 .active_pd_names = (char*[]){
648 .proxy_pd_names = (char*[]){
653 .sysmon_name = "cdsp",
657 static const struct adsp_data sm8350_cdsp_resource = {
658 .crash_reason_smem = 601,
659 .firmware_name = "cdsp.mdt",
661 .has_aggre2_clk = false,
663 .active_pd_names = (char*[]){
667 .proxy_pd_names = (char*[]){
673 .sysmon_name = "cdsp",
677 static const struct adsp_data mpss_resource_init = {
678 .crash_reason_smem = 421,
679 .firmware_name = "modem.mdt",
682 .has_aggre2_clk = false,
684 .active_pd_names = (char*[]){
688 .proxy_pd_names = (char*[]){
694 .sysmon_name = "modem",
698 static const struct adsp_data sc8180x_mpss_resource = {
699 .crash_reason_smem = 421,
700 .firmware_name = "modem.mdt",
702 .has_aggre2_clk = false,
704 .active_pd_names = (char*[]){
708 .proxy_pd_names = (char*[]){
713 .sysmon_name = "modem",
717 static const struct adsp_data slpi_resource_init = {
718 .crash_reason_smem = 424,
719 .firmware_name = "slpi.mdt",
721 .has_aggre2_clk = true,
724 .sysmon_name = "slpi",
728 static const struct adsp_data sm8150_slpi_resource = {
729 .crash_reason_smem = 424,
730 .firmware_name = "slpi.mdt",
732 .has_aggre2_clk = false,
734 .active_pd_names = (char*[]){
738 .proxy_pd_names = (char*[]){
744 .sysmon_name = "slpi",
748 static const struct adsp_data sm8250_slpi_resource = {
749 .crash_reason_smem = 424,
750 .firmware_name = "slpi.mdt",
752 .has_aggre2_clk = false,
754 .active_pd_names = (char*[]){
758 .proxy_pd_names = (char*[]){
764 .sysmon_name = "slpi",
768 static const struct adsp_data sm8350_slpi_resource = {
769 .crash_reason_smem = 424,
770 .firmware_name = "slpi.mdt",
772 .has_aggre2_clk = false,
774 .active_pd_names = (char*[]){
778 .proxy_pd_names = (char*[]){
784 .sysmon_name = "slpi",
788 static const struct adsp_data msm8998_slpi_resource = {
789 .crash_reason_smem = 424,
790 .firmware_name = "slpi.mdt",
792 .has_aggre2_clk = true,
794 .proxy_pd_names = (char*[]){
799 .sysmon_name = "slpi",
803 static const struct adsp_data wcss_resource_init = {
804 .crash_reason_smem = 421,
805 .firmware_name = "wcnss.mdt",
809 .sysmon_name = "wcnss",
813 static const struct adsp_data sdx55_mpss_resource = {
814 .crash_reason_smem = 421,
815 .firmware_name = "modem.mdt",
817 .has_aggre2_clk = false,
819 .proxy_pd_names = (char*[]){
825 .sysmon_name = "modem",
829 static const struct of_device_id adsp_of_match[] = {
830 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
831 { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init},
832 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
833 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8998_adsp_resource},
834 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8998_slpi_resource},
835 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
836 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
837 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
838 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
839 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
840 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
841 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
842 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
843 { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init},
844 { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init},
845 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
846 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
847 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
848 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
849 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
850 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
851 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
852 { .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource},
853 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
854 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
855 { .compatible = "qcom,sm8350-slpi-pas", .data = &sm8350_slpi_resource},
856 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
859 MODULE_DEVICE_TABLE(of, adsp_of_match);
861 static struct platform_driver adsp_driver = {
863 .remove = adsp_remove,
865 .name = "qcom_q6v5_pas",
866 .of_match_table = adsp_of_match,
870 module_platform_driver(adsp_driver);
871 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
872 MODULE_LICENSE("GPL v2");