2 * Copyright (C) 2013 Spreadtrum Communications Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 * 0.2 unprotect dcdc/ldo before turn on and off
16 * remove dcdc/ldo calibration
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/version.h>
25 #include <linux/spinlock.h>
26 #include <linux/debugfs.h>
27 #include <linux/slab.h>
28 #include <linux/sort.h>
29 #include <linux/delay.h>
30 #include <linux/err.h>
32 #include <linux/platform_device.h>
35 #include <linux/of_device.h>
36 #include <linux/of_address.h>
37 #include <linux/regulator/of_regulator.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/regulator/driver.h>
41 #include <linux/regulator/machine.h>
43 #include <soc/sprd/sci.h>
44 #include <soc/sprd/sci_glb_regs.h>
45 #include <soc/sprd/adi.h>
46 #include <soc/sprd/adc.h>
48 #define REGULATOR_ROOT_DIR "sprd-regulator"
51 #define debug(format, arg...) pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
52 #define debug0(format, arg...) //pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
53 #define debug2(format, arg...) pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
56 #define ANA_REG_OR(_r, _b) sci_adi_write(_r, _b, 0)
60 #define ANA_REG_BIC(_r, _b) sci_adi_write(_r, 0, _b)
64 #define ANA_REG_GET(_r) sci_adi_read(_r)
68 #define ANA_REG_SET(_r, _v, _m) sci_adi_write((_r), ((_v) & (_m)), (_m))
70 #define CONFIG_REGULATOR_ADC_DEBUG
71 struct sci_regulator_regs {
72 int typ; /* BIT4: default on/off(0: off, 1: on); BIT0~BIT3: dcdc/ldo type(0: ldo; 2: dcdc) */
76 unsigned long pwr_sel; /* otp pwr select reg */
77 u32 pwr_sel_bit; /* 0: otp enable(from emmc), 1: otp disable(from sw register) */
78 unsigned long vol_trm;
80 unsigned long cal_ctl;
81 u32 cal_ctl_bits, cal_chan;
82 u32 min_uV, max_uV, step_uV;
85 unsigned long vol_ctl;
91 struct sci_regulator_data {
92 struct regulator_dev *rdev;
95 struct sci_regulator_desc {
96 struct regulator_desc desc;
97 struct regulator_init_data *init_data;
98 struct sci_regulator_regs regs;
99 struct sci_regulator_data data; /* FIXME: dynamic */
100 #if defined(CONFIG_DEBUG_FS)
101 struct dentry *debugfs;
113 #define REGU_VERIFY_DLY (1000) /*ms */
115 static u32 dcdc_vol_select[] = { 1100000, 700000, 800000, 900000, 1000000, 650000, 1200000, 1300000 }; /* uV */
117 static struct sci_regulator_desc *sci_desc_list = NULL;
119 static atomic_t idx = ATOMIC_INIT(1); /* 0: dummy */
121 static u32 ana_chip_id;
122 static u16 ana_mixed_ctl, otp_pwr_sel;
124 static DEFINE_MUTEX(adc_chan_mutex);
125 static int regulator_get_trimming_step(struct regulator_dev *rdev, int to_vol);
126 static int __is_valid_adc_cal(void);
128 #ifdef CONFIG_OTP_SPRD_EFUSE
129 extern int sci_efuse_get_cal(unsigned int * pdata, int num);
131 int sci_efuse_get_cal(unsigned int * pdata, int num){return 0;}
134 static int get_regu_offset(struct regulator_dev *rdev, int des_uV);
136 static struct sci_regulator_desc *__get_desc(struct regulator_dev *rdev)
138 return (struct sci_regulator_desc *)rdev->desc;
141 /* standard ldo ops*/
142 static int ldo_turn_on(struct regulator_dev *rdev)
144 struct sci_regulator_desc *desc = __get_desc(rdev);
145 struct sci_regulator_regs *regs = &desc->regs;
147 debug0("regu 0x%p (%s), power down 0x%08x[%d]\n", regs,
148 desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit));
150 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
151 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE,
152 BITS_PWR_WR_PROT_VALUE(0x6e7f));
155 ANA_REG_BIC(regs->pd_set, regs->pd_set_bit);
157 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
158 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE, 0);
160 debug("regu 0x%p (%s), turn on\n", regs, desc->desc.name);
164 static int ldo_turn_off(struct regulator_dev *rdev)
166 struct sci_regulator_desc *desc = __get_desc(rdev);
167 struct sci_regulator_regs *regs = &desc->regs;
169 debug0("regu 0x%p (%s), power down 0x%08x[%d]\n", regs,
170 desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit));
172 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
173 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
174 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE,
175 BITS_PWR_WR_PROT_VALUE(0x6e7f));
178 ANA_REG_OR(regs->pd_set, regs->pd_set_bit);
180 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
181 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE, 0);
185 debug("regu 0x%p (%s), turn off\n", regs, desc->desc.name);
189 static int ldo_is_on(struct regulator_dev *rdev)
192 struct sci_regulator_desc *desc = __get_desc(rdev);
193 struct sci_regulator_regs *regs = &desc->regs;
195 debug0("regu 0x%p (%s), power down 0x%08x[%d]\n", regs,
196 desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit));
199 ret = !(ANA_REG_GET(regs->pd_set) & regs->pd_set_bit);
202 debug2("regu 0x%p (%s) turn on, return %d\n", regs, desc->desc.name,
207 static int ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
210 struct sci_regulator_desc *desc = __get_desc(rdev);
211 struct sci_regulator_regs *regs = &desc->regs;
213 debug("regu 0x%p (%s), slp 0x%08x[%d] mode %x\n", regs, desc->desc.name,
214 regs->slp_ctl, regs->slp_ctl_bit, mode);
219 if (mode == REGULATOR_MODE_STANDBY) { /* disable auto slp */
220 ANA_REG_BIC(regs->slp_ctl, regs->slp_ctl_bit);
222 ANA_REG_OR(regs->slp_ctl, regs->slp_ctl_bit);
229 static int ldo_set_voltage(struct regulator_dev *rdev, int min_uV,
230 int max_uV, unsigned *selector)
232 struct sci_regulator_desc *desc = __get_desc(rdev);
233 struct sci_regulator_regs *regs = &desc->regs;
234 //int mv = min_uV / 1000;
237 debug("regu 0x%p (%s) set voltage, %d(uV) %d(uV)\n", regs,
238 desc->desc.name, min_uV, max_uV);
240 min_uV += get_regu_offset(rdev, min_uV);
242 if(min_uV < regs->min_uV){
243 debug("warning: regulator (%s) target voltage %d lower than min_uV,modify target to min_uV %d(uV)\n",desc->desc.name, min_uV,regs->min_uV);
244 min_uV = regs->min_uV;
247 if(min_uV > regs->max_uV){
248 debug("warning: regulator (%s) target voltage %d higher than max_uV,modify target to max_uV %d(uV)\n",desc->desc.name, min_uV,regs->max_uV);
249 min_uV = regs->max_uV;
253 int shft = __ffs(regs->vol_trm_bits);
255 DIV_ROUND_UP((int)(min_uV - regs->min_uV), regs->step_uV);
257 ret = trim > (regs->vol_trm_bits >> shft);
259 "warning: regulator (%s) not support %d(uV)\n",
260 desc->desc.name, min_uV);
263 ANA_REG_SET(regs->vol_trm,
264 trim << shft, regs->vol_trm_bits);
271 static int ldo_get_voltage(struct regulator_dev *rdev)
273 struct sci_regulator_desc *desc = __get_desc(rdev);
274 struct sci_regulator_regs *regs = &desc->regs;
277 debug0("regu 0x%p (%s), vol trm 0x%08x, mask 0x%08x\n",
278 regs, desc->desc.name, regs->vol_trm, regs->vol_trm_bits);
281 int shft = __ffs(regs->vol_trm_bits);
283 (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >> shft;
284 vol = regs->min_uV + trim * regs->step_uV;
285 debug2("regu 0x%p (%s), voltage %d\n", regs, desc->desc.name,
293 #ifdef CONFIG_OTP_SPRD_ADIE_EFUSE
294 extern u32 __adie_efuse_read(int blk_index);
295 extern int sci_otp_get_offset(const char *name);
297 u32 __adie_efuse_read(int blk_index) {return 0;}
298 int sci_otp_get_offset(const char *name){return 0;}
301 static int get_regu_offset(struct regulator_dev *rdev, int des_uV)
303 struct sci_regulator_desc *desc = __get_desc(rdev);
304 struct sci_regulator_regs *regs = &desc->regs;
307 if ((desc->regs.typ & BIT(4)))
310 delta = (des_uV/1000) * regs->otp_delta / ((int)regs->vol_def/1000);
311 delta *=(int)regs->step_uV;
316 static int set_regu_offset(struct regulator_dev *rdev)
318 struct sci_regulator_desc *desc = __get_desc(rdev);
319 struct sci_regulator_regs *regs = &desc->regs;
320 const char *regu_name = desc->desc.name;
323 if (NULL == regu_name)
325 rdev->constraints->uV_offset = 0;
326 efuse_data = sci_otp_get_offset(regu_name);
327 regs->otp_delta = efuse_data;
328 debug("%s otp delta: %d, voltage offset: %d(uV)\n", desc->desc.name,
329 efuse_data, rdev->constraints->uV_offset);
331 /* switch sw register control from otp emmc only for vddmem/vdd25 */
332 if ((0 == strcmp(regu_name, "vddmem"))
333 || (0 == strcmp(regu_name, "vdd25"))) {
335 int shft = __ffs(regs->vol_trm_bits);
340 (ANA_REG_GET(regs->vol_trm) &
341 regs->vol_trm_bits) >> shft;
343 ANA_REG_SET(regs->vol_trm,
344 trim << shft, regs->vol_trm_bits);
347 /* set pwr sel bit for sw control */
348 ANA_REG_OR(regs->pwr_sel, regs->pwr_sel_bit);
355 /* FIXME: get dcdc cal offset config from uboot */
361 static void __iomem *spl_start_base = NULL;
363 #if defined(CONFIG_ARCH_SCX35L)
364 #define SPRD_SPL_PHYS ( 0x50003000 )
366 #define SPRD_SPL_PHYS ( 0x50005000 )
368 #define SPRD_SPL_SIZE ( SZ_32K )
369 #define PP_VOL_PARA ( SPRD_SPL_PHYS + 0xC20 ) /* assert in iram2 */
370 #define TO_IRAM2(_p_) ( (unsigned long)spl_start_base + (unsigned long)(_p_) - SPRD_SPL_PHYS )
371 #define IN_IRAM2(_p_) ( (unsigned long)(_p_) >= SPRD_SPL_PHYS && (unsigned long)(_p_) < SPRD_SPL_PHYS + SPRD_SPL_SIZE )
373 int regulator_default_get(const char con_id[])
376 vol_para_t *pvol_para =
377 (vol_para_t *) __raw_readl((void *)TO_IRAM2(PP_VOL_PARA));
378 debug0("pvol_para phy_addr 0x%08x\n", pvol_para);
380 if (!(IN_IRAM2(pvol_para)))
383 pvol_para = (vol_para_t *) TO_IRAM2(pvol_para);
384 debug0("pvol_para vir_addr 0x%08x\n", pvol_para);
385 if (strcmp((pvol_para)[0].name, "volpara_begin")
386 || (0xfaed != (pvol_para)[0].ideal_vol))
389 while (0 != strcmp((pvol_para)[i++].name, "volpara_end")) {
390 if (0 == strcmp((pvol_para)[i].name, con_id)) {
391 debug("%s name %s, ideal_vol %d\n", __func__,
392 (pvol_para)[i].name, (pvol_para)[i].ideal_vol);
393 return res = (pvol_para)[i].ideal_vol;
399 static int __init_trimming(struct regulator_dev *rdev)
401 struct sci_regulator_desc *desc = __get_desc(rdev);
402 struct sci_regulator_regs *regs = &desc->regs;
404 uint otp_ana_flag = 0;
409 if (!__is_valid_adc_cal())
412 otp_ana_flag = (u8) __adie_efuse_read(0);
413 debug("emmeory block(0) data %#x\n", otp_ana_flag);;
414 if (!(otp_ana_flag & BIT(7))) {
415 set_regu_offset(rdev);
418 to_vol = regulator_default_get(desc->desc.name);
421 to_vol = regs->vol_def;
423 if (to_vol && rdev->desc->ops->get_voltage) {
424 ctl_vol = rdev->desc->ops->get_voltage(rdev);
425 rdev->constraints->uV_offset = ctl_vol - to_vol; //uV
426 debug("regu 0x%p (%s), uV offset %d\n", regs,
427 desc->desc.name, rdev->constraints->uV_offset);
434 static int regulator_get_trimming_step(struct regulator_dev *rdev, int to_vol)
436 struct sci_regulator_desc *desc = __get_desc(rdev);
437 struct sci_regulator_regs *regs = &desc->regs;
439 BUG_ON(!regs->step_uV);
441 return regs->step_uV;
444 static int __match_dcdc_vol(struct sci_regulator_regs *regs, u32 vol)
447 int ds, min_ds = 100 * 1000; /* uV, the max range of small voltage */
449 for (i = 0; i < regs->vol_sel_cnt; i++) {
450 ds = vol - regs->vol_sel[i];
451 if (ds >= 0 && ds < min_ds) {
459 static int __dcdc_enable_time(struct regulator_dev *rdev, int old_vol)
461 int vol = rdev->desc->ops->get_voltage(rdev);
463 /* FIXME: for dcdc, each step (50mV) takes 10us */
464 int dly = (vol - old_vol) * 10 / (50 * 1000);
471 static int dcdc_set_voltage(struct regulator_dev *rdev, int min_uV,
472 int max_uV, unsigned *selector)
474 struct sci_regulator_desc *desc = __get_desc(rdev);
475 struct sci_regulator_regs *regs = &desc->regs;
477 //int mV = min_uV / 1000;
478 int old_vol = rdev->desc->ops->get_voltage(rdev);
480 debug0("regu 0x%p (%s) %d %d\n", regs, desc->desc.name, min_uV, max_uV);
483 /* found the closely vol ctrl bits */
484 i = __match_dcdc_vol(regs, min_uV);
487 "not found %s closely ctrl bits for %d(uV)\n",
488 desc->desc.name, min_uV);
490 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
491 /* dcdc calibration control bits (default 00000),
492 * small adjust voltage: 100/32mv ~= 3.125mv
495 int shft_trm = __ffs(regs->vol_trm_bits);
501 shft_ctl = __ffs(regs->vol_ctl_bits);
502 step = regulator_get_trimming_step(rdev, 0);
504 j = DIV_ROUND_UP((int)(min_uV - (int)regs->vol_sel[i]),
507 debug("regu 0x%p (%s) %d = %d %+duV(trim %#x)\n", regs,
508 desc->desc.name, min_uV, regs->vol_sel[i],
509 min_uV - regs->vol_sel[i], j);
511 j = DIV_ROUND_UP((int)(min_uV - regs->min_uV),
514 debug("regu 0x%p (%s) %d = %d %+duV(trim %#x)\n", regs,
515 desc->desc.name, min_uV, regs->min_uV,
516 min_uV - regs->min_uV, j);
519 BUG_ON(j > (regs->vol_trm_bits >> shft_trm));
521 if (regs->vol_trm == regs->vol_ctl) {
522 ANA_REG_SET(regs->vol_ctl,
523 (j << shft_trm) | (i << shft_ctl),
524 regs->vol_trm_bits | regs->vol_ctl_bits);
526 if (regs->vol_trm) { /* small adjust first */
527 ANA_REG_SET(regs->vol_trm, j << shft_trm,
532 ANA_REG_SET(regs->vol_ctl, i << shft_ctl,
538 __dcdc_enable_time(rdev, old_vol);
544 static int dcdc_set_voltage_step(struct regulator_dev *rdev, int min_uV,
545 int max_uV, unsigned *selector)
548 int step = 25 * 1000; /*uV */
549 int vol = rdev->desc->ops->get_voltage(rdev);
550 struct sci_regulator_desc *desc = __get_desc(rdev);
551 struct sci_regulator_regs *regs = &desc->regs;
553 to_vol += get_regu_offset(rdev, min_uV);
554 to_vol -= regs->hide_offset*1000;
556 if(to_vol < regs->min_uV){
557 debug("warning: regulator (%s) target voltage %d lower than min_uV,modify target to min_uV %d(uV)\n",desc->desc.name, to_vol,regs->min_uV);
558 to_vol = regs->min_uV;
561 if(to_vol > regs->max_uV){
562 debug("warning: regulator (%s) target voltage %d higher than max_uV,modify target to max_uV %d(uV)\n",desc->desc.name, to_vol,regs->max_uV);
563 to_vol = regs->max_uV;
567 do { /*FIXME: dcdc sw step up for eliminate overshoot (+65mV) */
571 dcdc_set_voltage(rdev, vol, vol, selector);
572 } while (vol < to_vol);
578 dcdc_set_voltage(rdev, vol, vol, selector);
579 } while (vol > to_vol);
584 static int dcdc_get_voltage(struct regulator_dev *rdev)
586 struct sci_regulator_desc *desc = __get_desc(rdev);
587 struct sci_regulator_regs *regs = &desc->regs;
589 int i, cal = 0 /* uV */ ;
592 int shft_ctl = __ffs(regs->vol_ctl_bits);
593 int shft_trm = __ffs(regs->vol_trm_bits);
596 ("regu 0x%p (%s), vol ctl 0x%08x, shft %d, mask 0x%08x, sel %d\n",
597 regs, desc->desc.name, regs->vol_ctl, shft_ctl,
598 regs->vol_ctl_bits, regs->vol_sel_cnt);
600 i = (ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >>
602 uV = regs->vol_sel[i];
606 (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >>
608 cal *= regulator_get_trimming_step(rdev, 0); /* uV */
611 } else if (regs->vol_trm) {
612 int shft_trm = __ffs(regs->vol_trm_bits);
614 (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >>
616 uV = regs->min_uV + trim * regs->step_uV;
619 uV += regs->hide_offset*1000;
620 debug2("%s get voltage, %d +%duv\n", desc->desc.name, uV, cal);
622 return (uV + cal) /*uV */ ;
626 /* standard boost ops*/
627 #define MAX_CURRENT_SINK (500) /*FIXME: max current sink */
628 static int boost_set_current_limit(struct regulator_dev *rdev, int min_uA,
631 struct sci_regulator_desc *desc = __get_desc(rdev);
632 struct sci_regulator_regs *regs = &desc->regs;
633 int ma = min_uA / 1000;
635 int i, shft = __ffs(regs->vol_ctl_bits);
636 int trim = (int)regs->vol_def / (1000 * 1000);
637 int steps = (regs->vol_ctl_bits >> shft) + 1;
639 debug("regu 0x%p (%s) %d %d\n", regs, desc->desc.name, min_uA, max_uA);
645 trim <<= __ffs(regs->vol_trm_bits);
648 i = ma * steps / MAX_CURRENT_SINK;
649 if (i >= 0 && i < steps) {
650 ANA_REG_SET(regs->vol_ctl, (i << shft) | trim,
651 regs->vol_ctl_bits | regs->vol_trm_bits);
657 "warning: regulator (%s) not support %dmA\n", desc->desc.name, ma);
663 static int boost_get_current_limit(struct regulator_dev *rdev)
665 struct sci_regulator_desc *desc = __get_desc(rdev);
666 struct sci_regulator_regs *regs = &desc->regs;
668 int i, shft = __ffs(regs->vol_ctl_bits);
669 int steps = (regs->vol_ctl_bits >> shft) + 1;
671 debug0("regu 0x%p (%s), vol ctl 0x%08x, shft %d, mask 0x%08x\n",
672 regs, desc->desc.name, regs->vol_ctl, shft, regs->vol_ctl_bits);
677 i = ((ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft);
678 cur = i * MAX_CURRENT_SINK / steps;
679 debug("regu 0x%p (%s) get current %d\n", regs, desc->desc.name, cur);
683 static int adc_sample_bit = 1; /*12bits mode */
684 static short adc_data[3][2]
685 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
687 {4200, 3387}, /* same as nv adc_t */
689 {400, 316}, /* 0.4@VBAT, Reserved IdealC Value */
694 static int __is_valid_adc_cal(void)
696 return 0 != adc_data[0][0];
699 static int __init __adc_cal_setup(char *str)
701 u32 *p = (u32 *) adc_data;
702 *p = simple_strtoul(str, &str, 0);
703 if (*p++ && *++str) {
704 *p = simple_strtoul(str, &str, 0);
706 debug("%d : %d -- %d : %d\n",
707 (int)adc_data[0][0], (int)adc_data[0][1],
708 (int)adc_data[1][0], (int)adc_data[1][1]);
709 if (adc_data[0][1] < BIT(10)
710 && adc_data[1][1] < BIT(10))
711 adc_sample_bit = 0; /*10bits mode */
718 early_param("adc_cal", __adc_cal_setup);
720 static int __init __adc_cal_fuse_setup(void)
722 if (!__is_valid_adc_cal() &&
723 (0 == sci_efuse_get_cal((u32 *) adc_data, 2))) {
724 debug("%d : %d -- %d : %d\n",
725 (int)adc_data[0][0], (int)adc_data[0][1],
726 (int)adc_data[1][0], (int)adc_data[1][1]);
732 static int __adc2vbat(int adc_res)
734 int t = adc_data[0][0] - adc_data[1][0];
735 t *= (adc_res - adc_data[0][1]);
736 t /= (adc_data[0][1] - adc_data[1][1]);
741 #define MEASURE_TIMES (15)
743 static void __dump_adc_result(u32 adc_val[])
745 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
747 for (i = 0; i < MEASURE_TIMES; i++) {
748 printk("%d ", adc_val[i]);
754 static int cmp_val(const void *a, const void *b)
756 return *(int *)a - *(int *)b;
760 * __adc_voltage - get regulator output voltage through auxadc
761 * @regulator: regulator source
763 * This returns the current regulator voltage in mV.
765 * NOTE: If the regulator is disabled it will return the voltage value. This
766 * function should not be used to determine regulator state.
768 static int regu_adc_voltage(struct regulator_dev *rdev)
770 struct sci_regulator_desc *desc = __get_desc(rdev);
771 struct sci_regulator_regs *regs = &desc->regs;
773 int ret, adc_chan = regs->cal_chan;
774 u16 ldo_cal_sel = regs->cal_ctl_bits & 0xFFFF;
775 u32 adc_res, adc_val[MEASURE_TIMES];
776 u32 ratio = 1, chan_numerators = 1, chan_denominators = 1;
777 u32 bat_numerators, bat_denominators;
779 struct adc_sample_data data = {
780 .channel_id = adc_chan,
781 .channel_type = 0, /*sw */
782 .hw_channel_delay = 0, /*reserved */
783 .scale = (((adc_chan != 13) && (adc_chan != 14)) ? 1 : 0), /* chanel = 13/14: small scale, others: big scale */
785 .sample_num = MEASURE_TIMES,
786 .sample_bits = adc_sample_bit,
787 .sample_speed = 0, /*quick mode */
788 .signal_mode = 0, /*resistance path */
791 if (!__is_valid_adc_cal())
797 /* enable ldo cal before adc sampling and ldo calibration */
799 mutex_lock(&adc_chan_mutex);
800 ANA_REG_OR(regs->cal_ctl, ldo_cal_sel);
801 debug0("%s adc channel %d : %04x\n",
802 desc->desc.name, data.channel_id, ldo_cal_sel);
805 ret = sci_adc_get_values(&data);
808 /* close ldo cal and release multiplexed aux adc channel */
810 ANA_REG_BIC(regs->cal_ctl, ldo_cal_sel);
811 mutex_unlock(&adc_chan_mutex);
814 __dump_adc_result(adc_val);
815 sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
816 /*__dump_adc_result(adc_val);*/
819 (u32) sci_adc_get_ratio(data.channel_id, data.scale, ldo_cal_sel);
820 chan_numerators = ratio >> 16;
821 chan_denominators = ratio & 0xFFFF;
823 ratio = (u32) sci_adc_get_ratio(ADC_CHANNEL_VBAT, 1, 0);
824 bat_numerators = ratio >> 16;
825 bat_denominators = ratio & 0xFFFF;
827 adc_res = adc_val[MEASURE_TIMES / 2];
828 debug("%s adc channel %d : 0x%04x, ratio (%d/%d), result value %d\n",
829 desc->desc.name, data.channel_id, ldo_cal_sel,
830 chan_numerators, chan_denominators, adc_res);
835 return __adc2vbat(adc_res)
836 * (bat_numerators * chan_denominators)
837 / (bat_denominators * chan_numerators);
841 * regulator_strongly_disable - strongly disable regulator output
842 * @regulator: regulator source
844 * Strongly try disable the regulator output voltage or current.
845 * NOTE: this *will* disable the regulator output even if other consumer
846 * devices have it enabled. This should be used for situations when device
847 * had unbalanced with calls to regulator_enable().
848 * *Not* recommended to call this function before try to balance the use_count.
850 int regulator_strongly_disable(struct regulator *regulator)
852 struct regulator_dev *rdev = regulator_get_drvdata(regulator);
856 while (rdev->use_count--)
857 regulator_disable(regulator);
862 EXPORT_SYMBOL_GPL(regulator_strongly_disable);
864 static struct regulator_ops ldo_ops = {
865 .enable = ldo_turn_on,
866 .disable = ldo_turn_off,
867 .is_enabled = ldo_is_on,
868 .set_voltage = ldo_set_voltage,
869 .get_voltage = ldo_get_voltage,
870 .set_mode = ldo_set_mode,
873 static struct regulator_ops dcdc_ops = {
874 .enable = ldo_turn_on,
875 .disable = ldo_turn_off,
876 .is_enabled = ldo_is_on,
877 .set_voltage = dcdc_set_voltage_step,
878 .get_voltage = dcdc_get_voltage,
881 static struct regulator_ops boost_ops = {
882 .enable = ldo_turn_on,
883 .disable = ldo_turn_off,
884 .is_enabled = ldo_is_on,
885 .set_current_limit = boost_set_current_limit,
886 .get_current_limit = boost_get_current_limit,
887 .set_mode = ldo_set_mode,
891 * Consider the following machine :-
893 * Regulator-1 -+-> [Consumer A @ 1.8V]
895 * +-> [Consumer B @ 1.8V]
897 * Regulator-2 ---> [Consumer C @ 3.3V]
899 * The drivers for consumers A & B must be mapped to the correct regulator in
900 * order to control their power supply. This mapping can be achieved in board/machine
901 * initialisation code by creating a struct regulator_consumer_supply for each regulator.
902 * Alternatively, we built a regulator supply-consumers map, the format is as follow:
904 * supply source-1, consumer A, consumer B, ..., NULL
905 * supply source-2, consumer C, ..., NULL
910 static struct regulator_consumer_supply *set_supply_map(struct device *dev,
911 const char *supply_name,
914 char **map = (char **)dev_get_platdata(dev);
916 struct regulator_consumer_supply *consumer_supplies = NULL;
918 if (!supply_name || !(map && map[0]))
921 for (i = 0; map[i] || map[i + 1]; i++) {
922 if (map[i] && 0 == strcmp(map[i], supply_name))
926 /* i++; *//* Do not skip supply name */
928 for (n = 0; map[i + n]; n++) ;
931 debug0("supply %s consumers %d - %d\n", supply_name, i, n);
933 kzalloc(n * sizeof(*consumer_supplies), GFP_KERNEL);
934 BUG_ON(!consumer_supplies);
935 for (n = 0; map[i]; i++, n++) {
936 consumer_supplies[n].supply = map[i];
941 return consumer_supplies;
944 #if defined(CONFIG_DEBUG_FS)
945 static struct dentry *debugfs_root = NULL;
947 static u32 ana_addr = 0;
948 static int debugfs_ana_addr_get(void *data, u64 * val)
950 if (ana_addr < PAGE_SIZE) {
951 *val = ANA_REG_GET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK));
953 void *addr = ioremap(ana_addr, PAGE_SIZE);
954 *val = __raw_readl(addr);
960 static int debugfs_ana_addr_set(void *data, u64 val)
962 if (ana_addr < PAGE_SIZE) {
963 ANA_REG_SET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK), val,
966 void *addr = ioremap(ana_addr, PAGE_SIZE);
967 __raw_writel(val, addr);
973 static int adc_chan = 5 /*VBAT*/;
974 static int debugfs_adc_chan_get(void *pdata, u64 * val)
977 u32 adc_res, adc_val[MEASURE_TIMES];
978 struct adc_sample_data data = {
979 .channel_id = adc_chan,
980 .channel_type = 0, /*sw */
981 .hw_channel_delay = 0, /*reserved */
982 .scale = 1, /*big scale */
984 .sample_num = MEASURE_TIMES,
985 .sample_bits = adc_sample_bit,
986 .sample_speed = 0, /*quick mode */
987 .signal_mode = 0, /*resistance path */
990 ret = sci_adc_get_values(&data);
993 for (i = 0; i < MEASURE_TIMES; i++) {
994 printk("%d ", adc_val[i]);
998 sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
999 adc_res = adc_val[MEASURE_TIMES / 2];
1000 pr_info("adc chan %d, result value %d, vbat %d\n",
1001 data.channel_id, adc_res, __adc2vbat(adc_res));
1006 static int debugfs_adc_chan_set(void *data, u64 val)
1012 static int debugfs_enable_get(void *data, u64 * val)
1014 struct regulator_dev *rdev = data;
1015 if (rdev && rdev->desc->ops->is_enabled)
1016 *val = rdev->desc->ops->is_enabled(rdev);
1022 static int debugfs_enable_set(void *data, u64 val)
1024 struct regulator_dev *rdev = data;
1025 if (rdev && rdev->desc->ops->enable)
1026 (val) ? rdev->desc->ops->enable(rdev)
1027 : rdev->desc->ops->disable(rdev);
1031 static int debugfs_voltage_get(void *data, u64 * val)
1033 struct regulator_dev *rdev = data;
1035 *val = regu_adc_voltage(rdev);
1041 static int debugfs_voltage_set(void *data, u64 val)
1043 struct regulator_dev *rdev = data;
1045 if (rdev && rdev->desc->ops->set_voltage) {
1046 min_uV = (u32)val * 1000;
1047 min_uV += rdev->constraints->uV_offset;
1048 rdev->desc->ops->set_voltage(rdev, min_uV, min_uV, 0);
1053 static int debugfs_boost_get(void *data, u64 * val)
1055 struct regulator_dev *rdev = data;
1056 if (rdev && rdev->desc->ops->get_current_limit)
1057 *val = rdev->desc->ops->get_current_limit(rdev) / 1000;
1063 static int debugfs_boost_set(void *data, u64 val)
1065 struct regulator_dev *rdev = data;
1066 if (rdev && rdev->desc->ops->set_current_limit)
1067 rdev->desc->ops->set_current_limit(rdev, val * 1000,
1072 DEFINE_SIMPLE_ATTRIBUTE(fops_ana_addr,
1073 debugfs_ana_addr_get, debugfs_ana_addr_set, "%llu\n");
1074 DEFINE_SIMPLE_ATTRIBUTE(fops_adc_chan,
1075 debugfs_adc_chan_get, debugfs_adc_chan_set, "%llu\n");
1076 DEFINE_SIMPLE_ATTRIBUTE(fops_enable,
1077 debugfs_enable_get, debugfs_enable_set, "%llu\n");
1078 DEFINE_SIMPLE_ATTRIBUTE(fops_ldo,
1079 debugfs_voltage_get, debugfs_voltage_set, "%llu\n");
1080 DEFINE_SIMPLE_ATTRIBUTE(fops_boost,
1081 debugfs_boost_get, debugfs_boost_set, "%llu\n");
1083 static void rdev_init_debugfs(struct regulator_dev *rdev)
1085 struct sci_regulator_desc *desc = __get_desc(rdev);
1086 desc->debugfs = debugfs_create_dir(rdev->desc->name, debugfs_root);
1087 if (IS_ERR_OR_NULL(rdev->debugfs)) {
1088 pr_warn("Failed to create debugfs directory\n");
1089 rdev->debugfs = NULL;
1093 debugfs_create_file("enable", S_IRUGO | S_IWUSR,
1094 desc->debugfs, rdev, &fops_enable);
1096 if (desc->desc.type == REGULATOR_CURRENT)
1097 debugfs_create_file("current", S_IRUGO | S_IWUSR,
1098 desc->debugfs, rdev, &fops_boost);
1100 debugfs_create_file("voltage", S_IRUGO | S_IWUSR,
1101 desc->debugfs, rdev, &fops_ldo);
1104 static void rdev_init_debugfs(struct regulator_dev *rdev)
1109 static inline int __strcmp(const char *cs, const char *ct)
1114 return strcmp(cs, ct);
1117 static struct of_device_id sprd_regulator_of_match[] = {
1118 {.compatible = "sprd,sc2723-regulator",},
1122 #undef REGS_ANA_GLB_BASE
1123 #ifndef REGS_ANA_GLB_BASE
1124 #define REGS_ANA_GLB_PHYS (SPRD_ADI_PHYS + 0x8800)
1125 #define REGS_ANA_GLB_BASE (SPRD_ADI_BASE + 0x8800)
1126 #define REGS_ANA_GLB_SIZE (SZ_2K) //0x40038800 ~ 0x40039000
1129 #define IS_VALID_ANA_ADDR(pa, pa_base, size) ( (pa) >= (pa_base) && (pa) < (pa_base) + (size) )
1130 #define PHY_TO_VIR(pa, pa_base, va_base) ( (pa) - (pa_base) + (va_base) )
1132 static unsigned long phy2vir(const u32 reg_phy)
1134 unsigned long reg_vir = 0;
1139 if (IS_VALID_ANA_ADDR(reg_phy, REGS_ANA_GLB_PHYS, REGS_ANA_GLB_SIZE)) {
1142 long)(PHY_TO_VIR(reg_phy, REGS_ANA_GLB_PHYS,
1143 REGS_ANA_GLB_BASE));
1145 WARN(1, "reg(0x%08x) physical address is invalid!\n", reg_phy);
1151 static int reconfig_regulator(struct sci_regulator_desc *desc)
1153 struct sci_regulator_regs *regs = &desc->regs;
1155 /* Fixme: Config DCDC linear/no linear control
1156 * accoring to BIT14 of Reg(0x40038800 + 0x0118)
1158 if (ana_mixed_ctl & BIT_DCDC_V_CTRL_MODE) {
1159 /* dcdc linear control */
1160 if ((0 == strcmp(desc->desc.name, "vddcore"))
1161 || (0 == strcmp(desc->desc.name, "vddarm"))) {
1163 regs->vol_ctl_bits = 0;
1166 /* dcdc Non-linear control */
1167 if ((0 == strcmp(desc->desc.name, "vddcore"))
1168 || (0 == strcmp(desc->desc.name, "vddarm"))) {
1169 regs->vol_ctl = regs->vol_trm;
1170 regs->vol_trm_bits =
1171 (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4));
1172 regs->vol_ctl_bits = (BIT(5) | BIT(6) | BIT(7));
1173 regs->vol_sel_cnt = ARRAY_SIZE(dcdc_vol_select);
1174 regs->vol_sel = dcdc_vol_select;
1181 static int of_regu_read_reg(struct device_node *np, int idx,
1182 struct sci_regulator_regs *regs)
1191 cell = of_get_property(np, "reg", &count);
1194 WARN_ON(idx >= count);
1196 cell = of_get_address(np, idx, NULL, NULL);
1199 case 0: /* ldo/dcdc power down */
1201 reg_phy = (u32) be32_to_cpu(*(cell++));
1202 regs->pd_set = phy2vir(reg_phy);
1203 regs->pd_set_bit = (u32) be32_to_cpu(*(cell++));
1205 ("reg(%s) pd_set phy addr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x\n",
1206 np->name, reg_phy, regs->pd_set, regs->pd_set_bit);
1209 case 1: /* ldo/dcdc voltage trim */
1211 reg_phy = (u32) be32_to_cpu(*(cell++));
1212 regs->vol_trm = phy2vir(reg_phy);
1213 regs->vol_trm_bits = (u32) be32_to_cpu(*(cell++));
1215 ("reg(%s) vol_trm phy addr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x\n",
1216 np->name, reg_phy, regs->vol_trm,
1217 regs->vol_trm_bits);
1220 case 2: /* otp pwr select */
1222 reg_phy = (u32) be32_to_cpu(*(cell++));
1223 regs->pwr_sel = phy2vir(reg_phy);
1224 regs->pwr_sel_bit = (u32) be32_to_cpu(*(cell++));
1226 ("reg(%s) otp_pwr_sel phy addr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x\n",
1227 np->name, reg_phy, regs->pwr_sel,
1238 static int sci_regulator_parse_dt(struct platform_device *pdev,
1239 struct device_node *np,
1240 struct sci_regulator_desc *desc,
1241 struct regulator_consumer_supply *supply,
1244 struct sci_regulator_regs *regs = &desc->regs;
1246 u32 data[8] = { 0 };
1248 int type = 0, cnt = 0, ret = 0;
1250 if (!pdev || !np || !desc || !supply) {
1254 desc->desc.name = np->name;
1255 desc->desc.id = (atomic_inc_return(&idx) - 1);
1256 desc->desc.type = REGULATOR_VOLTAGE;
1257 desc->desc.owner = THIS_MODULE;
1259 supply[0].dev_name = NULL;
1260 supply[0].supply = np->name;
1261 desc->init_data = of_get_regulator_init_data(&pdev->dev, np);
1262 if (!desc->init_data
1263 || 0 != __strcmp(desc->init_data->constraints.name, np->name)) {
1265 "failed to parse regulator(%s) init data! \n",
1270 desc->init_data->supply_regulator = 0;
1271 desc->init_data->constraints.valid_modes_mask =
1272 REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1273 desc->init_data->constraints.valid_ops_mask =
1274 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS |
1275 REGULATOR_CHANGE_VOLTAGE;
1276 desc->init_data->num_consumer_supplies = sz;
1278 desc->init_data->consumer_supplies =
1279 set_supply_map(&pdev->dev, desc->desc.name,
1280 &desc->init_data->num_consumer_supplies);
1282 if (!desc->init_data->consumer_supplies)
1283 desc->init_data->consumer_supplies = supply;
1285 /* Fill struct sci_regulator_regs variable desc->regs */
1286 type = (of_property_read_bool(np, "dcdc") ? 2 : 0);
1289 if (of_property_read_bool(np, "default-on"))
1290 regs->typ |= BIT(4);
1292 of_regu_read_reg(np, 0, regs);
1293 of_regu_read_reg(np, 1, regs);
1294 of_regu_read_reg(np, 2, regs);
1296 regs->min_uV = desc->init_data->constraints.min_uV;
1297 regs->max_uV = desc->init_data->constraints.max_uV;
1300 of_property_read_u32(np, "regulator-step-microvolt", &tmp_val_u32);
1302 regs->step_uV = tmp_val_u32;
1305 of_property_read_u32(np, "regulator-default-microvolt",
1308 regs->vol_def = tmp_val_u32;
1310 ret = of_property_read_u32(np, "hide-offset", &tmp_val_u32);
1312 regs->hide_offset = ((int)tmp_val_u32 - 1000);/*base value is 1000*/
1314 debug("[%d] %s type %d, range %d(uV) - %d(uV), step %d(uV), default %d(uV) - (%s)\n", (idx.counter - 1),
1315 np->name, type, desc->init_data->constraints.min_uV, desc->init_data->constraints.max_uV,
1316 regs->step_uV, regs->vol_def, (regs->typ & BIT(4)) ? "on" : "off");
1319 tmp = of_get_property(np, "regulator-cal-channel", &cnt);
1323 of_property_read_u32_array(np, "regulator-cal-channel",
1326 regs->cal_ctl = phy2vir(data[0]);
1327 regs->cal_ctl_bits = data[1];
1328 regs->cal_chan = data[2];
1332 ("cal_ctl (phyaddr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x, chan: %d)\n",
1333 data[0], regs->cal_ctl, regs->cal_ctl_bits,
1337 tmp = of_get_property(np, "regulator-selects", &cnt);
1339 debug0("prop regulator-selects count(%d)\n", cnt);
1342 of_property_read_u32_array(np, "regulator-selects", data,
1347 /* Dynamically allocate memory for voltage select array */
1349 kzalloc(cnt * sizeof(*regs->vol_sel), GFP_KERNEL);
1350 if (!regs->vol_sel) {
1352 ("%s() failed to allocate memory for voltage select\n",
1357 regs->vol_sel_cnt = cnt;
1358 for (i = 0; i < cnt; i++) {
1359 regs->vol_sel[i] = data[i];
1368 static int sci_regulator_register_dt(struct platform_device *pdev)
1370 struct sci_regulator_desc *sci_desc = NULL;
1372 struct regulator_dev *rdev;
1373 struct regulator_ops *__regs_ops[] = {
1374 &ldo_ops, 0, &dcdc_ops, 0 /*lpref_ops */ , &boost_ops, 0,
1376 struct regulator_consumer_supply consumer_supplies_default[1] = { };
1377 struct regulator_config config = { };
1379 struct device_node *dev_np = pdev->dev.of_node;
1380 struct device_node *child_np;
1381 int regu_cnt = 0, ret = 0;
1383 regu_cnt = of_get_child_count(dev_np);
1387 regu_cnt -= 1; /* exclude dummy node */
1390 devm_kzalloc(&pdev->dev,
1391 regu_cnt * sizeof(struct sci_regulator_desc),
1393 if (!sci_desc_list) {
1395 "failed allocate memory for sci_regulator_desc list\n");
1398 sci_desc = sci_desc_list;
1401 ("regulators desc list 0x%p, count %d, sci_regulator_desc size %d\n",
1402 sci_desc, regu_cnt, sizeof(struct sci_regulator_desc));
1404 for_each_child_of_node(dev_np, child_np) {
1405 if (0 == strcmp(child_np->name, "dummy")) /* skip dummy node */
1409 if(0 == strcmp(child_np->name, "vddbigarm"))
1412 ret = sci_regulator_parse_dt(pdev, child_np, sci_desc, consumer_supplies_default, ARRAY_SIZE(consumer_supplies_default));
1414 dev_err(&pdev->dev, "failed to parse regulator(%s) dts\n", child_np->name);
1418 reconfig_regulator(sci_desc);
1420 BUG_ON((sci_desc->regs.typ & (BIT(4) - 1)) >=
1421 ARRAY_SIZE(__regs_ops));
1422 if (!sci_desc->desc.ops)
1423 sci_desc->desc.ops =
1424 __regs_ops[sci_desc->regs.typ & (BIT(4) - 1)];
1426 config.dev = &pdev->dev;
1427 config.init_data = sci_desc->init_data;
1428 config.driver_data = NULL;
1429 config.of_node = child_np;
1430 rdev = regulator_register(&sci_desc->desc, &config);
1432 debug0("regulator_desc 0x%p, rdev 0x%p\n", &sci_desc->desc,
1435 if (sci_desc->init_data->consumer_supplies !=
1436 consumer_supplies_default)
1437 kfree(sci_desc->init_data->consumer_supplies);
1439 if (!IS_ERR_OR_NULL(rdev)) {
1440 rdev->reg_data = rdev;
1441 sci_desc->data.rdev = rdev;
1442 __init_trimming(rdev);
1443 rdev_init_debugfs(rdev);
1454 * spreadtrum power regulators is intergrated on the chip, include LDOs and DCDCs.
1455 * so i autogen all regulators non-variable description in plat or mach directory,
1456 * which named __xxxx_regulator_map.h, BUT register all in regulator driver probe func,
1457 * just like other regulator vendor drivers.
1459 static int sci_regulator_probe(struct platform_device *pdev)
1461 #ifdef CONFIG_DEBUG_FS
1462 debugfs_root = debugfs_create_dir(REGULATOR_ROOT_DIR, NULL);
1463 if (IS_ERR_OR_NULL(debugfs_root)) {
1465 "%s: Failed to create debugfs directory\n",
1466 REGULATOR_ROOT_DIR);
1467 debugfs_root = NULL;
1470 /* compatible with 8810 adc test */
1471 debugfs_create_u32("ana_addr", S_IRUGO | S_IWUSR,
1472 debugfs_root, (u32 *) & ana_addr);
1473 debugfs_create_file("ana_valu", S_IRUGO | S_IWUSR,
1474 debugfs_root, &ana_addr, &fops_ana_addr);
1475 debugfs_create_file("adc_chan", S_IRUGO | S_IWUSR,
1476 debugfs_root, &adc_chan, &fops_adc_chan);
1477 debugfs_create_u64("adc_data", S_IRUGO | S_IWUSR,
1478 debugfs_root, (u64 *) & adc_data);
1480 { /* vddarm/vddcore/vddmem common debugfs interface */
1482 struct dentry *vol_root = debugfs_create_dir("vol", NULL);
1483 sprintf(str, "../%s/vddarm/voltage", REGULATOR_ROOT_DIR);
1484 debugfs_create_symlink("dcdcarm", vol_root, str);
1485 sprintf(str, "../%s/vddcore/voltage", REGULATOR_ROOT_DIR);
1486 debugfs_create_symlink("dcdccore", vol_root, str);
1487 sprintf(str, "../%s/vddmem/voltage", REGULATOR_ROOT_DIR);
1488 debugfs_create_symlink("dcdcmem", vol_root, str);
1492 ana_chip_id = ((u32) ANA_REG_GET(ANA_REG_GLB_CHIP_ID_HIGH) << 16) |
1493 ((u32) ANA_REG_GET(ANA_REG_GLB_CHIP_ID_LOW) & 0xFFFF);
1494 ana_mixed_ctl = ANA_REG_GET(ANA_REG_GLB_MIXED_CTRL0);
1495 otp_pwr_sel = ANA_REG_GET(ANA_REG_GLB_PWR_SEL);
1498 ("sc272x ana chipid:(0x%08x), ana_mixed_ctl:(0x%08x), otp_sel:(0x%08x)\n",
1499 ana_chip_id, ana_mixed_ctl, otp_pwr_sel);
1501 spl_start_base = ioremap(SPRD_SPL_PHYS, 0x8000);
1502 if (spl_start_base) {
1503 pr_info("%s remap iram phy addr(%#x) to vir addr (0x%p) ok!\n",
1504 __func__, SPRD_SPL_PHYS, spl_start_base);
1506 pr_info("%s remap iram phy addr(%#x) error!\n", __func__,
1510 sci_regulator_register_dt(pdev);
1512 if (spl_start_base) {
1513 iounmap(spl_start_base);
1514 spl_start_base = NULL;
1520 static int sci_regulator_remove(struct platform_device *pdev)
1522 if (sci_desc_list) {
1523 if (sci_desc_list->init_data) {
1524 kfree(sci_desc_list->init_data);
1526 kfree(sci_desc_list);
1532 static struct platform_driver sci_regulator_driver = {
1534 .name = "sc2723-regulator",
1535 .owner = THIS_MODULE,
1536 .of_match_table = of_match_ptr(sprd_regulator_of_match),
1538 .probe = sci_regulator_probe,
1539 .remove = sci_regulator_remove
1542 static int __init regu_driver_init(void)
1544 __adc_cal_fuse_setup();
1546 return platform_driver_register(&sci_regulator_driver);
1549 int __init sci_regulator_init(void)
1552 return of_platform_populate(of_find_node_by_path("/sprd-regulators"),
1553 sprd_regulator_of_match, NULL, NULL);
1559 subsys_initcall(regu_driver_init);
1561 MODULE_LICENSE("GPL v2");
1562 MODULE_DESCRIPTION("Spreadtrum voltage regulator driver");
1563 MODULE_AUTHOR("kevin <ronghua.yu@spreadtrum.com>");
1564 MODULE_VERSION("0.6");