2 * Copyright (C) 2013 Spreadtrum Communications Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 * 0.2 unprotect dcdc/ldo before turn on and off
16 * remove dcdc/ldo calibration
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/version.h>
25 #include <linux/spinlock.h>
26 #include <linux/debugfs.h>
27 #include <linux/slab.h>
28 #include <linux/sort.h>
29 #include <linux/delay.h>
30 #include <linux/err.h>
32 #include <linux/platform_device.h>
35 #include <linux/of_device.h>
36 #include <linux/of_address.h>
37 #include <linux/regulator/of_regulator.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/regulator/driver.h>
41 #include <linux/regulator/machine.h>
43 #include <mach/hardware.h>
45 #include <mach/sci_glb_regs.h>
48 #include <mach/arch_misc.h>
50 #define REGULATOR_ROOT_DIR "sprd-regulator"
53 #define debug(format, arg...) pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
54 #define debug0(format, arg...) //pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
55 #define debug2(format, arg...) pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
58 #define ANA_REG_OR(_r, _b) sci_adi_write(_r, _b, 0)
62 #define ANA_REG_BIC(_r, _b) sci_adi_write(_r, 0, _b)
66 #define ANA_REG_GET(_r) sci_adi_read(_r)
70 #define ANA_REG_SET(_r, _v, _m) sci_adi_write((_r), ((_v) & (_m)), (_m))
73 struct sci_regulator_regs {
74 int typ; /* BIT4: default on/off(0: off, 1: on); BIT0~BIT3: dcdc/ldo type(0: ldo; 2: dcdc) */
77 unsigned long pwr_sel; /* otp pwr select reg */
78 u32 pwr_sel_bit; /* 0: otp enable(from emmc), 1: otp disable(from sw register) */
79 unsigned long vol_trm;
81 unsigned long cal_ctl;
82 u32 cal_ctl_bits, cal_chan;
83 //u32 min_uV, step_uV;
85 unsigned long vol_ctl;
87 u32 vol_sel_cnt, vol_sel[];
90 struct sci_regulator_data {
91 struct regulator_dev *rdev;
94 struct sci_regulator_desc {
95 struct regulator_desc desc;
96 struct sci_regulator_regs *regs;
97 struct sci_regulator_data data; /* FIXME: dynamic */
98 #if defined(CONFIG_DEBUG_FS)
99 struct dentry *debugfs;
111 #define REGU_VERIFY_DLY (1000) /*ms */
113 static u32 ana_chip_id;
114 static u16 ana_mixed_ctl, otp_pwr_sel;
116 static DEFINE_MUTEX(adc_chan_mutex);
117 static int regulator_get_trimming_step(struct regulator_dev *rdev, int to_vol);
118 static int __is_valid_adc_cal(void);
119 extern int sci_efuse_get_cal(unsigned int * pdata, int num);
121 #define SCI_REGU_REG(VDD, TYP, PD_SET, SET_BIT, PWR_SEL, PWR_SEL_BIT, \
122 VOL_TRM, VOL_TRM_BITS, CAL_CTL, CAL_CTL_BITS, VOL_DEF, \
123 VOL_CTL, VOL_CTL_BITS, VOL_SEL_CNT, ...) \
125 static struct sci_regulator_regs REGS_##VDD = { \
128 .pd_set_bit = SET_BIT, \
129 .pwr_sel = PWR_SEL, \
130 .pwr_sel_bit = PWR_SEL_BIT, \
131 .vol_trm = VOL_TRM, \
132 .vol_trm_bits = VOL_TRM_BITS, \
133 .cal_ctl = CAL_CTL, \
134 .cal_ctl_bits = CAL_CTL_BITS, \
135 .vol_def = VOL_DEF, \
136 .vol_ctl = VOL_CTL, \
137 .vol_ctl_bits = VOL_CTL_BITS, \
138 .vol_sel_cnt = VOL_SEL_CNT, \
139 .vol_sel = {__VA_ARGS__}, \
141 static struct sci_regulator_desc DESC_##VDD = { \
145 .desc.type = REGULATOR_VOLTAGE, \
146 .desc.owner = THIS_MODULE, \
147 .regs = ®S_##VDD, \
149 sci_regulator_register(pdev, &DESC_##VDD); \
152 static struct sci_regulator_desc *__get_desc(struct regulator_dev *rdev)
154 return (struct sci_regulator_desc *)rdev->desc;
157 /* standard ldo ops*/
158 static int ldo_turn_on(struct regulator_dev *rdev)
160 struct sci_regulator_desc *desc = __get_desc(rdev);
161 struct sci_regulator_regs *regs = desc->regs;
163 debug0("regu 0x%p (%s), power down 0x%08x[%d]\n", regs,
164 desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit));
166 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
167 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE,
168 BITS_PWR_WR_PROT_VALUE(0x6e7f));
171 ANA_REG_BIC(regs->pd_set, regs->pd_set_bit);
173 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
174 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE, 0);
176 debug("regu 0x%p (%s), turn on\n", regs, desc->desc.name);
180 static int ldo_turn_off(struct regulator_dev *rdev)
182 struct sci_regulator_desc *desc = __get_desc(rdev);
183 struct sci_regulator_regs *regs = desc->regs;
185 debug0("regu 0x%p (%s), power down 0x%08x[%d]\n", regs,
186 desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit));
188 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
189 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
190 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE,
191 BITS_PWR_WR_PROT_VALUE(0x6e7f));
194 ANA_REG_OR(regs->pd_set, regs->pd_set_bit);
196 if (regs->pd_set == ANA_REG_GLB_LDO_DCDC_PD)
197 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE, 0);
201 debug("regu 0x%p (%s), turn off\n", regs, desc->desc.name);
205 static int ldo_is_on(struct regulator_dev *rdev)
208 struct sci_regulator_desc *desc = __get_desc(rdev);
209 struct sci_regulator_regs *regs = desc->regs;
211 debug0("regu 0x%p (%s), power down 0x%08x[%d]\n", regs,
212 desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit));
215 ret = !(ANA_REG_GET(regs->pd_set) & regs->pd_set_bit);
218 debug2("regu 0x%p (%s) turn on, return %d\n", regs, desc->desc.name, ret);
222 static int ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
225 struct sci_regulator_desc *desc = __get_desc(rdev);
226 struct sci_regulator_regs *regs = desc->regs;
228 debug("regu 0x%p (%s), slp 0x%08x[%d] mode %x\n", regs, desc->desc.name,
229 regs->slp_ctl, regs->slp_ctl_bit, mode);
234 if (mode == REGULATOR_MODE_STANDBY) { /* disable auto slp */
235 ANA_REG_BIC(regs->slp_ctl, regs->slp_ctl_bit);
237 ANA_REG_OR(regs->slp_ctl, regs->slp_ctl_bit);
244 static int ldo_set_voltage(struct regulator_dev *rdev, int min_uV,
245 int max_uV, unsigned *selector)
247 struct sci_regulator_desc *desc = __get_desc(rdev);
248 struct sci_regulator_regs *regs = desc->regs;
249 int mv = min_uV / 1000;
252 debug("regu 0x%p (%s) set voltage, %d(uV) %d(uV)\n", regs, desc->desc.name, min_uV, max_uV);
254 if (regs->vol_trm /* && regs->vol_sel_cnt == 2 */) {
255 int shft = __ffs(regs->vol_trm_bits);
256 u32 trim = /* vol_sel[0]: output (mV), [1]:step (uV) */
257 DIV_ROUND_UP((mv - regs->vol_sel[0]) * 1000, regs->vol_sel[1]);
259 ret = trim > (regs->vol_trm_bits >> shft);
261 "warning: regulator (%s) not support %dmV\n",
262 desc->desc.name, mv);
265 ANA_REG_SET(regs->vol_trm,
274 static int ldo_get_voltage(struct regulator_dev *rdev)
276 struct sci_regulator_desc *desc = __get_desc(rdev);
277 struct sci_regulator_regs *regs = desc->regs;
280 debug0("regu 0x%p (%s), vol trm 0x%08x, mask 0x%08x\n",
281 regs, desc->desc.name, regs->vol_trm, regs->vol_trm_bits);
283 if (regs->vol_trm /* && regs->vol_sel_cnt == 2 */) {
284 int shft = __ffs(regs->vol_trm_bits);
286 (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >> shft;
287 vol = regs->vol_sel[0] * 1000 + trim * regs->vol_sel[1];
288 debug2("regu 0x%p (%s), voltage %d\n", regs, desc->desc.name, vol);
296 extern u32 __adie_efuse_read(int blk_index);
297 extern int sci_otp_get_offset(const char *name);
299 static int set_regu_offset(struct regulator_dev *rdev)
301 struct sci_regulator_desc *desc = __get_desc(rdev);
302 struct sci_regulator_regs *regs = desc->regs;
303 const char *regu_name = desc->desc.name;
306 if (NULL == regu_name)
309 efuse_data = sci_otp_get_offset(regu_name);
310 if (!(desc->regs->typ & BIT(4)))
311 rdev->constraints->uV_offset = efuse_data * regulator_get_trimming_step(rdev, 0);
313 rdev->constraints->uV_offset = 0;
315 debug("%s otp delta: %d, voltage offset: %d(uV)\n", desc->desc.name, efuse_data, rdev->constraints->uV_offset);
317 /* switch sw register control from otp emmc only for vddmem/vdd25 */
318 if ((0 == strcmp(regu_name, "vddmem"))
319 || (0 == strcmp(regu_name, "vdd25"))) {
321 int shft = __ffs(regs->vol_trm_bits);
325 trim = (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >> shft;
327 ANA_REG_SET(regs->vol_trm,
332 /* set pwr sel bit for sw control */
333 ANA_REG_OR(regs->pwr_sel, regs->pwr_sel_bit);
341 /* FIXME: get dcdc cal offset config from uboot */
348 int regulator_default_get(const char con_id[])
350 #define PP_VOL_PARA ( 0x50005C20 ) /* assert in iram2 */
351 #define TO_IRAM2(_p_) ( SPRD_IRAM2_BASE + (unsigned long)(_p_) - SPRD_IRAM2_PHYS )
352 #define IN_IRAM2(_p_) ( (unsigned long)(_p_) >= SPRD_IRAM2_PHYS && (unsigned long)(_p_) < SPRD_IRAM2_PHYS + SPRD_IRAM2_SIZE )
355 vol_para_t *pvol_para = (vol_para_t *)__raw_readl((void *)TO_IRAM2(PP_VOL_PARA));
357 if (!(IN_IRAM2(pvol_para)))
360 pvol_para = (vol_para_t *)TO_IRAM2(pvol_para);
362 if(strcmp((pvol_para)[0].name, "volpara_begin") || (0xfaed != (pvol_para)[0].ideal_vol))
365 while(0 != strcmp((pvol_para)[i++].name, "volpara_end")) {
366 if (0 == strcmp((pvol_para)[i].name, con_id)) {
367 debug("%s name %s, ideal_vol %d\n", __func__, (pvol_para)[i].name, (pvol_para)[i].ideal_vol);
368 return res = (pvol_para)[i].ideal_vol;
374 static int __init_trimming(struct regulator_dev *rdev)
376 struct sci_regulator_desc *desc = __get_desc(rdev);
377 struct sci_regulator_regs *regs = desc->regs;
379 uint otp_ana_flag = 0;
384 if(!__is_valid_adc_cal())
387 otp_ana_flag = (u8)__adie_efuse_read(0) & BIT(7);
389 set_regu_offset(rdev);
391 to_vol = regulator_default_get(desc->desc.name);
393 to_vol = regs->vol_def;
395 if (to_vol && rdev->desc->ops->get_voltage) {
396 ctl_vol = rdev->desc->ops->get_voltage(rdev);
397 rdev->constraints->uV_offset = ctl_vol - to_vol * 1000;//uV
398 debug("regu 0x%p (%s), uV offset %d\n", regs, desc->desc.name, rdev->constraints->uV_offset);
406 static int regulator_get_trimming_step(struct regulator_dev *rdev, int to_vol)
409 struct sci_regulator_desc *desc = __get_desc(rdev);
410 if (0 == strcmp(desc->desc.name, "vddmem")) { /* FIXME: vddmem step 200/32mV */
411 return 1000 * 200 / 32; /*uV */
414 return 1000 * 100 / 32; /*uV */
418 static int __match_dcdc_vol(struct sci_regulator_regs *regs, u32 vol)
421 int ds, min_ds = 100; /* mV, the max range of small voltage */
422 for (i = 0; i < regs->vol_sel_cnt; i++) {
423 ds = vol - regs->vol_sel[i];
424 if (ds >= 0 && ds < min_ds) {
432 static int __dcdc_enable_time(struct regulator_dev *rdev, int old_vol)
434 int vol = rdev->desc->ops->get_voltage(rdev) / 1000;
436 /* FIXME: for dcdc, each step (50mV) takes 10us */
437 int dly = (vol - old_vol) * 10 / 50;
444 static int dcdc_set_voltage(struct regulator_dev *rdev, int min_uV,
445 int max_uV, unsigned *selector)
447 struct sci_regulator_desc *desc = __get_desc(rdev);
448 struct sci_regulator_regs *regs = desc->regs;
449 int i, mv = min_uV / 1000;
450 int old_vol = rdev->desc->ops->get_voltage(rdev) / 1000;
452 debug0("regu 0x%p (%s) %d %d\n", regs, desc->desc.name, min_uV, max_uV);
454 BUG_ON(regs->vol_sel_cnt > 8);
457 /* found the closely vol ctrl bits */
458 i = __match_dcdc_vol(regs, mv);
460 return WARN(-EINVAL, "not found %s closely ctrl bits for %dmV\n",
461 desc->desc.name, mv);
464 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
465 /* dcdc calibration control bits (default 00000),
466 * small adjust voltage: 100/32mv ~= 3.125mv
469 int shft_trm = __ffs(regs->vol_trm_bits);
475 shft_ctl = __ffs(regs->vol_ctl_bits);
476 step = regulator_get_trimming_step(rdev, 0);
478 j = DIV_ROUND_UP((int)(mv - (int)regs->vol_sel[i]) * 1000, step);
479 //j += dcdc_initial_value(desc);
481 debug("regu 0x%p (%s) %d = %d %+dmV(trim %#x)\n", regs, desc->desc.name,
482 mv, regs->vol_sel[i], mv - regs->vol_sel[i], j);
484 if(regs->vol_sel_cnt == 2) {
485 step = regs->vol_sel[1];
486 j = DIV_ROUND_UP((int)(mv - regs->vol_sel[0]) * 1000, step);
488 debug("regu 0x%p (%s) %d = %d %+duV(trim %#x)\n", regs, desc->desc.name,
489 mv, regs->vol_sel[0], mv - regs->vol_sel[0], j);
493 BUG_ON(j > (regs->vol_trm_bits >> shft_trm));
495 if (regs->vol_trm == regs->vol_ctl) {
496 ANA_REG_SET(regs->vol_ctl, (j << shft_trm) | (i << shft_ctl),
497 regs->vol_trm_bits | regs->vol_ctl_bits);
499 if (regs->vol_trm) { /* small adjust first */
500 ANA_REG_SET(regs->vol_trm, j << shft_trm,
505 ANA_REG_SET(regs->vol_ctl, i << shft_ctl,
511 __dcdc_enable_time(rdev, old_vol);
518 static int dcdc_get_voltage(struct regulator_dev *rdev)
520 struct sci_regulator_desc *desc = __get_desc(rdev);
521 struct sci_regulator_regs *regs = desc->regs;
523 int i, cal = 0 /* uV */;
525 BUG_ON(regs->vol_sel_cnt > 8);
528 int shft_ctl = __ffs(regs->vol_ctl_bits);
529 int shft_trm = __ffs(regs->vol_trm_bits);
531 debug0("regu 0x%p (%s), vol ctl 0x%08x, shft %d, mask 0x%08x, sel %d\n",
532 regs, desc->desc.name, regs->vol_ctl,
533 shft_ctl, regs->vol_ctl_bits, regs->vol_sel_cnt);
535 i = (ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft_ctl;
536 mv = regs->vol_sel[i];
539 cal = (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >> shft_trm;
540 //cal -= dcdc_initial_value(desc);
541 cal *= regulator_get_trimming_step(rdev, 0); /* uV */
544 } else if (regs->vol_trm) {
545 int shft_trm = __ffs(regs->vol_trm_bits);
547 (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >> shft_trm;
548 mv = regs->vol_sel[0] * 1000 + trim * regs->vol_sel[1];
551 debug2("%s get voltage, %d +%dmv\n", desc->desc.name, mv, cal / 1000);
553 return (mv * 1000 + cal) /*uV */;
557 /* standard boost ops*/
558 #define MAX_CURRENT_SINK (500) /*FIXME: max current sink */
559 static int boost_set_current_limit(struct regulator_dev *rdev, int min_uA,
562 struct sci_regulator_desc *desc = __get_desc(rdev);
563 struct sci_regulator_regs *regs = desc->regs;
564 int ma = min_uA / 1000;
566 int i, shft = __ffs(regs->vol_ctl_bits);
567 int trim = (int)regs->vol_def / 1000;
568 int steps = (regs->vol_ctl_bits >> shft) + 1;
570 debug("regu 0x%p (%s) %d %d\n", regs, desc->desc.name, min_uA, max_uA);
576 trim <<= __ffs(regs->vol_trm_bits);
579 i = ma * steps / MAX_CURRENT_SINK;
580 if (i >= 0 && i < steps) {
581 ANA_REG_SET(regs->vol_ctl, (i << shft) | trim,
582 regs->vol_ctl_bits | regs->vol_trm_bits);
588 "warning: regulator (%s) not support %dmA\n", desc->desc.name, ma);
594 static int boost_get_current_limit(struct regulator_dev *rdev)
596 struct sci_regulator_desc *desc = __get_desc(rdev);
597 struct sci_regulator_regs *regs = desc->regs;
599 int i, shft = __ffs(regs->vol_ctl_bits);
600 int steps = (regs->vol_ctl_bits >> shft) + 1;
602 debug0("regu 0x%p (%s), vol ctl 0x%08x, shft %d, mask 0x%08x\n",
603 regs, desc->desc.name, regs->vol_ctl, shft, regs->vol_ctl_bits);
608 i = ((ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft);
609 cur = i * MAX_CURRENT_SINK / steps;
610 debug("regu 0x%p (%s) get current %d\n", regs, desc->desc.name, cur);
614 static int adc_sample_bit = 1; /*12bits mode */
615 static short adc_data[3][2]
616 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
618 {4200, 3387}, /* same as nv adc_t */
620 {400, 316}, /* 0.4@VBAT, Reserved IdealC Value */
625 static int __is_valid_adc_cal(void)
627 return 0 != adc_data[0][0];
630 static int __init __adc_cal_setup(char *str)
632 u32 *p = (u32 *) adc_data;
633 *p = simple_strtoul(str, &str, 0);
634 if (*p++ && *++str) {
635 *p = simple_strtoul(str, &str, 0);
637 debug("%d : %d -- %d : %d\n",
638 (int)adc_data[0][0], (int)adc_data[0][1],
639 (int)adc_data[1][0], (int)adc_data[1][1]);
640 if (adc_data[0][1] < BIT(10)
641 && adc_data[1][1] < BIT(10))
642 adc_sample_bit = 0; /*10bits mode */
648 early_param("adc_cal", __adc_cal_setup);
650 static int __init __adc_cal_fuse_setup(void)
652 if (!__is_valid_adc_cal() &&
653 (0 == sci_efuse_get_cal((u32 *) adc_data, 2))) {
654 debug("%d : %d -- %d : %d\n",
655 (int)adc_data[0][0], (int)adc_data[0][1],
656 (int)adc_data[1][0], (int)adc_data[1][1]);
662 static int __adc2vbat(int adc_res)
664 int t = adc_data[0][0] - adc_data[1][0];
665 t *= (adc_res - adc_data[0][1]);
666 t /= (adc_data[0][1] - adc_data[1][1]);
671 #define MEASURE_TIMES (15)
673 static void __dump_adc_result(u32 adc_val[])
675 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
677 for (i = 0; i < MEASURE_TIMES; i++) {
678 printk("%d ", adc_val[i]);
684 static int cmp_val(const void *a, const void *b)
686 return *(int *)a - *(int *)b;
690 * __adc_voltage - get regulator output voltage through auxadc
691 * @regulator: regulator source
693 * This returns the current regulator voltage in mV.
695 * NOTE: If the regulator is disabled it will return the voltage value. This
696 * function should not be used to determine regulator state.
698 static int regu_adc_voltage(struct regulator_dev *rdev)
700 struct sci_regulator_desc *desc = __get_desc(rdev);
701 struct sci_regulator_regs *regs = desc->regs;
703 int ret, adc_chan = regs->cal_chan;
704 u16 ldo_cal_sel = regs->cal_ctl_bits & 0xFFFF;
705 u32 adc_res, adc_val[MEASURE_TIMES];
706 u32 ratio = 1, chan_numerators = 1, chan_denominators = 1;
707 u32 bat_numerators, bat_denominators;
709 struct adc_sample_data data = {
710 .channel_id = adc_chan,
711 .channel_type = 0, /*sw */
712 .hw_channel_delay = 0, /*reserved */
713 .scale = (((adc_chan != 13) && (adc_chan != 14)) ? 1 : 0), /* chanel = 13/14: small scale, others: big scale */
715 .sample_num = MEASURE_TIMES,
716 .sample_bits = adc_sample_bit,
717 .sample_speed = 0, /*quick mode */
718 .signal_mode = 0, /*resistance path */
721 if (!__is_valid_adc_cal())
727 /* enable ldo cal before adc sampling and ldo calibration */
729 mutex_lock(&adc_chan_mutex);
730 ANA_REG_OR(regs->cal_ctl, ldo_cal_sel);
731 debug0("%s adc channel %d : %04x\n",
732 desc->desc.name, data.channel_id, ldo_cal_sel);
735 ret = sci_adc_get_values(&data);
738 /* close ldo cal and release multiplexed aux adc channel */
740 ANA_REG_BIC(regs->cal_ctl, ldo_cal_sel);
741 mutex_unlock(&adc_chan_mutex);
744 __dump_adc_result(adc_val);
745 sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
746 /*__dump_adc_result(adc_val);*/
748 ratio = (u32)sci_adc_get_ratio(data.channel_id, data.scale, ldo_cal_sel);
749 chan_numerators = ratio >> 16;
750 chan_denominators = ratio & 0xFFFF;
752 ratio = (u32)sci_adc_get_ratio(ADC_CHANNEL_VBAT, 1, 0);
753 bat_numerators = ratio >> 16;
754 bat_denominators = ratio & 0xFFFF;
756 adc_res = adc_val[MEASURE_TIMES / 2];
757 debug("%s adc channel %d : 0x%04x, ratio (%d/%d), result value %d\n",
758 desc->desc.name, data.channel_id, ldo_cal_sel,
759 chan_numerators, chan_denominators, adc_res);
764 return __adc2vbat(adc_res)
765 * (bat_numerators * chan_denominators)
766 / (bat_denominators * chan_numerators);
770 * regulator_strongly_disable - strongly disable regulator output
771 * @regulator: regulator source
773 * Strongly try disable the regulator output voltage or current.
774 * NOTE: this *will* disable the regulator output even if other consumer
775 * devices have it enabled. This should be used for situations when device
776 * had unbalanced with calls to regulator_enable().
777 * *Not* recommended to call this function before try to balance the use_count.
779 int regulator_strongly_disable(struct regulator *regulator)
781 struct regulator_dev *rdev = regulator_get_drvdata(regulator);
785 while (rdev->use_count--)
786 regulator_disable(regulator);
791 EXPORT_SYMBOL_GPL(regulator_strongly_disable);
793 static struct regulator_ops ldo_ops = {
794 .enable = ldo_turn_on,
795 .disable = ldo_turn_off,
796 .is_enabled = ldo_is_on,
797 .set_voltage = ldo_set_voltage,
798 .get_voltage = ldo_get_voltage,
799 .set_mode = ldo_set_mode,
802 static struct regulator_ops dcdc_ops = {
803 .enable = ldo_turn_on,
804 .disable = ldo_turn_off,
805 .is_enabled = ldo_is_on,
806 .set_voltage = dcdc_set_voltage,
807 .get_voltage = dcdc_get_voltage,
810 static struct regulator_ops boost_ops = {
811 .enable = ldo_turn_on,
812 .disable = ldo_turn_off,
813 .is_enabled = ldo_is_on,
814 .set_current_limit = boost_set_current_limit,
815 .get_current_limit = boost_get_current_limit,
816 .set_mode = ldo_set_mode,
820 * Consider the following machine :-
822 * Regulator-1 -+-> [Consumer A @ 1.8V]
824 * +-> [Consumer B @ 1.8V]
826 * Regulator-2 ---> [Consumer C @ 3.3V]
828 * The drivers for consumers A & B must be mapped to the correct regulator in
829 * order to control their power supply. This mapping can be achieved in board/machine
830 * initialisation code by creating a struct regulator_consumer_supply for each regulator.
831 * Alternatively, we built a regulator supply-consumers map, the format is as follow:
833 * supply source-1, consumer A, consumer B, ..., NULL
834 * supply source-2, consumer C, ..., NULL
839 static struct regulator_consumer_supply *set_supply_map(struct device *dev,
840 const char *supply_name,
843 char **map = (char **)dev_get_platdata(dev);
845 struct regulator_consumer_supply *consumer_supplies = NULL;
847 if (!supply_name || !(map && map[0]))
850 for (i = 0; map[i] || map[i + 1]; i++) {
851 if (map[i] && 0 == strcmp(map[i], supply_name))
855 /* i++; *//* Do not skip supply name */
857 for (n = 0; map[i + n]; n++) ;
860 debug0("supply %s consumers %d - %d\n", supply_name, i, n);
862 kzalloc(n * sizeof(*consumer_supplies), GFP_KERNEL);
863 BUG_ON(!consumer_supplies);
864 for (n = 0; map[i]; i++, n++) {
865 consumer_supplies[n].supply = map[i];
870 return consumer_supplies;
873 #if defined(CONFIG_DEBUG_FS)
874 static struct dentry *debugfs_root = NULL;
876 static u32 ana_addr = 0;
877 static int debugfs_ana_addr_get(void *data, u64 * val)
879 if (ana_addr < PAGE_SIZE) {
880 *val = ANA_REG_GET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK));
882 void *addr = ioremap(ana_addr, PAGE_SIZE);
883 *val = __raw_readl(addr);
889 static int debugfs_ana_addr_set(void *data, u64 val)
891 if (ana_addr < PAGE_SIZE) {
892 ANA_REG_SET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK), val, -1);
894 void *addr = ioremap(ana_addr, PAGE_SIZE);
895 __raw_writel(val, addr);
901 static int adc_chan = 5 /*VBAT*/;
902 static int debugfs_adc_chan_get(void *pdata, u64 * val)
905 u32 adc_res, adc_val[MEASURE_TIMES];
906 struct adc_sample_data data = {
907 .channel_id = adc_chan,
908 .channel_type = 0, /*sw */
909 .hw_channel_delay = 0, /*reserved */
910 .scale = 1, /*big scale */
912 .sample_num = MEASURE_TIMES,
913 .sample_bits = adc_sample_bit,
914 .sample_speed = 0, /*quick mode */
915 .signal_mode = 0, /*resistance path */
918 ret = sci_adc_get_values(&data);
921 for (i = 0; i < MEASURE_TIMES; i++) {
922 printk("%d ", adc_val[i]);
926 sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
927 adc_res = adc_val[MEASURE_TIMES / 2];
928 pr_info("adc chan %d, result value %d, vbat %d\n",
929 data.channel_id, adc_res, __adc2vbat(adc_res));
934 static int debugfs_adc_chan_set(void *data, u64 val)
940 static int debugfs_enable_get(void *data, u64 * val)
942 struct regulator_dev *rdev = data;
943 if (rdev && rdev->desc->ops->is_enabled)
944 *val = rdev->desc->ops->is_enabled(rdev);
950 static int debugfs_enable_set(void *data, u64 val)
952 struct regulator_dev *rdev = data;
953 if (rdev && rdev->desc->ops->enable)
954 (val) ? rdev->desc->ops->enable(rdev)
955 : rdev->desc->ops->disable(rdev);
959 static int debugfs_voltage_get(void *data, u64 * val)
961 struct regulator_dev *rdev = data;
963 *val = regu_adc_voltage(rdev);
969 static int debugfs_voltage_set(void *data, u64 val)
971 struct regulator_dev *rdev = data;
972 if (rdev && rdev->desc->ops->set_voltage) {
973 u32 min_uV = (u32)val * 1000;
974 min_uV += rdev->constraints->uV_offset;
975 rdev->desc->ops->set_voltage(rdev, min_uV, min_uV, 0);
980 static int debugfs_boost_get(void *data, u64 * val)
982 struct regulator_dev *rdev = data;
983 if (rdev && rdev->desc->ops->get_current_limit)
984 *val = rdev->desc->ops->get_current_limit(rdev) / 1000;
990 static int debugfs_boost_set(void *data, u64 val)
992 struct regulator_dev *rdev = data;
993 if (rdev && rdev->desc->ops->set_current_limit)
994 rdev->desc->ops->set_current_limit(rdev, val * 1000,
999 DEFINE_SIMPLE_ATTRIBUTE(fops_ana_addr,
1000 debugfs_ana_addr_get, debugfs_ana_addr_set, "%llu\n");
1001 DEFINE_SIMPLE_ATTRIBUTE(fops_adc_chan,
1002 debugfs_adc_chan_get, debugfs_adc_chan_set, "%llu\n");
1003 DEFINE_SIMPLE_ATTRIBUTE(fops_enable,
1004 debugfs_enable_get, debugfs_enable_set, "%llu\n");
1005 DEFINE_SIMPLE_ATTRIBUTE(fops_ldo,
1006 debugfs_voltage_get, debugfs_voltage_set, "%llu\n");
1007 DEFINE_SIMPLE_ATTRIBUTE(fops_boost,
1008 debugfs_boost_get, debugfs_boost_set, "%llu\n");
1010 static void rdev_init_debugfs(struct regulator_dev *rdev)
1012 struct sci_regulator_desc *desc = __get_desc(rdev);
1013 desc->debugfs = debugfs_create_dir(rdev->desc->name, debugfs_root);
1014 if (IS_ERR_OR_NULL(rdev->debugfs)) {
1015 pr_warn("Failed to create debugfs directory\n");
1016 rdev->debugfs = NULL;
1020 debugfs_create_file("enable", S_IRUGO | S_IWUSR,
1021 desc->debugfs, rdev, &fops_enable);
1023 if (desc->desc.type == REGULATOR_CURRENT)
1024 debugfs_create_file("current", S_IRUGO | S_IWUSR,
1025 desc->debugfs, rdev, &fops_boost);
1027 debugfs_create_file("voltage", S_IRUGO | S_IWUSR,
1028 desc->debugfs, rdev, &fops_ldo);
1031 static void rdev_init_debugfs(struct regulator_dev *rdev)
1036 static int reconfig_regulator(struct sci_regulator_desc *desc)
1038 struct sci_regulator_regs *regs = desc->regs;
1040 /* Fixme: Config DCDC linear/no linear control
1041 * accoring to BIT14 of Reg(0x40038800 + 0x0118)
1043 if (ana_mixed_ctl & BIT_DCDC_V_CTRL_MODE) {
1044 /* dcdc linear control */
1045 if ((0 == strcmp(desc->desc.name, "vddcore"))
1046 || (0 == strcmp(desc->desc.name, "vddarm"))) {
1047 regs->vol_trm_bits = (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4) \
1048 |BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9));
1050 regs->vol_ctl_bits = 0;
1052 regs->vol_sel_cnt = 2;
1053 regs->vol_sel[0] = 600;
1054 regs->vol_sel[1] = 3125;
1057 /* dcdc Non-linear control */
1058 if ((0 == strcmp(desc->desc.name, "vddcore"))
1059 || (0 == strcmp(desc->desc.name, "vddarm"))) {
1060 regs->vol_ctl = regs->vol_trm;
1061 regs->vol_trm_bits = (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4));
1062 regs->vol_ctl_bits = (BIT(5)|BIT(6)|BIT(7));
1063 regs->vol_sel_cnt = 8;
1064 regs->vol_sel[0] = 1100;
1065 regs->vol_sel[1] = 700;
1066 regs->vol_sel[2] = 800;
1067 regs->vol_sel[3] = 900;
1068 regs->vol_sel[4] = 1000;
1069 regs->vol_sel[5] = 650;
1070 regs->vol_sel[6] = 1200;
1071 regs->vol_sel[7] = 1300;
1078 static void *sci_regulator_register(struct platform_device *pdev,
1079 struct sci_regulator_desc *desc)
1081 static atomic_t idx = ATOMIC_INIT(1); /* 0: dummy */
1082 struct regulator_dev *rdev;
1083 struct regulator_ops *__regs_ops[] = {
1084 &ldo_ops, 0, &dcdc_ops, 0 /*lpref_ops */ , &boost_ops,
1087 struct regulator_consumer_supply consumer_supplies_default[] = {
1089 .supply = desc->desc.name,
1092 struct regulator_config config = { };
1094 struct regulator_init_data init_data = {
1095 .supply_regulator = 0,
1098 .max_uV = 4200 * 1000,
1100 REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY,
1102 REGULATOR_CHANGE_STATUS |
1103 REGULATOR_CHANGE_VOLTAGE |
1104 REGULATOR_CHANGE_MODE,
1106 .num_consumer_supplies = 1,
1107 .consumer_supplies = consumer_supplies_default,
1108 .regulator_init = 0,
1112 desc->desc.id = atomic_inc_return(&idx) - 1;
1114 reconfig_regulator(desc);
1116 BUG_ON((desc->regs->typ & (BIT(4) - 1)) >= ARRAY_SIZE(__regs_ops));
1117 if (!desc->desc.ops)
1118 desc->desc.ops = __regs_ops[desc->regs->typ & (BIT(4) - 1)];
1120 init_data.consumer_supplies =
1121 set_supply_map(&pdev->dev, desc->desc.name,
1122 &init_data.num_consumer_supplies);
1124 if (!init_data.consumer_supplies)
1125 init_data.consumer_supplies = consumer_supplies_default;
1127 debug0("regu 0x%p (%s)\n", desc->regs, desc->desc.name);
1129 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0))
1130 config.dev = &pdev->dev;
1131 config.init_data = &init_data;
1132 config.driver_data = NULL;
1133 config.of_node = NULL;
1134 rdev = regulator_register(&desc->desc, &config);
1135 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
1136 rdev = regulator_register(&desc->desc, &pdev->dev, &init_data, 0, 0);
1138 rdev = regulator_register(&desc->desc, &pdev->dev, &init_data, 0);
1141 if (init_data.consumer_supplies != consumer_supplies_default)
1142 kfree(init_data.consumer_supplies);
1144 if (!IS_ERR_OR_NULL(rdev)) {
1145 rdev->reg_data = rdev;
1146 desc->data.rdev = rdev;
1147 __init_trimming(rdev);
1148 rdev_init_debugfs(rdev);
1155 * spreadtrum power regulators is intergrated on the chip, include LDOs and DCDCs.
1156 * so i autogen all regulators non-variable description in plat or mach directory,
1157 * which named __xxxx_regulator_map.h, BUT register all in regulator driver probe func,
1158 * just like other regulator vendor drivers.
1160 static int sci_regulator_probe(struct platform_device *pdev)
1162 #ifdef CONFIG_DEBUG_FS
1164 debugfs_create_dir(REGULATOR_ROOT_DIR, NULL);
1165 if (IS_ERR_OR_NULL(debugfs_root)) {
1167 "%s: Failed to create debugfs directory\n", REGULATOR_ROOT_DIR);
1168 debugfs_root = NULL;
1171 /* compatible with 8810 adc test */
1172 debugfs_create_u32("ana_addr", S_IRUGO | S_IWUSR,
1173 debugfs_root, (u32 *) & ana_addr);
1174 debugfs_create_file("ana_valu", S_IRUGO | S_IWUSR,
1175 debugfs_root, &ana_addr, &fops_ana_addr);
1176 debugfs_create_file("adc_chan", S_IRUGO | S_IWUSR,
1177 debugfs_root, &adc_chan, &fops_adc_chan);
1178 debugfs_create_u64("adc_data", S_IRUGO | S_IWUSR,
1179 debugfs_root, (u64 *) & adc_data);
1181 { /* vddarm/vddcore/vddmem common debugfs interface */
1183 struct dentry *vol_root = debugfs_create_dir("vol", NULL);
1184 sprintf(str, "../%s/vddarm/voltage", REGULATOR_ROOT_DIR);
1185 debugfs_create_symlink("dcdcarm", vol_root, str);
1186 sprintf(str, "../%s/vddcore/voltage", REGULATOR_ROOT_DIR);
1187 debugfs_create_symlink("dcdccore", vol_root, str);
1188 sprintf(str, "../%s/vddmem/voltage", REGULATOR_ROOT_DIR);
1189 debugfs_create_symlink("dcdcmem", vol_root, str);
1193 ana_chip_id = ((u32)ANA_REG_GET(ANA_REG_GLB_CHIP_ID_HIGH) << 16) |
1194 ((u32)ANA_REG_GET(ANA_REG_GLB_CHIP_ID_LOW) & 0xFFFF);
1195 ana_mixed_ctl = ANA_REG_GET(ANA_REG_GLB_MIXED_CTRL0);
1196 otp_pwr_sel = ANA_REG_GET(ANA_REG_GLB_PWR_SEL);
1198 pr_info("sc272x ana chipid:(0x%08x), ana_mixed_ctl:(0x%08x), otp_sel:(0x%08x)\n", ana_chip_id, ana_mixed_ctl, otp_pwr_sel);
1200 #include CONFIG_REGULATOR_SPRD_MAP_V1
1204 static int sci_regulator_remove(struct platform_device *pdev)
1209 static struct platform_driver sci_regulator_driver = {
1211 .name = "sc2723-regulator",
1212 .owner = THIS_MODULE,
1214 .probe = sci_regulator_probe,
1215 .remove = sci_regulator_remove
1218 static int __init regu_driver_init(void)
1220 __adc_cal_fuse_setup();
1222 return platform_driver_register(&sci_regulator_driver);
1225 int __init sci_regulator_init(void)
1227 static struct platform_device regulator_device = {
1228 .name = "sc2723-regulator",
1232 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE,
1233 BITS_PWR_WR_PROT_VALUE(0x6e7f));
1235 (sci_adi_read(ANA_REG_GLB_PWR_WR_PROT_VALUE) &
1237 sci_adi_raw_write(ANA_REG_GLB_PWR_WR_PROT_VALUE, 0);
1239 return platform_device_register(®ulator_device);
1242 subsys_initcall(regu_driver_init);
1244 MODULE_LICENSE("GPL v2");
1245 MODULE_DESCRIPTION("Spreadtrum voltage regulator driver");
1246 MODULE_AUTHOR("kevin <ronghua.yu@spreadtrum.com>");
1247 MODULE_VERSION("0.6");