drivers/regulator/sc2713s-regulator_dt.c

   1 /*
   2  * Copyright (C) 2013 Spreadtrum Communications Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * as published by the Free Software Foundation; either version 2
   7  * of the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * Fixes:
  15  *              0.4
  16  *              Bug#183980 add dcdc and pll enable time
  17  *              Change-Id: I6e6e06ee0beb306cd846964d0ba24aef449e5beb
  18  *              0.3
  19  *              Bug#164001 add dcdc mem/gen/wpa/wrf map
  20  *              Change-Id: I07dac5700c0907aca99f6112bd4b5799358a9a88
  21  *              0.2
  22  *              Bug#164001 shark dcam: add camera ldo calibration
  23  *              Change-Id: Icaee2706b8b0985ae6f3122b236d8e278dcc0db2
  24  *              0.1
  25  *              sc8830: fix adc cal data from cmdline fail
  26  *              Change-Id: Id85d58178aca40fdf13b996853711e92e1171801
  27  *
  28  * To Fix:
  29  *
  30  *
  31  */
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/module.h>
  35 #include <linux/version.h>
  36 #include <linux/spinlock.h>
  37 #include <linux/debugfs.h>
  38 #include <linux/slab.h>
  39 #include <linux/sort.h>
  40 #include <linux/delay.h>
  41 #include <linux/err.h>
  42 #include <linux/io.h>
  43 #include <linux/platform_device.h>
  44 #ifdef CONFIG_OF
  45 #include <linux/of.h>
  46 #include <linux/of_device.h>
  47 #include <linux/of_address.h>
  48 #include <linux/regulator/of_regulator.h>
  49 #endif
  50 #include <linux/regulator/consumer.h>
  51 #include <linux/regulator/driver.h>
  52 #include <linux/regulator/machine.h>
  53
  54 #include <soc/sprd/hardware.h>
  55 #include <soc/sprd/sci.h>
  56 #include <soc/sprd/sci_glb_regs.h>
  57 #include <soc/sprd/adi.h>
  58 #include <soc/sprd/adc.h>
  59 #include <soc/sprd/arch_misc.h>
  60
  61 #define REGULATOR_ROOT_DIR      "sprd-regulator"
  62
  63 #undef debug
  64 #define debug(format, arg...) pr_info("regu: " "@@@%s: " format, __func__, ## arg)
  65 #define debug0(format, arg...)  //pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
  66 #define debug2(format, arg...)  pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
  67
  68
  69 #ifndef ANA_REG_OR
  70 #define ANA_REG_OR(_r, _b)      sci_adi_write(_r, _b, 0)
  71 #endif
  72
  73 #ifndef ANA_REG_BIC
  74 #define ANA_REG_BIC(_r, _b)     sci_adi_write(_r, 0, _b)
  75 #endif
  76
  77 #ifndef ANA_REG_GET
  78 #define ANA_REG_GET(_r)         sci_adi_read(_r)
  79 #endif
  80
  81 #ifndef ANA_REG_SET
  82 #define ANA_REG_SET(_r, _v, _m) sci_adi_write((_r), ((_v) & (_m)), (_m))
  83 #endif
  84
  85 #define REGU_VERIFY_DLY (1000)  /*ms */
  86
  87 struct sci_regulator_regs{
  88         int typ;
  89         u32 pd_set, pd_set_bit;
  90         /**
  91          * at new feature, some LDOs had only set, no rst bits.
  92          * and DCDCs voltage and trimming controller is the same register
  93          */
  94         u32 pd_rst, pd_rst_bit;
  95         u32 slp_ctl, slp_ctl_bit;
  96         u32 vol_trm, vol_trm_bits;
  97         u32 cal_ctl, cal_ctl_bits, cal_chan;
  98         u32 min_uV, step_uV;
  99         u32 vol_def;
 100         u32 vol_ctl, vol_ctl_bits;
 101         u32 vol_sel_cnt;
 102         u32 *vol_sel;
 103 };
 104
 105 struct sci_regulator_data {
 106         struct regulator_dev *rdev;
 107 };
 108
 109 struct sci_regulator_desc {
 110         struct regulator_desc desc;
 111         struct regulator_init_data *init_data;
 112         struct sci_regulator_regs regs;
 113         struct sci_regulator_data data; /* FIXME: dynamic */
 114 #if defined(CONFIG_DEBUG_FS)
 115         struct dentry *debugfs;
 116 #endif
 117 };
 118
 119 enum {
 120         VDD_TYP_LDO = 0,
 121         VDD_TYP_LDO_D = 1,
 122         VDD_TYP_DCDC = 2,
 123         VDD_TYP_LPREF = 3,
 124         VDD_TYP_BOOST = 4,
 125 };
 126
 127 static struct sci_regulator_desc *sci_desc_list = NULL;
 128
 129 static atomic_t idx = ATOMIC_INIT(1);   /* 0: dummy */
 130
 131
 132 /*************************************************************************
 133 Reg: 0x40038800 + 0x00E4
 134 --------------------------------------------
 135 BIT    |    FieldName    |    Description
 136 --------------------------------------------
 137 BIT7~BIT15  Reserved
 138 BIT6    BONDOPT6                28nm/40nm dcdccore/dcdcarm default voltage select:
 139                                                 0: dcdccore/dcdcarm = 1.1v, vdd25 = 2.5v
 140                                                 1: dcdccore/dcdcarm = 0.9v, vdd25 = 1.8v
 141 BIT5    BONDOPT5                crystal 32k buffer select:
 142                                                 0: new low power 32k buffer output, 1: backup 32k buffer output
 143 BIT4    BONDOPT4                dcdcwrf out voltage select:  dcdc_wrf_ctl[2]
 144 BIT3    BONDOPT3                charge mode option:
 145                                                 0: continues charging, 1: dcdc mode charging
 146 BIT2    BONDOPT2                dcdcmem option 2:  dcdc_mem_ctl[2]
 147 BIT1    BONDOPT1                dcdcmem option 1:  dcdc_mem_ctl[1]
 148                                                 00: DDR2 (1.2v)
 149                                                 01: DDR3L (1.35v)
 150                                                 10: DDR3 (1.5v)
 151                                                 11: DDR1 (1.8v)
 152 BIT0    BONDOPT0                New power on reset option:
 153                                                 0: manual power on without hardware debounce
 154                                                 1: auto power on with 1s hardware debounce
 155 **************************************************************************/
 156 static u16 ana_status;
 157 static u32 ana_chip_id;
 158
 159 static DEFINE_MUTEX(adc_chan_mutex);
 160 extern int sci_efuse_get_cal(unsigned int * pdata, int num);
 161
 162
 163 static struct sci_regulator_desc *__get_desc(struct regulator_dev *rdev)
 164 {
 165         return (struct sci_regulator_desc *)rdev->desc;
 166 }
 167
 168 /* standard ldo ops*/
 169 static int ldo_turn_on(struct regulator_dev *rdev)
 170 {
 171         struct sci_regulator_desc *desc = __get_desc(rdev);
 172         struct sci_regulator_regs *regs = &desc->regs;
 173
 174         debug0("regu 0x%p (%s), set 0x%08x[%d], rst 0x%08x[%d]\n", regs,
 175                desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit),
 176                regs->pd_rst, __ffs(regs->pd_rst_bit));
 177
 178         if (regs->pd_rst)
 179                 ANA_REG_OR(regs->pd_rst, regs->pd_rst_bit);
 180
 181         if (regs->pd_set)
 182                 ANA_REG_BIC(regs->pd_set, regs->pd_set_bit);
 183
 184         debug("regu 0x%p (%s), turn on\n", regs, desc->desc.name);
 185         return 0;
 186 }
 187
 188 static int ldo_turn_off(struct regulator_dev *rdev)
 189 {
 190         struct sci_regulator_desc *desc = __get_desc(rdev);
 191         struct sci_regulator_regs *regs = &desc->regs;
 192
 193         debug0("regu 0x%p (%s), set 0x%08x[%d], rst 0x%08x[%d]\n", regs,
 194                desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit),
 195                regs->pd_rst, __ffs(regs->pd_rst_bit));
 196
 197 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
 198         if (regs->pd_set)
 199                 ANA_REG_OR(regs->pd_set, regs->pd_set_bit);
 200
 201         if (regs->pd_rst)
 202                 ANA_REG_BIC(regs->pd_rst, regs->pd_rst_bit);
 203 #endif
 204
 205         debug("regu 0x%p (%s), turn off\n", regs, desc->desc.name);
 206         return 0;
 207 }
 208
 209 static int ldo_is_on(struct regulator_dev *rdev)
 210 {
 211         int ret = -EINVAL;
 212         struct sci_regulator_desc *desc = __get_desc(rdev);
 213         struct sci_regulator_regs *regs = &desc->regs;
 214
 215         debug0("regu 0x%p (%s), set 0x%08x[%d], rst 0x%08x[%d]\n", regs,
 216                desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit),
 217                regs->pd_rst, __ffs(regs->pd_rst_bit));
 218
 219         if (regs->pd_rst && regs->pd_set) {
 220                 /*for pd_rst has higher prioty than pd_set, what's more, their reset values are the same, 0 */
 221                 ret = ! !(ANA_REG_GET(regs->pd_rst) & regs->pd_rst_bit);
 222                 /* FIXME: when reset, pd_set & pd_rst are all zero, always get here */
 223                 if (ret == ! !(ANA_REG_GET(regs->pd_set) & regs->pd_set_bit))
 224                         ret = -EINVAL;
 225         } else if (regs->pd_rst) {
 226                 ret = ! !(ANA_REG_GET(regs->pd_rst) & regs->pd_rst_bit);
 227         } else if (regs->pd_set) {      /* new feature */
 228                 ret = !(ANA_REG_GET(regs->pd_set) & regs->pd_set_bit);
 229         }
 230
 231         debug2("regu 0x%p (%s) turn on, return %d\n", regs, desc->desc.name, ret);
 232         return ret;
 233 }
 234
 235 static int ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
 236 {
 237         struct sci_regulator_desc *desc = __get_desc(rdev);
 238         struct sci_regulator_regs *regs = &desc->regs;
 239
 240         debug("regu 0x%p (%s), slp 0x%08x[%d] mode %x\n", regs, desc->desc.name,
 241               regs->slp_ctl, regs->slp_ctl_bit, mode);
 242
 243         if (!regs->slp_ctl)
 244                 return -EINVAL;
 245
 246         if (mode == REGULATOR_MODE_STANDBY) {   /* disable auto slp */
 247                 ANA_REG_BIC(regs->slp_ctl, regs->slp_ctl_bit);
 248         } else {
 249                 ANA_REG_OR(regs->slp_ctl, regs->slp_ctl_bit);
 250         }
 251
 252         return 0;
 253 }
 254
 255 static int ldo_set_voltage(struct regulator_dev *rdev, int min_uV,
 256                            int max_uV, unsigned *selector)
 257 {
 258         struct sci_regulator_desc *desc = __get_desc(rdev);
 259         struct sci_regulator_regs *regs = &desc->regs;
 260         //int mv = min_uV / 1000;
 261         int ret = -EINVAL;
 262         int i, shft = __ffs(regs->vol_ctl_bits);
 263
 264         BUG_ON(regs->vol_sel_cnt > 4);
 265
 266         debug("regu 0x%p (%s) set voltage, %d(uV) %d(uV)\n", regs, desc->desc.name, min_uV, max_uV);
 267
 268         if (!regs->vol_ctl)
 269                 return -EACCES;
 270
 271         for (i = 0; i < regs->vol_sel_cnt; i++) {
 272                 if (regs->vol_sel[i] == min_uV) {
 273                         ANA_REG_SET(regs->vol_ctl,
 274                                     i << shft,
 275                                     regs->vol_ctl_bits);
 276                         //clear_bit(desc->desc.id, trimming_state);
 277                         ret = 0;
 278                         break;
 279                 }
 280         }
 281
 282         WARN(0 != ret, "warning: regulator (%s) not support %d(uV)\n", desc->desc.name, min_uV);
 283         return ret;
 284 }
 285
 286 static int ldo_get_voltage(struct regulator_dev *rdev)
 287 {
 288         struct sci_regulator_desc *desc = __get_desc(rdev);
 289         struct sci_regulator_regs *regs = &desc->regs;
 290         u32 vol;
 291         int i, shft = __ffs(regs->vol_ctl_bits);
 292
 293         debug0("regu 0x%p (%s), vol ctl 0x%08x, shft %d, mask 0x%08x\n",
 294                regs, desc->desc.name, regs->vol_ctl, shft, regs->vol_ctl_bits);
 295
 296         if (!regs->vol_ctl)
 297                 return -EACCES;
 298
 299         BUG_ON(regs->vol_sel_cnt != 4);
 300         i = ((ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft);
 301
 302         vol = regs->vol_sel[i];
 303
 304         debug2("regu 0x%p (%s) get voltage %d(uV)\n", regs, desc->desc.name, vol);
 305         return vol;
 306 }
 307
 308
 309 /* FIXME: get dcdc cal offset config from uboot */
 310
 311
 312 typedef struct {
 313         u16 ideal_vol;
 314         const char name[14];
 315 }vol_para_t;
 316
 317
 318 int regulator_default_get(const char con_id[])
 319 {
 320 #define PP_VOL_PARA             ( 0x50005C20 )  /* assert in iram2 */
 321 #define TO_IRAM2(_p_)   ( SPRD_IRAM2_BASE + (u32)(_p_) - SPRD_IRAM2_PHYS )
 322 #define IN_IRAM2(_p_)   ( (u32)(_p_) >= SPRD_IRAM2_PHYS && (u32)(_p_) < SPRD_IRAM2_PHYS + SPRD_IRAM2_SIZE )
 323
 324         int i = 0, res = 0;
 325         vol_para_t *pvol_para = (vol_para_t *)__raw_readl((void *)TO_IRAM2(PP_VOL_PARA));
 326
 327         if (!(IN_IRAM2(pvol_para)))
 328                 return 0;
 329
 330         pvol_para = (vol_para_t *)TO_IRAM2(pvol_para);
 331
 332         if(strcmp((pvol_para)[0].name, "volpara_begin") || (0xfaed != (pvol_para)[0].ideal_vol))
 333                 return 0;
 334
 335         while(0 != strcmp((pvol_para)[i++].name, "volpara_end")) {
 336                 if (0 == strcmp((pvol_para)[i].name, con_id)) {
 337                         debug("%s name %s, ideal_vol %d\n", __func__, (pvol_para)[i].name, (pvol_para)[i].ideal_vol);
 338                         return res = (pvol_para)[i].ideal_vol;
 339                 }
 340         }
 341         return res;
 342 }
 343
 344 static int __init_trimming(struct regulator_dev *rdev)
 345 {
 346         struct sci_regulator_desc *desc = __get_desc(rdev);
 347         struct sci_regulator_regs *regs = &desc->regs;
 348         int ctl_vol, to_vol;
 349
 350         if (!regs->vol_trm)
 351                 return -1;
 352
 353         to_vol = regulator_default_get(desc->desc.name);
 354         to_vol *= 1000;
 355         if (!to_vol) {
 356                 to_vol = regs->vol_def;
 357         }
 358
 359         if (to_vol && rdev->desc->ops->get_voltage) {
 360                 ctl_vol = rdev->desc->ops->get_voltage(rdev);
 361                 rdev->constraints->uV_offset = ctl_vol - to_vol;//uV
 362                 debug("regu 0x%p (%s), uV offset %d\n", regs, desc->desc.name, rdev->constraints->uV_offset);
 363         }
 364
 365         return 0;
 366 }
 367
 368 static int dcdc_get_trimming_step(struct regulator_dev *rdev, int to_vol)
 369 {
 370         struct sci_regulator_desc *desc = __get_desc(rdev);
 371         struct sci_regulator_regs *regs = &desc->regs;
 372
 373         BUG_ON(!regs->step_uV);
 374
 375         return regs->step_uV;
 376 }
 377
 378 static int dcdc_initial_value(struct sci_regulator_desc *desc)
 379 {
 380         return ((0 == strcmp(desc->desc.name, "vddmem")) ? 0x10 : 0);
 381 }
 382
 383 static int __match_dcdc_vol(struct sci_regulator_regs *regs, u32 vol)
 384 {
 385         int i, j = -1;
 386         int ds, min_ds = 100 * 1000;    /* uV, the max range of small voltage */
 387
 388         for (i = 0; i < regs->vol_sel_cnt; i++) {
 389                 ds = vol - regs->vol_sel[i];
 390                 if (ds >= 0 && ds < min_ds) {
 391                         min_ds = ds;
 392                         j = i;
 393                 }
 394         }
 395
 396 #if 0
 397         if ((2 == regs->typ) && (j < 0)) {
 398                 for (i = 0; i < regs->vol_sel_cnt; i++) {
 399                         ds = abs(vol - regs->vol_sel[i]);
 400                         if (ds < min_ds) {
 401                                 min_ds = ds;
 402                                 j = i;
 403                         }
 404                 }
 405         }
 406 #endif
 407
 408         return j;
 409 }
 410
 411 static int __dcdc_enable_time(struct regulator_dev *rdev, int old_vol)
 412 {
 413         int vol = rdev->desc->ops->get_voltage(rdev);
 414         if (vol > old_vol) {
 415                 /* FIXME: for dcdc, each step (50mV) takes 10us */
 416                 int dly = (vol - old_vol) * 10 / (50 * 1000);
 417                 WARN_ON(dly > 1000);
 418                 udelay(dly);
 419         }
 420         return 0;
 421 }
 422
 423 static int dcdc_set_voltage(struct regulator_dev *rdev, int min_uV,
 424                             int max_uV, unsigned *selector)
 425 {
 426         struct sci_regulator_desc *desc = __get_desc(rdev);
 427         struct sci_regulator_regs *regs = &desc->regs;
 428         int i;
 429         //int mV = min_uV / 1000;
 430         int old_vol = rdev->desc->ops->get_voltage(rdev);
 431
 432         debug0("regu 0x%p (%s) %d %d\n", regs, desc->desc.name, min_uV, max_uV);
 433
 434         //BUG_ON(0 != __ffs(regs->vol_trm_bits));
 435         BUG_ON(regs->vol_sel_cnt > 8);
 436
 437         if (!regs->vol_ctl)
 438                 return -EACCES;
 439
 440         /* found the closely vol ctrl bits */
 441         i = __match_dcdc_vol(regs, min_uV);
 442         if (i < 0)
 443                 return WARN(-EINVAL, "not found %s closely ctrl bits for %d(uV)\n",
 444                             desc->desc.name, min_uV);
 445
 446         debug("regu 0x%p (%s) %d = %d %+duV\n", regs, desc->desc.name,
 447                min_uV, regs->vol_sel[i], min_uV - regs->vol_sel[i]);
 448
 449 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
 450         /* dcdc calibration control bits (default 00000),
 451          * small adjust voltage: 100/32mv ~= 3.125mv
 452          */
 453         {
 454                 int shft_ctl = __ffs(regs->vol_ctl_bits);
 455                 int shft_trm = __ffs(regs->vol_trm_bits);
 456                 int j = (int)(min_uV - regs->vol_sel[i]) / dcdc_get_trimming_step(rdev, min_uV) % 32;
 457
 458                 j += dcdc_initial_value(desc);
 459
 460                 BUG_ON(j > (regs->vol_trm_bits >> shft_trm));
 461
 462                 if (regs->vol_trm == regs->vol_ctl) { /* new feature */
 463                         ANA_REG_SET(regs->vol_ctl, (j << shft_trm) | (i << shft_ctl),
 464                                     regs->vol_trm_bits | regs->vol_ctl_bits);
 465                 } else {
 466                         if (regs->vol_trm) {    /* small adjust first */
 467                                 ANA_REG_SET(regs->vol_trm, j << shft_trm,
 468                                         regs->vol_trm_bits);
 469                         }
 470
 471                         if (regs->vol_ctl) {
 472                                 ANA_REG_SET(regs->vol_ctl, i << shft_ctl,
 473                                         regs->vol_ctl_bits);
 474                         }
 475                 }
 476         }
 477
 478         __dcdc_enable_time(rdev, old_vol);
 479 #endif
 480
 481         return 0;
 482 }
 483
 484 static int dcdc_get_voltage(struct regulator_dev *rdev)
 485 {
 486         struct sci_regulator_desc *desc = __get_desc(rdev);
 487         struct sci_regulator_regs *regs = &desc->regs;
 488         u32 uV;
 489         int i, cal = 0 /* uV */;
 490         int shft_ctl = __ffs(regs->vol_ctl_bits);
 491         int shft_trm = __ffs(regs->vol_trm_bits);
 492
 493         debug0("regu 0x%p (%s), vol ctl 0x%08x, shft %d, mask 0x%08x, sel %d\n",
 494                regs, desc->desc.name, regs->vol_ctl,
 495                shft_ctl, regs->vol_ctl_bits, regs->vol_sel_cnt);
 496
 497         if (!regs->vol_ctl)
 498                 return -EINVAL;
 499
 500         //BUG_ON(0 != shft_trm);
 501         BUG_ON(regs->vol_sel_cnt > 8);
 502
 503         i = (ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft_ctl;
 504
 505         uV = regs->vol_sel[i];
 506
 507         if (regs->vol_trm) {
 508                 cal = (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >> shft_trm;
 509                 cal -= dcdc_initial_value(desc);
 510                 cal *= dcdc_get_trimming_step(rdev, 0); /*uV */
 511         }
 512
 513         debug2("regu 0x%p (%s) %d +%duv\n", regs, desc->desc.name, uV, cal);
 514
 515         return (uV + cal) /*uV */;
 516 }
 517
 518
 519 /* standard boost ops*/
 520 #define MAX_CURRENT_SINK        (500)   /*FIXME: max current sink */
 521 static int boost_set_current_limit(struct regulator_dev *rdev, int min_uA,
 522                                    int max_uA)
 523 {
 524         struct sci_regulator_desc *desc = __get_desc(rdev);
 525         struct sci_regulator_regs *regs = &desc->regs;
 526         int ma = min_uA / 1000;
 527         int ret = -EACCES;
 528         int i, shft = __ffs(regs->vol_ctl_bits);
 529         int trim = (int)regs->vol_def / (1000 * 1000);
 530         int steps = (regs->vol_ctl_bits >> shft) + 1;
 531
 532         debug("regu 0x%p (%s) %d %d\n", regs, desc->desc.name, min_uA, max_uA);
 533
 534         if (!regs->vol_ctl)
 535                 goto exit;
 536
 537         if (trim > 0) {
 538                 trim <<= __ffs(regs->vol_trm_bits);
 539         }
 540
 541         i = ma * steps / MAX_CURRENT_SINK;
 542         if (i >= 0 && i < steps) {
 543                 ANA_REG_SET(regs->vol_ctl, (i << shft) | trim,
 544                             regs->vol_ctl_bits | regs->vol_trm_bits);
 545
 546                 ret = 0;
 547         }
 548
 549         WARN(0 != ret,
 550              "warning: regulator (%s) not support %dmA\n", desc->desc.name, ma);
 551
 552 exit:
 553         return ret;
 554 }
 555
 556 static int boost_get_current_limit(struct regulator_dev *rdev)
 557 {
 558         struct sci_regulator_desc *desc = __get_desc(rdev);
 559         struct sci_regulator_regs *regs = &desc->regs;
 560         u32 cur;
 561         int i, shft = __ffs(regs->vol_ctl_bits);
 562         int steps = (regs->vol_ctl_bits >> shft) + 1;
 563
 564         debug0("regu 0x%p (%s), vol ctl 0x%08x, shft %d, mask 0x%08x\n",
 565                regs, desc->desc.name, regs->vol_ctl, shft, regs->vol_ctl_bits);
 566
 567         if (!regs->vol_ctl)
 568                 return -EACCES;
 569
 570         i = ((ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft);
 571         cur = i * MAX_CURRENT_SINK / steps;
 572         debug("regu 0x%p (%s) get current %d\n", regs, desc->desc.name, cur);
 573         return cur * 1000;
 574 }
 575
 576 static int adc_sample_bit = 1;  /*12bits mode */
 577 static short adc_data[3][2]
 578 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
 579     = {
 580         {4200, 3320},           /* same as nv adc_t */
 581         {3600, 2844},
 582         {400, 316},             /* 0.4@VBAT, Reserved IdealC Value */
 583 }
 584 #endif
 585 ;
 586
 587 static int __is_valid_adc_cal(void)
 588 {
 589         return 0 != adc_data[0][0];
 590 }
 591
 592 static int __init __adc_cal_setup(char *str)
 593 {
 594         u32 *p = (u32 *) adc_data;
 595         *p = simple_strtoul(str, &str, 0);
 596
 597         if (*p++ && *++str) {
 598                 *p = simple_strtoul(str, &str, 0);
 599                 if (*p) {
 600                         debug("%d : %d -- %d : %d\n",
 601                               (int)adc_data[0][0], (int)adc_data[0][1],
 602                               (int)adc_data[1][0], (int)adc_data[1][1]);
 603                         if (adc_data[0][1] < BIT(10)
 604                             && adc_data[1][1] < BIT(10))
 605                                 adc_sample_bit = 0;     /*10bits mode */
 606                 }
 607         }
 608         return 0;
 609 }
 610 early_param("adc_cal", __adc_cal_setup);
 611
 612 static int __init __adc_cal_fuse_setup(void)
 613 {
 614         if (!__is_valid_adc_cal() &&
 615             (0 == sci_efuse_get_cal((u32 *) adc_data, 2))) {
 616                 debug("%d : %d -- %d : %d\n",
 617                       (int)adc_data[0][0], (int)adc_data[0][1],
 618                       (int)adc_data[1][0], (int)adc_data[1][1]);
 619         }
 620         return 0;
 621 }
 622
 623 static int __adc2vbat(int adc_res)
 624 {
 625         int t = adc_data[0][0] - adc_data[1][0];
 626         t *= (adc_res - adc_data[0][1]);
 627         t /= (adc_data[0][1] - adc_data[1][1]);
 628         t += adc_data[0][0];
 629         return t;
 630 }
 631
 632 #define MEASURE_TIMES   (15)
 633
 634 static void __dump_adc_result(u32 adc_val[])
 635 {
 636 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
 637         int i;
 638         for (i = 0; i < MEASURE_TIMES; i++) {
 639                 printk("%d ", adc_val[i]);
 640         }
 641         printk("\n");
 642 #endif
 643 }
 644
 645 static int cmp_val(const void *a, const void *b)
 646 {
 647         return *(int *)a - *(int *)b;
 648 }
 649
 650 /**
 651  * __adc_voltage - get regulator output voltage through auxadc
 652  * @regulator: regulator source
 653  *
 654  * This returns the current regulator voltage in mV.
 655  *
 656  * NOTE: If the regulator is disabled it will return the voltage value. This
 657  * function should not be used to determine regulator state.
 658  */
 659 static int regu_adc_voltage(struct regulator_dev *rdev)
 660 {
 661         struct sci_regulator_desc *desc = __get_desc(rdev);
 662         struct sci_regulator_regs *regs = &desc->regs;
 663
 664         int ret, adc_chan = regs->cal_chan;
 665         u16 ldo_cal_sel = regs->cal_ctl_bits & 0xFFFF;
 666         u32 adc_res, adc_val[MEASURE_TIMES];
 667         u32 chan_numerators = 1, chan_denominators = 1;
 668         u32 bat_numerators, bat_denominators;
 669
 670         struct adc_sample_data data = {
 671                 .channel_id = adc_chan,
 672                 .channel_type = 0,      /*sw */
 673                 .hw_channel_delay = 0,  /*reserved */
 674                 .scale = 1,     /*big scale */
 675                 .pbuf = &adc_val[0],
 676                 .sample_num = MEASURE_TIMES,
 677                 .sample_bits = adc_sample_bit,
 678                 .sample_speed = 0,      /*quick mode */
 679                 .signal_mode = 0,       /*resistance path */
 680         };
 681
 682         if (!__is_valid_adc_cal())
 683                 return -EACCES;
 684
 685         if (!regs->cal_ctl)
 686                 return -EINVAL;
 687
 688         /* enable ldo cal before adc sampling and ldo calibration */
 689         if (ldo_cal_sel) {
 690                 mutex_lock(&adc_chan_mutex);
 691                 ANA_REG_OR(regs->cal_ctl, ldo_cal_sel);
 692                 debug0("%s adc channel %d : %04x\n",
 693                        desc->desc.name, data.channel_id, ldo_cal_sel);
 694         }
 695
 696         ret = sci_adc_get_values(&data);
 697         BUG_ON(0 != ret);
 698
 699         /* close ldo cal and release multiplexed aux adc channel */
 700         if (ldo_cal_sel) {
 701                 ANA_REG_BIC(regs->cal_ctl, ldo_cal_sel);
 702                 mutex_unlock(&adc_chan_mutex);
 703         }
 704
 705         __dump_adc_result(adc_val);
 706         sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
 707         /*__dump_adc_result(adc_val);*/
 708
 709         sci_adc_get_vol_ratio(data.channel_id, data.scale,
 710                               &chan_numerators, &chan_denominators);
 711
 712         sci_adc_get_vol_ratio(ADC_CHANNEL_VBAT, 0, &bat_numerators, &bat_denominators);
 713
 714         adc_res = adc_val[MEASURE_TIMES / 2];
 715         debug("%s adc channel %d : 0x%04x, ratio (%d/%d), result value %d\n",
 716               desc->desc.name, data.channel_id, ldo_cal_sel,
 717               chan_numerators, chan_denominators, adc_res);
 718
 719         if (adc_res == 0)
 720                 return -EAGAIN;
 721         else
 722                 return __adc2vbat(adc_res)
 723                     * (bat_numerators * chan_denominators)
 724                     / (bat_denominators * chan_numerators);
 725 }
 726
 727 #ifndef CONFIG_REGULATOR_SC2713
 728 /**
 729  * regulator_strongly_disable - strongly disable regulator output
 730  * @regulator: regulator source
 731  *
 732  * Strongly try disable the regulator output voltage or current.
 733  * NOTE: this *will* disable the regulator output even if other consumer
 734  * devices have it enabled. This should be used for situations when device
 735  * had unbalanced with calls to regulator_enable().
 736  * *Not* recommended to call this function before try to balance the use_count.
 737  */
 738 int regulator_strongly_disable(struct regulator *regulator)
 739 {
 740         struct regulator_dev *rdev = regulator_get_drvdata(regulator);
 741         int ret = 0;
 742
 743         if (rdev)
 744                 while (rdev->use_count--)
 745                         regulator_disable(regulator);
 746
 747         return ret;
 748 }
 749
 750 EXPORT_SYMBOL_GPL(regulator_strongly_disable);
 751 #endif
 752
 753 static struct regulator_ops ldo_ops = {
 754         .enable = ldo_turn_on,
 755         .disable = ldo_turn_off,
 756         .is_enabled = ldo_is_on,
 757         .set_voltage = ldo_set_voltage,
 758         .get_voltage = ldo_get_voltage,
 759         .set_mode = ldo_set_mode,
 760 /*      .enable_time = ldo_enable_time, */
 761 };
 762
 763
 764 static struct regulator_ops dcdc_ops = {
 765         .enable = ldo_turn_on,
 766         .disable = ldo_turn_off,
 767         .is_enabled = ldo_is_on,
 768         .set_voltage = dcdc_set_voltage,
 769         .get_voltage = dcdc_get_voltage,
 770 };
 771
 772 static struct regulator_ops boost_ops = {
 773         .enable = ldo_turn_on,
 774         .disable = ldo_turn_off,
 775         .is_enabled = ldo_is_on,
 776         .set_current_limit = boost_set_current_limit,
 777         .get_current_limit = boost_get_current_limit,
 778         .set_mode = ldo_set_mode,
 779 };
 780
 781
 782 /*
 783  * Consider the following machine :-
 784  *
 785  *   Regulator-1 -+-> [Consumer A @ 1.8V]
 786  *                |
 787  *                +-> [Consumer B @ 1.8V]
 788  *
 789  *   Regulator-2 ---> [Consumer C @ 3.3V]
 790  *
 791  * The drivers for consumers A & B must be mapped to the correct regulator in
 792  * order to control their power supply. This mapping can be achieved in board/machine
 793  * initialisation code by creating a struct regulator_consumer_supply for each regulator.
 794  * Alternatively, we built a regulator supply-consumers map, the format is as follow:
 795  *
 796  *      supply source-1, consumer A, consumer B, ..., NULL
 797  *      supply source-2, consumer C, ..., NULL
 798  *      ...
 799  *      NULL
 800  *
 801  */
 802 static struct regulator_consumer_supply *set_supply_map(struct device *dev,
 803                                                         const char *supply_name,
 804                                                         int *num)
 805 {
 806         char **map = (char **)dev_get_platdata(dev);
 807         int i, n;
 808         struct regulator_consumer_supply *consumer_supplies = NULL;
 809
 810         if (!supply_name || !(map && map[0]))
 811                 return NULL;
 812
 813         for (i = 0; map[i] || map[i + 1]; i++) {
 814                 if (map[i] && 0 == strcmp(map[i], supply_name))
 815                         break;
 816         }
 817
 818         /* i++; *//* Do not skip supply name */
 819
 820         for (n = 0; map[i + n]; n++) ;
 821
 822         if (n) {
 823                 debug0("supply %s consumers %d - %d\n", supply_name, i, n);
 824                 consumer_supplies =
 825                     kzalloc(n * sizeof(*consumer_supplies), GFP_KERNEL);
 826                 BUG_ON(!consumer_supplies);
 827                 for (n = 0; map[i]; i++, n++) {
 828                         consumer_supplies[n].supply = map[i];
 829                 }
 830                 if (num)
 831                         *num = n;
 832         }
 833         return consumer_supplies;
 834 }
 835
 836 #if defined(CONFIG_DEBUG_FS)
 837 static struct dentry *debugfs_root = NULL;
 838
 839 static u32 ana_addr = 0;
 840 static int debugfs_ana_addr_get(void *data, u64 * val)
 841 {
 842         if (ana_addr < PAGE_SIZE) {
 843                 *val = ANA_REG_GET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK));
 844         } else {
 845                 void *addr = ioremap(ana_addr, PAGE_SIZE);
 846                 *val = __raw_readl(addr);
 847                 iounmap(addr);
 848         }
 849         return 0;
 850 }
 851
 852 static int debugfs_ana_addr_set(void *data, u64 val)
 853 {
 854         if (ana_addr < PAGE_SIZE) {
 855                 ANA_REG_SET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK), val, -1);
 856         } else {
 857                 void *addr = ioremap(ana_addr, PAGE_SIZE);
 858                 __raw_writel(val, addr);
 859                 iounmap(addr);
 860         }
 861         return 0;
 862 }
 863
 864 static int adc_chan = 5 /*VBAT*/;
 865 static int debugfs_adc_chan_get(void *pdata, u64 * val)
 866 {
 867         int i, ret;
 868         u32 adc_res, adc_val[MEASURE_TIMES];
 869         struct adc_sample_data data = {
 870                 .channel_id = adc_chan,
 871                 .channel_type = 0,      /*sw */
 872                 .hw_channel_delay = 0,  /*reserved */
 873                 .scale = 1,     /*big scale */
 874                 .pbuf = &adc_val[0],
 875                 .sample_num = MEASURE_TIMES,
 876                 .sample_bits = adc_sample_bit,
 877                 .sample_speed = 0,      /*quick mode */
 878                 .signal_mode = 0,       /*resistance path */
 879         };
 880
 881         ret = sci_adc_get_values(&data);
 882         BUG_ON(0 != ret);
 883
 884         for (i = 0; i < MEASURE_TIMES; i++) {
 885                 printk("%d ", adc_val[i]);
 886         }
 887         printk("\n");
 888
 889         sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
 890         adc_res = adc_val[MEASURE_TIMES / 2];
 891         pr_info("adc chan %d, result value %d, vbat %d\n",
 892                 data.channel_id, adc_res, __adc2vbat(adc_res));
 893         *val = adc_res;
 894         return 0;
 895 }
 896
 897 static int debugfs_adc_chan_set(void *data, u64 val)
 898 {
 899         adc_chan = val;
 900         return 0;
 901 }
 902
 903 static int debugfs_enable_get(void *data, u64 * val)
 904 {
 905         struct regulator_dev *rdev = data;
 906         if (rdev && rdev->desc->ops->is_enabled)
 907                 *val = rdev->desc->ops->is_enabled(rdev);
 908         else
 909                 *val = -1;
 910         return 0;
 911 }
 912
 913 static int debugfs_enable_set(void *data, u64 val)
 914 {
 915         struct regulator_dev *rdev = data;
 916         if (rdev && rdev->desc->ops->enable)
 917                 (val) ? rdev->desc->ops->enable(rdev)
 918                     : rdev->desc->ops->disable(rdev);
 919         return 0;
 920 }
 921
 922 static int debugfs_voltage_get(void *data, u64 * val)
 923 {
 924         struct regulator_dev *rdev = data;
 925         if (rdev)
 926                 *val = regu_adc_voltage(rdev);
 927         else
 928                 *val = -1;
 929         return 0;
 930 }
 931
 932 static int debugfs_voltage_set(void *data, u64 val)
 933 {
 934         struct regulator_dev *rdev = data;
 935         if (rdev && rdev->desc->ops->set_voltage) {
 936                 u32 min_uV = (u32)val * 1000;
 937                 min_uV += rdev->constraints->uV_offset;
 938                 rdev->desc->ops->set_voltage(rdev, min_uV, min_uV, 0);
 939         }
 940         return 0;
 941 }
 942
 943
 944 static int debugfs_boost_get(void *data, u64 * val)
 945 {
 946         struct regulator_dev *rdev = data;
 947         if (rdev && rdev->desc->ops->get_current_limit)
 948                 *val = rdev->desc->ops->get_current_limit(rdev) / 1000;
 949         else
 950                 *val = -1;
 951         return 0;
 952 }
 953
 954 static int debugfs_boost_set(void *data, u64 val)
 955 {
 956         struct regulator_dev *rdev = data;
 957         if (rdev && rdev->desc->ops->set_current_limit)
 958                 rdev->desc->ops->set_current_limit(rdev, val * 1000,
 959                                                    val * 1000);
 960         return 0;
 961 }
 962
 963 DEFINE_SIMPLE_ATTRIBUTE(fops_ana_addr,
 964                         debugfs_ana_addr_get, debugfs_ana_addr_set, "%llu\n");
 965 DEFINE_SIMPLE_ATTRIBUTE(fops_adc_chan,
 966                         debugfs_adc_chan_get, debugfs_adc_chan_set, "%llu\n");
 967 DEFINE_SIMPLE_ATTRIBUTE(fops_enable,
 968                         debugfs_enable_get, debugfs_enable_set, "%llu\n");
 969 DEFINE_SIMPLE_ATTRIBUTE(fops_ldo,
 970                         debugfs_voltage_get, debugfs_voltage_set, "%llu\n");
 971 DEFINE_SIMPLE_ATTRIBUTE(fops_boost,
 972                         debugfs_boost_get, debugfs_boost_set, "%llu\n");
 973
 974 static void rdev_init_debugfs(struct regulator_dev *rdev)
 975 {
 976         struct sci_regulator_desc *desc = __get_desc(rdev);
 977         desc->debugfs = debugfs_create_dir(rdev->desc->name, debugfs_root);
 978         if (IS_ERR_OR_NULL(rdev->debugfs)) {
 979                 pr_warn("Failed to create debugfs directory\n");
 980                 rdev->debugfs = NULL;
 981                 return;
 982         }
 983
 984         debugfs_create_file("enable", S_IRUGO | S_IWUSR,
 985                             desc->debugfs, rdev, &fops_enable);
 986
 987         if (desc->desc.type == REGULATOR_CURRENT)
 988                 debugfs_create_file("current", S_IRUGO | S_IWUSR,
 989                                     desc->debugfs, rdev, &fops_boost);
 990         else
 991                 debugfs_create_file("voltage", S_IRUGO | S_IWUSR,
 992                                     desc->debugfs, rdev, &fops_ldo);
 993 }
 994 #else
 995 static void rdev_init_debugfs(struct regulator_dev *rdev)
 996 {
 997 }
 998 #endif
 999
1000
1001 static inline int __strcmp(const char *cs, const char *ct)
1002 {
1003         if (!cs || !ct)
1004                 return -1;
1005
1006         return strcmp(cs, ct);
1007 }
1008
1009 static struct of_device_id sprd_regulator_of_match[] = {
1010         { .compatible = "sprd,sc2713s-regulator", },
1011         { }
1012 };
1013 //MODULE_DEVICE_TABLE(of, sprd_regulator_of_match);
1014
1015 #undef REGS_ANA_GLB_BASE
1016 #ifndef REGS_ANA_GLB_BASE
1017 #define REGS_ANA_GLB_PHYS                       (SPRD_ADI_PHYS + 0x8800)
1018 #define REGS_ANA_GLB_BASE                       (SPRD_ADI_BASE + 0x8800)
1019 #define REGS_ANA_GLB_SIZE                       (SZ_2K) //0x40038800 ~ 0x40039000
1020 #endif
1021
1022 #define IS_VALID_ANA_ADDR(pa, pa_base, size)    ( (pa) >= (pa_base) && (pa) < (pa_base) + (size) )
1023 #define PHY_TO_VIR(pa, pa_base, va_base)                ( (pa) - (pa_base) + (va_base) )
1024
1025 static u32 phy2vir(const u32 reg_phy)
1026 {
1027         u32 reg_vir = 0;
1028
1029         if(!reg_phy)
1030                 return 0;
1031
1032         if (IS_VALID_ANA_ADDR(reg_phy, REGS_ANA_GLB_PHYS, REGS_ANA_GLB_SIZE)) {
1033                 reg_vir = (u32)(PHY_TO_VIR(reg_phy, REGS_ANA_GLB_PHYS, REGS_ANA_GLB_BASE));
1034         } else {
1035                 WARN(1, "reg(0x%08x) physical address is invalid!\n", reg_phy);
1036         }
1037
1038         return reg_vir;
1039 }
1040
1041 static int reconfig_regulator(struct sci_regulator_desc *desc)
1042 {
1043         struct sci_regulator_regs *regs = &desc->regs;
1044
1045         /* Fixme: Config dynamically dcdc/ldo
1046          *   accoring to bit BONDOPT4 & BONDOPT6 for Reg(0x40038800 + 0x00E4)
1047          */
1048
1049         /* BONDOPT6 */
1050         if ((ana_status >> 6) & 0x1) {
1051                 if (0 == strcmp(desc->desc.name, "vddcore")) {
1052                         regs->vol_def = 900;
1053                         regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1054                         regs->vol_ctl_bits = BIT(3)|BIT(4)|BIT(5);
1055                 } else if (0 == strcmp(desc->desc.name, "vddarm")) {
1056                         regs->vol_def = 900;
1057                         regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1058                         regs->vol_ctl_bits = BIT(6)|BIT(7)|BIT(8);
1059                 } else if (0 == strcmp(desc->desc.name, "vdd25")) {
1060                         regs->vol_def = 1800;
1061                         regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1062                         regs->vol_ctl_bits = BIT(9)|BIT(10);
1063                         regs->vol_sel[0] = 2500;
1064                         regs->vol_sel[1] = 2750;
1065                         regs->vol_sel[2] = 1800;
1066                         regs->vol_sel[3] = 1900;
1067                 }
1068         } else {
1069                 if (0 == strcmp(desc->desc.name, "vddcore")) {
1070                         regs->vol_def = 1100;
1071                         regs->vol_ctl = (u32)ANA_REG_GLB_DCDC_CORE_ADI;
1072                         regs->vol_ctl_bits = BIT(5)|BIT(6)|BIT(7);
1073                 } else if (0 == strcmp(desc->desc.name, "vddarm")) {
1074                         regs->vol_def = 1100;
1075                         regs->vol_ctl = (u32)ANA_REG_GLB_DCDC_ARM_ADI;
1076                         regs->vol_ctl_bits = BIT(5)|BIT(6)|BIT(7);
1077                 } else if (0 == strcmp(desc->desc.name, "vdd25")) {
1078                         regs->vol_def = 2500;
1079                         regs->vol_ctl = (u32)ANA_REG_GLB_LDO_V_CTRL0;
1080                         regs->vol_ctl_bits = BIT(4)|BIT(5);
1081                         regs->vol_sel[0] = 2500;
1082                         regs->vol_sel[1] = 2750;
1083                         regs->vol_sel[2] = 3000;
1084                         regs->vol_sel[3] = 2900;
1085                 }
1086         }
1087
1088         /* BONDOPT4 */
1089         if ((ana_status >> 4) & 0x1) {
1090                 if (0 == strcmp(desc->desc.name, "vddwrf")) {
1091                         regs->vol_def = 2800;
1092                         regs->vol_sel[0] = 2600;
1093                         regs->vol_sel[1] = 2700;
1094                         regs->vol_sel[2] = 2800;
1095                         regs->vol_sel[3] = 2900;
1096                 } else if (0 == strcmp(desc->desc.name, "vddrf1")) {
1097                         regs->vol_def = 2850;
1098                         regs->vol_ctl = (u32)ANA_REG_GLB_LDO_V_CTRL0;
1099                         regs->vol_ctl_bits = BIT(8)|BIT(9);
1100                 }
1101         } else {
1102                 if (0 == strcmp(desc->desc.name, "vddwrf")) {
1103                         regs->vol_def = 1500;
1104                         regs->vol_sel[0] = 1300;
1105                         regs->vol_sel[1] = 1400;
1106                         regs->vol_sel[2] = 1500;
1107                         regs->vol_sel[3] = 1600;
1108                 } else if (0 == strcmp(desc->desc.name, "vddrf1")) {
1109                         regs->vol_def = 1200;
1110                         regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1111                         regs->vol_ctl_bits = BIT(11)|BIT(12);
1112                 }
1113         }
1114
1115         return 0;
1116 }
1117
1118 #define GET_CTL_BITS(bh, bl)    ( ((1 << ((bh) - (bl) + 1)) - 1) << (bl) )
1119
1120 static int of_regu_read_reg(struct device_node *np, int idx,
1121                 struct sci_regulator_regs *regs)
1122 {
1123         const __be32 *cell;
1124         u32 reg_phy;
1125         int count;
1126
1127         if(!np || !regs)
1128                 return -EINVAL;
1129
1130         cell = of_get_property(np, "reg", &count);
1131         count /= 4;
1132         if(cell)
1133                 WARN_ON(idx >= count);
1134
1135         cell = of_get_address(np, idx, NULL, NULL);
1136
1137         switch(idx) {
1138         case 0: /* ldo/dcdc power down */
1139                 if(cell) {
1140                         reg_phy = (u32)be32_to_cpu(*(cell++));
1141                         regs->pd_set = phy2vir(reg_phy);
1142                         regs->pd_set_bit = (u32)be32_to_cpu(*(cell++));
1143                         debug0("reg(%s) pd_set phy addr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x\n",
1144                                 np->name, reg_phy, regs->pd_set, regs->pd_set_bit);
1145                 }
1146                 break;
1147         case 1: /* ldo/dcdc power reset */
1148                 if(cell) {
1149                         reg_phy = (u32)be32_to_cpu(*(cell++));
1150                         regs->pd_rst = phy2vir(reg_phy);
1151                         regs->pd_rst_bit = (u32)be32_to_cpu(*(cell++));
1152                         debug0("reg(%s) pd_rst phy addr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x\n",
1153                                 np->name, reg_phy, regs->pd_rst, regs->pd_rst_bit);
1154                 }
1155                 break;
1156         case 2: /* ldo/dcdc auto sleep control */
1157                 if(cell) {
1158                         reg_phy = (u32)be32_to_cpu(*(cell++));
1159                         regs->slp_ctl = phy2vir(reg_phy);
1160                         regs->slp_ctl_bit = (u32)be32_to_cpu(*(cell++));
1161                         debug0("reg(%s) slp_ctl phy addr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x\n",
1162                                 np->name, reg_phy, regs->slp_ctl, regs->slp_ctl_bit);
1163                 }
1164                 break;
1165         default:
1166                 break;
1167         }
1168
1169         return 0;
1170 }
1171
1172 static int sci_regulator_parse_dt(struct platform_device *pdev,
1173                         struct device_node *np, struct sci_regulator_desc *desc,
1174                         struct regulator_consumer_supply *supply, int sz)
1175 {
1176         struct sci_regulator_regs *regs = &desc->regs;
1177         const __be32 *tmp;
1178         u32 data[8] = {0};
1179         u32 tmp_val_u32;
1180         int type = 0, cnt = 0, ret = 0;
1181
1182         if(!pdev || !np || !desc || !supply) {
1183                 return -EINVAL;
1184         }
1185
1186         desc->desc.name = np->name;
1187         desc->desc.id = (atomic_inc_return(&idx) - 1);
1188         desc->desc.type = REGULATOR_VOLTAGE;
1189         desc->desc.owner = THIS_MODULE;
1190
1191         supply[0].dev_name = NULL;
1192         supply[0].supply = np->name;
1193         desc->init_data = of_get_regulator_init_data(&pdev->dev, np);
1194         if (!desc->init_data || 0 != __strcmp(desc->init_data->constraints.name, np->name)) {
1195                 dev_err(&pdev->dev, "failed to parse regulator(%s) init data! \n", np->name);
1196                 return -EINVAL;
1197         }
1198
1199         desc->init_data->supply_regulator = 0;
1200         desc->init_data->constraints.valid_modes_mask =
1201                 REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
1202         desc->init_data->constraints.valid_ops_mask =
1203                 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE;
1204         desc->init_data->num_consumer_supplies = sz;
1205
1206         desc->init_data->consumer_supplies =
1207                 set_supply_map(&pdev->dev, desc->desc.name,
1208                            &desc->init_data->num_consumer_supplies);
1209
1210         if (!desc->init_data->consumer_supplies)
1211                 desc->init_data->consumer_supplies = supply;
1212
1213         /* Fill struct sci_regulator_regs variable desc->regs */
1214         type = (of_property_read_bool(np, "dcdc") ? 2 : 0);
1215         regs->typ = type;
1216
1217         of_regu_read_reg(np, 0, regs);
1218         of_regu_read_reg(np, 1, regs);
1219         of_regu_read_reg(np, 2, regs);
1220
1221         regs->min_uV = desc->init_data->constraints.min_uV;
1222 #if 0
1223         //ret = of_property_read_u32(np, "regulator-min-microvolt", &desc->regs.vol_def);
1224         tmp = of_get_property(np, "regulator-min-microvolt", NULL);
1225         if (tmp)
1226                 regs->vol_def = be32_to_cpu(*tmp);
1227 #endif
1228
1229         ret = of_property_read_u32(np, "regulator-step-microvolt", &tmp_val_u32);
1230         if(!ret)
1231                 regs->step_uV = tmp_val_u32;
1232
1233         ret = of_property_read_u32(np, "regulator-default-microvolt", &tmp_val_u32);
1234         if(!ret)
1235                 regs->vol_def = tmp_val_u32;
1236
1237         debug("[%d] %s type %d, range %d(uV) - %d(uV), step %d(uV), defult %d(uV)\n", (idx.counter - 1),
1238                 np->name, type, desc->init_data->constraints.min_uV, desc->init_data->constraints.max_uV,
1239                 regs->step_uV, regs->vol_def);
1240
1241         tmp = of_get_property(np, "reg-vol", &cnt);
1242         if (tmp) {
1243                 debug0("prop reg-vol len %d\n", cnt);
1244                 cnt /= 4;
1245                 ret = of_property_read_u32_array(np, "reg-vol", data, cnt);
1246                 if(!ret) {
1247                         regs->vol_ctl = phy2vir(data[0]);
1248                         regs->vol_ctl_bits = data[1];
1249                         regs->vol_trm = phy2vir(data[2]);
1250                         regs->vol_trm_bits = data[3];
1251                 }
1252
1253                 debug0("vol_ctl (phyaddr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x) \n",
1254                         data[0], regs->vol_ctl, regs->vol_ctl_bits);
1255
1256                 debug0("vol_trm (phyaddr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x)\n",
1257                         data[2], regs->vol_trm, regs->vol_trm_bits);
1258         }
1259
1260         tmp = of_get_property(np, "regulator-cal-channel", &cnt);
1261         if (tmp) {
1262                 cnt /= 4;
1263                 ret = of_property_read_u32_array(np, "regulator-cal-channel", data, cnt);
1264                 if(!ret) {
1265                         regs->cal_ctl = phy2vir(data[0]);
1266                         regs->cal_ctl_bits = data[1];
1267                         regs->cal_chan = data[2];
1268                 }
1269
1270                 debug0("cal_ctl (phyaddr: 0x%08x, vir addr: 0x%08x, msk: 0x%08x, chan: %d)\n",
1271                         data[0], regs->cal_ctl, regs->cal_ctl_bits, regs->cal_chan);
1272         }
1273
1274         tmp = of_get_property(np, "regulator-selects", &cnt);
1275         if (tmp) {
1276                 debug0("prop regulator-selects count(%d)\n", cnt);
1277                 cnt /= 4;
1278                 ret = of_property_read_u32_array(np, "regulator-selects", data, cnt);
1279                 if(!ret) {
1280                         int i = 0;
1281
1282                         /* Dynamically allocate memory for voltage select array */
1283                         regs->vol_sel = kzalloc(cnt * sizeof(*regs->vol_sel), GFP_KERNEL);
1284                         if (!regs->vol_sel) {
1285                                 pr_err("%s() failed to allocate memory for voltage select\n", __func__);
1286                                 return -ENOMEM;
1287                         }
1288
1289                         regs->vol_sel_cnt = cnt;
1290                         for(i = 0; i < cnt; i++) {
1291                                 regs->vol_sel[i] = data[i];
1292                         }
1293                 }
1294         }
1295
1296         return 0;
1297 }
1298
1299 static int sci_regulator_register_dt(struct platform_device *pdev)
1300 {
1301         struct sci_regulator_desc *sci_desc = NULL;
1302
1303         struct regulator_dev *rdev;
1304         struct regulator_ops *__regs_ops[] = {
1305                 &ldo_ops, 0, &dcdc_ops, 0 /*lpref_ops */ , &boost_ops, 0,
1306         };
1307         struct regulator_consumer_supply consumer_supplies_default[1] = { };
1308         struct regulator_config config = { };
1309
1310         struct device_node *dev_np = pdev->dev.of_node;
1311         struct device_node *child_np;
1312         int regu_cnt = 0, ret = 0;
1313
1314         regu_cnt = of_get_child_count(dev_np);
1315         if (!regu_cnt)
1316                 return -EINVAL;
1317
1318         regu_cnt -= 1; /* exclude dummy node */
1319
1320         sci_desc_list = devm_kzalloc(&pdev->dev, regu_cnt * sizeof(struct sci_regulator_desc), GFP_KERNEL);
1321         if (!sci_desc_list) {
1322                 dev_err(&pdev->dev, "failed allocate memory for sci_regulator_desc list\n");
1323                 return -ENOMEM;
1324         }
1325         sci_desc = sci_desc_list;
1326
1327         debug("regulators desc list 0x%p, count %d, sci_regulator_desc size %d\n", sci_desc, regu_cnt, sizeof(struct sci_regulator_desc));
1328
1329         for_each_child_of_node(dev_np, child_np) {
1330                 if(0 == strcmp(child_np->name, "dummy")) /* skip dummy node */
1331                         continue;
1332
1333                 ret = sci_regulator_parse_dt(pdev, child_np, sci_desc, consumer_supplies_default, ARRAY_SIZE(consumer_supplies_default));
1334                 if(ret) {
1335                         dev_err(&pdev->dev, "failed to parse regulator(%s) dts\n", child_np->name);
1336                         continue;
1337                 }
1338
1339                 reconfig_regulator(sci_desc);
1340
1341                 BUG_ON(sci_desc->regs.pd_set
1342                        && sci_desc->regs.pd_set == sci_desc->regs.pd_rst
1343                        && sci_desc->regs.pd_set_bit == sci_desc->regs.pd_rst_bit);
1344
1345                 BUG_ON(sci_desc->regs.typ >= ARRAY_SIZE(__regs_ops));
1346                 if (!sci_desc->desc.ops)
1347                         sci_desc->desc.ops = __regs_ops[sci_desc->regs.typ];
1348
1349         config.dev = &pdev->dev;
1350         config.init_data = sci_desc->init_data;
1351         config.driver_data = NULL;
1352         config.of_node = child_np;
1353         rdev = regulator_register(&sci_desc->desc, &config);
1354
1355                 debug0("regulator_desc 0x%p, rdev 0x%p\n", &sci_desc->desc, rdev);
1356
1357                 if (sci_desc->init_data->consumer_supplies != consumer_supplies_default)
1358                         kfree(sci_desc->init_data->consumer_supplies);
1359
1360                 if (!IS_ERR_OR_NULL(rdev)) {
1361                         rdev->reg_data = rdev;
1362                         sci_desc->data.rdev = rdev;
1363                         __init_trimming(rdev);
1364                         rdev_init_debugfs(rdev);
1365                 }
1366
1367                 sci_desc++;
1368         }
1369
1370         return 0;
1371 }
1372
1373 /**
1374  * IMPORTANT!!!
1375  * spreadtrum power regulators is intergrated on the chip, include LDOs and DCDCs.
1376  * so i autogen all regulators non-variable description in plat or mach directory,
1377  * which named __xxxx_regulator_map.h, BUT register all in regulator driver probe func,
1378  * just like other regulator vendor drivers.
1379  */
1380 static int sci_regulator_probe(struct platform_device *pdev)
1381 {
1382 #ifdef CONFIG_DEBUG_FS
1383         debugfs_root =
1384             debugfs_create_dir(REGULATOR_ROOT_DIR, NULL);
1385         if (IS_ERR_OR_NULL(debugfs_root)) {
1386                 WARN(!debugfs_root,
1387                      "%s: Failed to create debugfs directory\n", REGULATOR_ROOT_DIR);
1388                 debugfs_root = NULL;
1389         }
1390
1391         debugfs_create_u32("ana_addr", S_IRUGO | S_IWUSR,
1392                            debugfs_root, (u32 *) & ana_addr);
1393         debugfs_create_file("ana_valu", S_IRUGO | S_IWUSR,
1394                             debugfs_root, &ana_addr, &fops_ana_addr);
1395         debugfs_create_file("adc_chan", S_IRUGO | S_IWUSR,
1396                             debugfs_root, &adc_chan, &fops_adc_chan);
1397         debugfs_create_u64("adc_data", S_IRUGO | S_IWUSR,
1398                            debugfs_root, (u64 *) & adc_data);
1399
1400         {/* vddarm/vddcore/vddmem common debugfs interface */
1401                 char str[NAME_MAX];
1402                 struct dentry *vol_root = debugfs_create_dir("vol", NULL);
1403                 sprintf(str, "../%s/vddarm/voltage", REGULATOR_ROOT_DIR);
1404                 debugfs_create_symlink("dcdcarm", vol_root, str);
1405                 sprintf(str, "../%s/vddcore/voltage", REGULATOR_ROOT_DIR);
1406                 debugfs_create_symlink("dcdccore", vol_root, str);
1407                 sprintf(str, "../%s/vddmem/voltage", REGULATOR_ROOT_DIR);
1408                 debugfs_create_symlink("dcdcmem", vol_root, str);
1409         }
1410 #endif
1411
1412         ana_chip_id = (sci_get_ana_chip_id() | sci_get_ana_chip_ver());
1413         ana_status = ANA_REG_GET(ANA_REG_GLB_ANA_STATUS);
1414
1415         pr_info("sc271x ana chip id: (0x%08x), bond opt (0x%08x)\n", ana_chip_id, ana_status);
1416
1417 #ifdef CONFIG_REGULATOR_SUPPORT_CAMIO_1200MV
1418         ANA_REG_OR(ANA_REG_GLB_CA_CTRL0, BIT_LDO_CAMIO_V_B2);
1419 #else
1420         ANA_REG_BIC(ANA_REG_GLB_CA_CTRL0, BIT_LDO_CAMIO_V_B2);
1421 #endif
1422
1423         sci_regulator_register_dt(pdev);
1424
1425         return 0;
1426 }
1427
1428 static int sci_regulator_remove(struct platform_device *pdev)
1429 {
1430         if(sci_desc_list) {
1431                 if(sci_desc_list->init_data) {
1432                         kfree(sci_desc_list->init_data);
1433                 }
1434                 kfree(sci_desc_list);
1435         }
1436
1437         return 0;
1438 }
1439
1440 static struct platform_driver sci_regulator_driver = {
1441         .driver = {
1442                 .name = "sc2713s-regulator",
1443                 .owner = THIS_MODULE,
1444                 .of_match_table = of_match_ptr(sprd_regulator_of_match),
1445         },
1446         .probe = sci_regulator_probe,
1447         .remove = sci_regulator_remove
1448 };
1449
1450 static int __init regu_driver_init(void)
1451 {
1452         __adc_cal_fuse_setup();
1453
1454         return platform_driver_register(&sci_regulator_driver);
1455 }
1456
1457 #ifndef CONFIG_REGULATOR_SC2713
1458 int __init sci_regulator_init(void)
1459 {
1460         return of_platform_populate(of_find_node_by_path("/sprd-regulators"),
1461                                 sprd_regulator_of_match, NULL, NULL);
1462 }
1463 #endif
1464
1465 subsys_initcall(regu_driver_init);
1466
1467 MODULE_LICENSE("GPL v2");
1468 MODULE_DESCRIPTION("Spreadtrum voltage regulator driver");
1469 MODULE_AUTHOR("robot <zhulin.lian@spreadtrum.com>");
1470 MODULE_VERSION("0.5");