drivers/regulator/sc2713s-regulator.c

   1 /*
   2  * Copyright (C) 2013 Spreadtrum Communications Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * as published by the Free Software Foundation; either version 2
   7  * of the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * Fixes:
  15  *              0.4
  16  *              Bug#183980 add dcdc and pll enable time
  17  *              Change-Id: I6e6e06ee0beb306cd846964d0ba24aef449e5beb
  18  *              0.3
  19  *              Bug#164001 add dcdc mem/gen/wpa/wrf map
  20  *              Change-Id: I07dac5700c0907aca99f6112bd4b5799358a9a88
  21  *              0.2
  22  *              Bug#164001 shark dcam: add camera ldo calibration
  23  *              Change-Id: Icaee2706b8b0985ae6f3122b236d8e278dcc0db2
  24  *              0.1
  25  *              sc8830: fix adc cal data from cmdline fail
  26  *              Change-Id: Id85d58178aca40fdf13b996853711e92e1171801
  27  *
  28  * To Fix:
  29  *
  30  *
  31  */
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/module.h>
  35 #include <linux/version.h>
  36 #include <linux/spinlock.h>
  37 #include <linux/debugfs.h>
  38 #include <linux/slab.h>
  39 #include <linux/sort.h>
  40 #include <linux/delay.h>
  41 #include <linux/err.h>
  42 #include <linux/io.h>
  43 #include <linux/platform_device.h>
  44 #ifdef CONFIG_OF
  45 #include <linux/of.h>
  46 #include <linux/of_device.h>
  47 #include <linux/regulator/of_regulator.h>
  48 #endif
  49 #include <linux/regulator/consumer.h>
  50 #include <linux/regulator/driver.h>
  51 #include <linux/regulator/machine.h>
  52
  53 #include <mach/hardware.h>
  54 #include <mach/sci.h>
  55 #include <mach/sci_glb_regs.h>
  56 #include <mach/adi.h>
  57 #include <mach/adc.h>
  58 #include <mach/arch_misc.h>
  59
  60 #define REGULATOR_ROOT_DIR      "sprd-regulator"
  61
  62 #undef debug
  63 #define debug(format, arg...) pr_info("regu: " "@@@%s: " format, __func__, ## arg)
  64 #define debug0(format, arg...)  //pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
  65 #define debug2(format, arg...)  pr_debug("regu: " "@@@%s: " format, __func__, ## arg)
  66
  67 #ifndef ANA_REG_OR
  68 #define ANA_REG_OR(_r, _b)      sci_adi_write(_r, _b, 0)
  69 #endif
  70
  71 #ifndef ANA_REG_BIC
  72 #define ANA_REG_BIC(_r, _b)     sci_adi_write(_r, 0, _b)
  73 #endif
  74
  75 #ifndef ANA_REG_GET
  76 #define ANA_REG_GET(_r)         sci_adi_read(_r)
  77 #endif
  78
  79 #ifndef ANA_REG_SET
  80 #define ANA_REG_SET(_r, _v, _m) sci_adi_write((_r), ((_v) & (_m)), (_m))
  81 #endif
  82
  83 struct sci_regulator_regs {
  84         int typ;
  85         u32 pd_set, pd_set_bit;
  86         /**
  87          * at new feature, some LDOs had only set, no rst bits.
  88          * and DCDCs voltage and trimming controller is the same register
  89          */
  90         u32 pd_rst, pd_rst_bit;
  91         u32 slp_ctl, slp_ctl_bit;
  92         u32 vol_trm, vol_trm_bits;
  93         u32 cal_ctl, cal_ctl_bits;
  94         u32 vol_def;
  95         u32 vol_ctl, vol_ctl_bits;
  96         u32 vol_sel_cnt, vol_sel[];
  97 };
  98
  99 struct sci_regulator_data {
 100         struct regulator_dev *rdev;
 101 };
 102
 103 struct sci_regulator_desc {
 104         struct regulator_desc desc;
 105         struct sci_regulator_ops *ops;
 106         struct sci_regulator_regs *regs;
 107         struct sci_regulator_data data; /* FIXME: dynamic */
 108 #if defined(CONFIG_DEBUG_FS)
 109         struct dentry *debugfs;
 110 #endif
 111 };
 112
 113 enum {
 114         VDD_TYP_LDO = 0,
 115         VDD_TYP_LDO_D = 1,
 116         VDD_TYP_DCDC = 2,
 117         VDD_TYP_LPREF = 3,
 118         VDD_TYP_BOOST = 4,
 119 };
 120
 121 #define REGU_VERIFY_DLY (1000)  /*ms */
 122
 123 /*************************************************************************
 124 Reg: 0x40038800 + 0x00E4
 125 --------------------------------------------
 126 BIT    |    FieldName    |    Description
 127 --------------------------------------------
 128 BIT7~BIT15  Reserved
 129 BIT6    BONDOPT6                28nm/40nm dcdccore/dcdcarm default voltage select:
 130                                                 0: dcdccore/dcdcarm = 1.1v, vdd25 = 2.5v
 131                                                 1: dcdccore/dcdcarm = 0.9v, vdd25 = 1.8v
 132 BIT5    BONDOPT5                crystal 32k buffer select:
 133                                                 0: new low power 32k buffer output, 1: backup 32k buffer output
 134 BIT4    BONDOPT4                dcdcwrf out voltage select:  dcdc_wrf_ctl[2]
 135 BIT3    BONDOPT3                charge mode option:
 136                                                 0: continues charging, 1: dcdc mode charging
 137 BIT2    BONDOPT2                dcdcmem option 2:  dcdc_mem_ctl[2]
 138 BIT1    BONDOPT1                dcdcmem option 1:  dcdc_mem_ctl[1]
 139                                                 00: DDR2 (1.2v)
 140                                                 01: DDR3L (1.35v)
 141                                                 10: DDR3 (1.5v)
 142                                                 11: DDR1 (1.8v)
 143 BIT0    BONDOPT0                New power on reset option:
 144                                                 0: manual power on without hardware debounce
 145                                                 1: auto power on with 1s hardware debounce
 146 **************************************************************************/
 147 static u16 ana_status;
 148 static u32 ana_chip_id;
 149
 150 static DEFINE_MUTEX(adc_chan_mutex);
 151 extern int sci_efuse_get_cal(unsigned int * pdata, int num);
 152
 153 #define SCI_REGU_REG(VDD, TYP, PD_SET, SET_BIT, PD_RST, RST_BIT, SLP_CTL, SLP_CTL_BIT, \
 154                      VOL_TRM, VOL_TRM_BITS, CAL_CTL, CAL_CTL_BITS, VOL_DEF, \
 155                      VOL_CTL, VOL_CTL_BITS, VOL_SEL_CNT, ...)   \
 156 do {                                                                                                            \
 157         static struct sci_regulator_regs REGS_##VDD = { \
 158                 .typ            = TYP,                                                                  \
 159                 .pd_set = PD_SET,                                       \
 160                 .pd_set_bit = SET_BIT,                                  \
 161                 .pd_rst = PD_RST,                                       \
 162                 .pd_rst_bit = RST_BIT,                                  \
 163                 .slp_ctl = SLP_CTL,                                     \
 164                 .slp_ctl_bit = SLP_CTL_BIT,                             \
 165                 .vol_trm = VOL_TRM,                                 \
 166                 .vol_trm_bits = VOL_TRM_BITS,                       \
 167                 .cal_ctl = CAL_CTL,                                                             \
 168                 .cal_ctl_bits = CAL_CTL_BITS,                                           \
 169                 .vol_def = VOL_DEF,                                                                     \
 170                 .vol_ctl = VOL_CTL,                                     \
 171                 .vol_ctl_bits = VOL_CTL_BITS,                           \
 172                 .vol_sel_cnt = VOL_SEL_CNT,                             \
 173                 .vol_sel = {__VA_ARGS__},                               \
 174         };                                                                                                              \
 175         static struct sci_regulator_desc DESC_##VDD = {                 \
 176                 .desc.name = #VDD,                                                                      \
 177                 .desc.id = 0,                                                                           \
 178                 .desc.ops = 0,                                                                          \
 179                 .desc.type = REGULATOR_VOLTAGE,                                         \
 180                 .desc.owner = THIS_MODULE,                                                      \
 181                 .regs = &REGS_##VDD,                                                            \
 182         };                                                                                                              \
 183         sci_regulator_register(pdev, &DESC_##VDD);                              \
 184 } while (0)
 185
 186 static struct sci_regulator_desc *__get_desc(struct regulator_dev *rdev)
 187 {
 188         return (struct sci_regulator_desc *)rdev->desc;
 189 }
 190
 191 /* standard ldo ops*/
 192 static int ldo_turn_on(struct regulator_dev *rdev)
 193 {
 194         struct sci_regulator_desc *desc = __get_desc(rdev);
 195         struct sci_regulator_regs *regs = desc->regs;
 196
 197         debug0("regu %p (%s), set %08x[%d], rst %08x[%d]\n", regs,
 198                desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit),
 199                regs->pd_rst, __ffs(regs->pd_rst_bit));
 200
 201         if (regs->pd_rst)
 202                 ANA_REG_OR(regs->pd_rst, regs->pd_rst_bit);
 203
 204         if (regs->pd_set)
 205                 ANA_REG_BIC(regs->pd_set, regs->pd_set_bit);
 206
 207         debug("regu %p (%s), turn on\n", regs, desc->desc.name);
 208         return 0;
 209 }
 210
 211 static int ldo_turn_off(struct regulator_dev *rdev)
 212 {
 213         struct sci_regulator_desc *desc = __get_desc(rdev);
 214         struct sci_regulator_regs *regs = desc->regs;
 215
 216         debug0("regu %p (%s), set %08x[%d], rst %08x[%d]\n", regs,
 217                desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit),
 218                regs->pd_rst, __ffs(regs->pd_rst_bit));
 219
 220 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
 221         if (regs->pd_set)
 222                 ANA_REG_OR(regs->pd_set, regs->pd_set_bit);
 223
 224         if (regs->pd_rst)
 225                 ANA_REG_BIC(regs->pd_rst, regs->pd_rst_bit);
 226 #endif
 227
 228         debug("regu %p (%s), turn off\n", regs, desc->desc.name);
 229         return 0;
 230 }
 231
 232 static int ldo_is_on(struct regulator_dev *rdev)
 233 {
 234         int ret = -EINVAL;
 235         struct sci_regulator_desc *desc = __get_desc(rdev);
 236         struct sci_regulator_regs *regs = desc->regs;
 237
 238         debug0("regu %p (%s), set %08x[%d], rst %08x[%d]\n", regs,
 239                desc->desc.name, regs->pd_set, __ffs(regs->pd_set_bit),
 240                regs->pd_rst, __ffs(regs->pd_rst_bit));
 241
 242         if (regs->pd_rst && regs->pd_set) {
 243                 /*for pd_rst has higher prioty than pd_set, what's more, their reset values are the same, 0 */
 244                 ret = ! !(ANA_REG_GET(regs->pd_rst) & regs->pd_rst_bit);
 245                 /* FIXME: when reset, pd_set & pd_rst are all zero, always get here */
 246                 if (ret == ! !(ANA_REG_GET(regs->pd_set) & regs->pd_set_bit))
 247                         ret = -EINVAL;
 248         } else if (regs->pd_rst) {
 249                 ret = ! !(ANA_REG_GET(regs->pd_rst) & regs->pd_rst_bit);
 250         } else if (regs->pd_set) {      /* new feature */
 251                 ret = !(ANA_REG_GET(regs->pd_set) & regs->pd_set_bit);
 252         }
 253
 254         debug2("regu %p (%s) turn on, return %d\n", regs, desc->desc.name, ret);
 255         return ret;
 256 }
 257
 258 static int ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
 259 {
 260         struct sci_regulator_desc *desc = __get_desc(rdev);
 261         struct sci_regulator_regs *regs = desc->regs;
 262
 263         debug("regu %p (%s), slp %08x[%d] mode %x\n", regs, desc->desc.name,
 264               regs->slp_ctl, regs->slp_ctl_bit, mode);
 265
 266         if (!regs->slp_ctl)
 267                 return -EINVAL;
 268
 269         if (mode == REGULATOR_MODE_STANDBY) {   /* disable auto slp */
 270                 ANA_REG_BIC(regs->slp_ctl, regs->slp_ctl_bit);
 271         } else {
 272                 ANA_REG_OR(regs->slp_ctl, regs->slp_ctl_bit);
 273         }
 274
 275         return 0;
 276 }
 277
 278 static int ldo_set_voltage(struct regulator_dev *rdev, int min_uV,
 279                            int max_uV, unsigned *selector)
 280 {
 281         struct sci_regulator_desc *desc = __get_desc(rdev);
 282         struct sci_regulator_regs *regs = desc->regs;
 283         int mv = min_uV / 1000;
 284         int ret = -EINVAL;
 285         int i, shft = __ffs(regs->vol_ctl_bits);
 286
 287         BUG_ON(regs->vol_sel_cnt > 4);
 288
 289         debug("regu %p (%s) set voltage, %d(uV) %d(uV)\n", regs, desc->desc.name, min_uV, max_uV);
 290
 291         if (!regs->vol_ctl)
 292                 return -EACCES;
 293
 294         for (i = 0; i < regs->vol_sel_cnt; i++) {
 295                 if (regs->vol_sel[i] == mv) {
 296                         ANA_REG_SET(regs->vol_ctl,
 297                                     i << shft,
 298                                     regs->vol_ctl_bits);
 299                         //clear_bit(desc->desc.id, trimming_state);
 300                         ret = 0;
 301                         break;
 302                 }
 303         }
 304
 305         WARN(0 != ret, "warning: regulator (%s) not support %dmV\n", desc->desc.name, mv);
 306         return ret;
 307 }
 308
 309 static int ldo_get_voltage(struct regulator_dev *rdev)
 310 {
 311         struct sci_regulator_desc *desc = __get_desc(rdev);
 312         struct sci_regulator_regs *regs = desc->regs;
 313         u32 vol;
 314         int i, shft = __ffs(regs->vol_ctl_bits);
 315
 316         debug0("regu %p (%s), vol ctl %08x, shft %d, mask %08x\n",
 317                regs, desc->desc.name, regs->vol_ctl, shft, regs->vol_ctl_bits);
 318
 319         if (!regs->vol_ctl)
 320                 return -EACCES;
 321
 322         BUG_ON(regs->vol_sel_cnt != 4);
 323         i = ((ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft);
 324
 325         vol = regs->vol_sel[i];
 326
 327         debug2("regu %p (%s) get voltage %d\n", regs, desc->desc.name, vol);
 328         return vol * 1000;
 329 }
 330
 331
 332 /* FIXME: get dcdc cal offset config from uboot */
 333
 334
 335 typedef struct {
 336         u16 ideal_vol;
 337         const char name[14];
 338 }vol_para_t;
 339
 340 #define PP_VOL_PARA             ( 0x50005C20 )  /* assert in iram2 */
 341 #define TO_IRAM2(_p_)   ( SPRD_IRAM2_BASE + (u32)(_p_) - SPRD_IRAM2_PHYS )
 342 #define IN_IRAM2(_p_)   ( (u32)(_p_) >= SPRD_IRAM2_PHYS && (u32)(_p_) < SPRD_IRAM2_PHYS + SPRD_IRAM2_SIZE )
 343
 344 int regulator_default_get(const char con_id[])
 345 {
 346         int i = 0, res = 0;
 347         vol_para_t *pvol_para = (vol_para_t *)__raw_readl((void *)TO_IRAM2(PP_VOL_PARA));
 348
 349         if (!(IN_IRAM2(pvol_para)))
 350                 return 0;
 351
 352         pvol_para = (vol_para_t *)TO_IRAM2(pvol_para);
 353
 354         if(strcmp((pvol_para)[0].name, "volpara_begin") || (0xfaed != (pvol_para)[0].ideal_vol))
 355                 return 0;
 356
 357         while(0 != strcmp((pvol_para)[i++].name, "volpara_end")) {
 358                 if (0 == strcmp((pvol_para)[i].name, con_id)) {
 359                         debug("%s name %s, ideal_vol %d\n", __func__, (pvol_para)[i].name, (pvol_para)[i].ideal_vol);
 360                         return res = (pvol_para)[i].ideal_vol;
 361                 }
 362         }
 363         return res;
 364 }
 365
 366 static int __init_trimming(struct regulator_dev *rdev)
 367 {
 368         struct sci_regulator_desc *desc = __get_desc(rdev);
 369         const struct sci_regulator_regs *regs = desc->regs;
 370         int ctl_vol, to_vol;
 371
 372         if (!regs->vol_trm)
 373                 return -1;
 374
 375         to_vol = regulator_default_get(desc->desc.name);
 376         if (!to_vol) {
 377                 to_vol = regs->vol_def;
 378         }
 379
 380         if (to_vol && rdev->desc->ops->get_voltage) {
 381                 ctl_vol = rdev->desc->ops->get_voltage(rdev);
 382                 rdev->constraints->uV_offset = ctl_vol - to_vol * 1000;//uV
 383                 debug("regu %p (%s), uV offset %d\n", regs, desc->desc.name, rdev->constraints->uV_offset);
 384         }
 385
 386         return 0;
 387 }
 388
 389 static int dcdc_get_trimming_step(struct regulator_dev *rdev, int to_vol)
 390 {
 391         struct sci_regulator_desc *desc = __get_desc(rdev);
 392         if ((0 == strcmp(desc->desc.name, "vddmem")) ||
 393                 (0 == strcmp(desc->desc.name, "vddwrf"))) { /* FIXME: vddmem/vddwrf step 200/32mV */
 394                 return 1000 * 200 / 32; /*uV */
 395         }
 396         return 1000 * 100 / 32; /*uV */
 397 }
 398
 399 static int dcdc_initial_value(struct sci_regulator_desc *desc)
 400 {
 401         return ((0 == strcmp(desc->desc.name, "vddmem")) ? 0x10 : 0);
 402 }
 403
 404 static int __match_dcdc_vol(struct sci_regulator_regs *regs, u32 vol)
 405 {
 406         int i, j = -1;
 407         int ds, min_ds = 100;   /* mV, the max range of small voltage */
 408
 409         for (i = 0; i < regs->vol_sel_cnt; i++) {
 410                 ds = vol - regs->vol_sel[i];
 411                 if (ds >= 0 && ds < min_ds) {
 412                         min_ds = ds;
 413                         j = i;
 414                 }
 415         }
 416
 417 #if 0
 418         if ((2 == regs->typ) && (j < 0)) {
 419                 for (i = 0; i < regs->vol_sel_cnt; i++) {
 420                         ds = abs(vol - regs->vol_sel[i]);
 421                         if (ds < min_ds) {
 422                                 min_ds = ds;
 423                                 j = i;
 424                         }
 425                 }
 426         }
 427 #endif
 428
 429         return j;
 430 }
 431
 432 static int __dcdc_enable_time(struct regulator_dev *rdev, int old_vol)
 433 {
 434         int vol = rdev->desc->ops->get_voltage(rdev) / 1000;
 435         if (vol > old_vol) {
 436                 /* FIXME: for dcdc, each step (50mV) takes 10us */
 437                 int dly = (vol - old_vol) * 10 / 50;
 438                 WARN_ON(dly > 1000);
 439                 udelay(dly);
 440         }
 441         return 0;
 442 }
 443
 444 static int dcdc_set_voltage(struct regulator_dev *rdev, int min_uV,
 445                             int max_uV, unsigned *selector)
 446 {
 447         struct sci_regulator_desc *desc = __get_desc(rdev);
 448         struct sci_regulator_regs *regs = desc->regs;
 449         int i, mv = min_uV / 1000;
 450         int old_vol = rdev->desc->ops->get_voltage(rdev) / 1000;
 451
 452         debug0("regu %p (%s) %d %d\n", regs, desc->desc.name, min_uV, max_uV);
 453
 454         //BUG_ON(0 != __ffs(regs->vol_trm_bits));
 455         BUG_ON(regs->vol_sel_cnt > 8);
 456
 457         if (!regs->vol_ctl)
 458                 return -EACCES;
 459
 460         /* found the closely vol ctrl bits */
 461         i = __match_dcdc_vol(regs, mv);
 462         if (i < 0)
 463                 return WARN(-EINVAL, "not found %s closely ctrl bits for %dmV\n",
 464                             desc->desc.name, mv);
 465
 466         debug("regu %p (%s) %d = %d %+dmv\n", regs, desc->desc.name,
 467                mv, regs->vol_sel[i], mv - regs->vol_sel[i]);
 468
 469 #if !defined(CONFIG_REGULATOR_CAL_DUMMY)
 470         /* dcdc calibration control bits (default 00000),
 471          * small adjust voltage: 100/32mv ~= 3.125mv
 472          */
 473         {
 474                 int shft_ctl = __ffs(regs->vol_ctl_bits);
 475                 int shft_trm = __ffs(regs->vol_trm_bits);
 476                 int j = (int)(mv - regs->vol_sel[i]) * 1000 / dcdc_get_trimming_step(rdev, mv) % 32;
 477
 478                 j += dcdc_initial_value(desc);
 479
 480                 BUG_ON(j > (regs->vol_trm_bits >> shft_trm));
 481
 482                 if (regs->vol_trm == regs->vol_ctl) { /* new feature */
 483                         ANA_REG_SET(regs->vol_ctl, (j << shft_trm) | (i << shft_ctl),
 484                                     regs->vol_trm_bits | regs->vol_ctl_bits);
 485                 } else {
 486                         if (regs->vol_trm) {    /* small adjust first */
 487                                 ANA_REG_SET(regs->vol_trm, j << shft_trm,
 488                                         regs->vol_trm_bits);
 489                         }
 490
 491                         if (regs->vol_ctl) {
 492                                 ANA_REG_SET(regs->vol_ctl, i << shft_ctl,
 493                                         regs->vol_ctl_bits);
 494                         }
 495                 }
 496         }
 497
 498         __dcdc_enable_time(rdev, old_vol);
 499 #endif
 500
 501         return 0;
 502 }
 503
 504 static int dcdc_get_voltage(struct regulator_dev *rdev)
 505 {
 506         struct sci_regulator_desc *desc = __get_desc(rdev);
 507         struct sci_regulator_regs *regs = desc->regs;
 508         u32 mv;
 509         int i, cal = 0 /* uV */;
 510         int shft_ctl = __ffs(regs->vol_ctl_bits);
 511         int shft_trm = __ffs(regs->vol_trm_bits);
 512
 513         debug0("regu %p (%s), vol ctl %08x, shft %d, mask %08x, sel %d\n",
 514                regs, desc->desc.name, regs->vol_ctl,
 515                shft_ctl, regs->vol_ctl_bits, regs->vol_sel_cnt);
 516
 517         if (!regs->vol_ctl)
 518                 return -EINVAL;
 519
 520         //BUG_ON(0 != shft_trm);
 521         BUG_ON(regs->vol_sel_cnt > 8);
 522
 523         i = (ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft_ctl;
 524
 525         mv = regs->vol_sel[i];
 526
 527         if (regs->vol_trm) {
 528                 cal = (ANA_REG_GET(regs->vol_trm) & regs->vol_trm_bits) >> shft_trm;
 529                 cal -= dcdc_initial_value(desc);
 530                 cal *= dcdc_get_trimming_step(rdev, 0); /*uV */
 531         }
 532
 533         debug2("regu %p (%s) %d +%dmv\n", regs, desc->desc.name, mv, cal / 1000);
 534
 535         return (mv * 1000 + cal) /*uV */;
 536 }
 537
 538
 539 /* standard boost ops*/
 540 #define MAX_CURRENT_SINK        (500)   /*FIXME: max current sink */
 541 static int boost_set_current_limit(struct regulator_dev *rdev, int min_uA,
 542                                    int max_uA)
 543 {
 544         struct sci_regulator_desc *desc = __get_desc(rdev);
 545         struct sci_regulator_regs *regs = desc->regs;
 546         int ma = min_uA / 1000;
 547         int ret = -EACCES;
 548         int i, shft = __ffs(regs->vol_ctl_bits);
 549         int trim = (int)regs->vol_def / 1000;
 550         int steps = (regs->vol_ctl_bits >> shft) + 1;
 551
 552         debug("regu %p (%s) %d %d\n", regs, desc->desc.name, min_uA, max_uA);
 553
 554         if (!regs->vol_ctl)
 555                 goto exit;
 556
 557         if (trim > 0) {
 558                 trim <<= __ffs(regs->vol_trm_bits);
 559         }
 560
 561         i = ma * steps / MAX_CURRENT_SINK;
 562         if (i >= 0 && i < steps) {
 563                 ANA_REG_SET(regs->vol_ctl, (i << shft) | trim,
 564                             regs->vol_ctl_bits | regs->vol_trm_bits);
 565
 566                 ret = 0;
 567         }
 568
 569         WARN(0 != ret,
 570              "warning: regulator (%s) not support %dmA\n", desc->desc.name, ma);
 571
 572 exit:
 573         return ret;
 574 }
 575
 576 static int boost_get_current_limit(struct regulator_dev *rdev)
 577 {
 578         struct sci_regulator_desc *desc = __get_desc(rdev);
 579         struct sci_regulator_regs *regs = desc->regs;
 580         u32 cur;
 581         int i, shft = __ffs(regs->vol_ctl_bits);
 582         int steps = (regs->vol_ctl_bits >> shft) + 1;
 583
 584         debug0("regu %p (%s), vol ctl %08x, shft %d, mask %08x\n",
 585                regs, desc->desc.name, regs->vol_ctl, shft, regs->vol_ctl_bits);
 586
 587         if (!regs->vol_ctl)
 588                 return -EACCES;
 589
 590         i = ((ANA_REG_GET(regs->vol_ctl) & regs->vol_ctl_bits) >> shft);
 591         cur = i * MAX_CURRENT_SINK / steps;
 592         debug("regu %p (%s) get current %d\n", regs, desc->desc.name, cur);
 593         return cur * 1000;
 594 }
 595
 596 static int adc_sample_bit = 1;  /*12bits mode */
 597 static short adc_data[3][2]
 598 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
 599     = {
 600         {4200, 3320},           /* same as nv adc_t */
 601         {3600, 2844},
 602         {400, 316},             /* 0.4@VBAT, Reserved IdealC Value */
 603 }
 604 #endif
 605 ;
 606
 607 static int __is_valid_adc_cal(void)
 608 {
 609         return 0 != adc_data[0][0];
 610 }
 611
 612 static int __init __adc_cal_setup(char *str)
 613 {
 614         u32 *p = (u32 *) adc_data;
 615         *p = simple_strtoul(str, &str, 0);
 616
 617         if (*p++ && *++str) {
 618                 *p = simple_strtoul(str, &str, 0);
 619                 if (*p) {
 620                         debug("%d : %d -- %d : %d\n",
 621                               (int)adc_data[0][0], (int)adc_data[0][1],
 622                               (int)adc_data[1][0], (int)adc_data[1][1]);
 623                         if (adc_data[0][1] < BIT(10)
 624                             && adc_data[1][1] < BIT(10))
 625                                 adc_sample_bit = 0;     /*10bits mode */
 626                 }
 627         }
 628         return 0;
 629 }
 630 early_param("adc_cal", __adc_cal_setup);
 631
 632 static int __init __adc_cal_fuse_setup(void)
 633 {
 634         if (!__is_valid_adc_cal() &&
 635             (0 == sci_efuse_get_cal((u32 *) adc_data, 2))) {
 636                 debug("%d : %d -- %d : %d\n",
 637                       (int)adc_data[0][0], (int)adc_data[0][1],
 638                       (int)adc_data[1][0], (int)adc_data[1][1]);
 639         }
 640         return 0;
 641 }
 642
 643 static int __adc2vbat(int adc_res)
 644 {
 645         int t = adc_data[0][0] - adc_data[1][0];
 646         t *= (adc_res - adc_data[0][1]);
 647         t /= (adc_data[0][1] - adc_data[1][1]);
 648         t += adc_data[0][0];
 649         return t;
 650 }
 651
 652 #define MEASURE_TIMES   (15)
 653
 654 static void __dump_adc_result(u32 adc_val[])
 655 {
 656 #if defined(CONFIG_REGULATOR_ADC_DEBUG)
 657         int i;
 658         for (i = 0; i < MEASURE_TIMES; i++) {
 659                 printk("%d ", adc_val[i]);
 660         }
 661         printk("\n");
 662 #endif
 663 }
 664
 665 static int cmp_val(const void *a, const void *b)
 666 {
 667         return *(int *)a - *(int *)b;
 668 }
 669
 670 /**
 671  * __adc_voltage - get regulator output voltage through auxadc
 672  * @regulator: regulator source
 673  *
 674  * This returns the current regulator voltage in mV.
 675  *
 676  * NOTE: If the regulator is disabled it will return the voltage value. This
 677  * function should not be used to determine regulator state.
 678  */
 679 static int regu_adc_voltage(struct regulator_dev *rdev)
 680 {
 681         struct sci_regulator_desc *desc = __get_desc(rdev);
 682         struct sci_regulator_regs *regs = desc->regs;
 683
 684         int ret, adc_chan = regs->cal_ctl_bits >> 16;
 685         u16 ldo_cal_sel = regs->cal_ctl_bits & 0xFFFF;
 686         u32 adc_res, adc_val[MEASURE_TIMES];
 687         u32 chan_numerators = 1, chan_denominators = 1;
 688         u32 bat_numerators, bat_denominators;
 689
 690         struct adc_sample_data data = {
 691                 .channel_id = adc_chan,
 692                 .channel_type = 0,      /*sw */
 693                 .hw_channel_delay = 0,  /*reserved */
 694                 .scale = 1,     /*big scale */
 695                 .pbuf = &adc_val[0],
 696                 .sample_num = MEASURE_TIMES,
 697                 .sample_bits = adc_sample_bit,
 698                 .sample_speed = 0,      /*quick mode */
 699                 .signal_mode = 0,       /*resistance path */
 700         };
 701
 702         if (!__is_valid_adc_cal())
 703                 return -EACCES;
 704
 705         if (!regs->cal_ctl)
 706                 return -EINVAL;
 707
 708         /* enable ldo cal before adc sampling and ldo calibration */
 709         if (0 == regs->typ) {
 710                 mutex_lock(&adc_chan_mutex);
 711                 ANA_REG_OR(regs->cal_ctl, ldo_cal_sel);
 712                 debug0("%s adc channel %d : %04x\n",
 713                        desc->desc.name, data.channel_id, ldo_cal_sel);
 714         }
 715
 716         ret = sci_adc_get_values(&data);
 717         BUG_ON(0 != ret);
 718
 719         /* close ldo cal and release multiplexed aux adc channel */
 720         if (0 == regs->typ) {
 721                 ANA_REG_BIC(regs->cal_ctl, ldo_cal_sel);
 722                 mutex_unlock(&adc_chan_mutex);
 723         }
 724
 725         __dump_adc_result(adc_val);
 726         sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
 727         /*__dump_adc_result(adc_val);*/
 728
 729         sci_adc_get_vol_ratio(data.channel_id, data.scale,
 730                               &chan_numerators, &chan_denominators);
 731
 732         sci_adc_get_vol_ratio(ADC_CHANNEL_VBAT, 0, &bat_numerators, &bat_denominators);
 733
 734         adc_res = adc_val[MEASURE_TIMES / 2];
 735         debug("%s adc channel %d : 0x%04x, ratio (%d/%d), result value %d\n",
 736               desc->desc.name, data.channel_id, ldo_cal_sel,
 737               chan_numerators, chan_denominators, adc_res);
 738
 739         if (adc_res == 0)
 740                 return -EAGAIN;
 741         else
 742                 return __adc2vbat(adc_res)
 743                     * (bat_numerators * chan_denominators)
 744                     / (bat_denominators * chan_numerators);
 745 }
 746
 747 #ifndef CONFIG_REGULATOR_SC2713
 748 /**
 749  * regulator_strongly_disable - strongly disable regulator output
 750  * @regulator: regulator source
 751  *
 752  * Strongly try disable the regulator output voltage or current.
 753  * NOTE: this *will* disable the regulator output even if other consumer
 754  * devices have it enabled. This should be used for situations when device
 755  * had unbalanced with calls to regulator_enable().
 756  * *Not* recommended to call this function before try to balance the use_count.
 757  */
 758 int regulator_strongly_disable(struct regulator *regulator)
 759 {
 760         struct regulator_dev *rdev = regulator_get_drvdata(regulator);
 761         int ret = 0;
 762
 763         if (rdev)
 764                 while (rdev->use_count--)
 765                         regulator_disable(regulator);
 766
 767         return ret;
 768 }
 769
 770 EXPORT_SYMBOL_GPL(regulator_strongly_disable);
 771 #endif
 772
 773 static struct regulator_ops ldo_ops = {
 774         .enable = ldo_turn_on,
 775         .disable = ldo_turn_off,
 776         .is_enabled = ldo_is_on,
 777         .set_voltage = ldo_set_voltage,
 778         .get_voltage = ldo_get_voltage,
 779         .set_mode = ldo_set_mode,
 780 /*      .enable_time = ldo_enable_time, */
 781 };
 782
 783
 784 static struct regulator_ops dcdc_ops = {
 785         .enable = ldo_turn_on,
 786         .disable = ldo_turn_off,
 787         .is_enabled = ldo_is_on,
 788         .set_voltage = dcdc_set_voltage,
 789         .get_voltage = dcdc_get_voltage,
 790 };
 791
 792 static struct regulator_ops boost_ops = {
 793         .enable = ldo_turn_on,
 794         .disable = ldo_turn_off,
 795         .is_enabled = ldo_is_on,
 796         .set_current_limit = boost_set_current_limit,
 797         .get_current_limit = boost_get_current_limit,
 798         .set_mode = ldo_set_mode,
 799 };
 800
 801
 802 /*
 803  * Consider the following machine :-
 804  *
 805  *   Regulator-1 -+-> [Consumer A @ 1.8V]
 806  *                |
 807  *                +-> [Consumer B @ 1.8V]
 808  *
 809  *   Regulator-2 ---> [Consumer C @ 3.3V]
 810  *
 811  * The drivers for consumers A & B must be mapped to the correct regulator in
 812  * order to control their power supply. This mapping can be achieved in board/machine
 813  * initialisation code by creating a struct regulator_consumer_supply for each regulator.
 814  * Alternatively, we built a regulator supply-consumers map, the format is as follow:
 815  *
 816  *      supply source-1, consumer A, consumer B, ..., NULL
 817  *      supply source-2, consumer C, ..., NULL
 818  *      ...
 819  *      NULL
 820  *
 821  */
 822 static struct regulator_consumer_supply *set_supply_map(struct device *dev,
 823                                                         const char *supply_name,
 824                                                         int *num)
 825 {
 826         char **map = (char **)dev_get_platdata(dev);
 827         int i, n;
 828         struct regulator_consumer_supply *consumer_supplies = NULL;
 829
 830         if (!supply_name || !(map && map[0]))
 831                 return NULL;
 832
 833         for (i = 0; map[i] || map[i + 1]; i++) {
 834                 if (map[i] && 0 == strcmp(map[i], supply_name))
 835                         break;
 836         }
 837
 838         /* i++; *//* Do not skip supply name */
 839
 840         for (n = 0; map[i + n]; n++) ;
 841
 842         if (n) {
 843                 debug0("supply %s consumers %d - %d\n", supply_name, i, n);
 844                 consumer_supplies =
 845                     kzalloc(n * sizeof(*consumer_supplies), GFP_KERNEL);
 846                 BUG_ON(!consumer_supplies);
 847                 for (n = 0; map[i]; i++, n++) {
 848                         consumer_supplies[n].supply = map[i];
 849                 }
 850                 if (num)
 851                         *num = n;
 852         }
 853         return consumer_supplies;
 854 }
 855
 856 #if defined(CONFIG_DEBUG_FS)
 857 static struct dentry *debugfs_root = NULL;
 858
 859 static u32 ana_addr = 0;
 860 static int debugfs_ana_addr_get(void *data, u64 * val)
 861 {
 862         if (ana_addr < PAGE_SIZE) {
 863                 *val = ANA_REG_GET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK));
 864         } else {
 865                 void *addr = ioremap(ana_addr, PAGE_SIZE);
 866                 *val = __raw_readl(addr);
 867                 iounmap(addr);
 868         }
 869         return 0;
 870 }
 871
 872 static int debugfs_ana_addr_set(void *data, u64 val)
 873 {
 874         if (ana_addr < PAGE_SIZE) {
 875                 ANA_REG_SET(ana_addr + (ANA_REGS_GLB_BASE & PAGE_MASK), val, -1);
 876         } else {
 877                 void *addr = ioremap(ana_addr, PAGE_SIZE);
 878                 __raw_writel(val, addr);
 879                 iounmap(addr);
 880         }
 881         return 0;
 882 }
 883
 884 static int adc_chan = 5 /*VBAT*/;
 885 static int debugfs_adc_chan_get(void *pdata, u64 * val)
 886 {
 887         int i, ret;
 888         u32 adc_res, adc_val[MEASURE_TIMES];
 889         struct adc_sample_data data = {
 890                 .channel_id = adc_chan,
 891                 .channel_type = 0,      /*sw */
 892                 .hw_channel_delay = 0,  /*reserved */
 893                 .scale = 1,     /*big scale */
 894                 .pbuf = &adc_val[0],
 895                 .sample_num = MEASURE_TIMES,
 896                 .sample_bits = adc_sample_bit,
 897                 .sample_speed = 0,      /*quick mode */
 898                 .signal_mode = 0,       /*resistance path */
 899         };
 900
 901         ret = sci_adc_get_values(&data);
 902         BUG_ON(0 != ret);
 903
 904         for (i = 0; i < MEASURE_TIMES; i++) {
 905                 printk("%d ", adc_val[i]);
 906         }
 907         printk("\n");
 908
 909         sort(adc_val, MEASURE_TIMES, sizeof(u32), cmp_val, 0);
 910         adc_res = adc_val[MEASURE_TIMES / 2];
 911         pr_info("adc chan %d, result value %d, vbat %d\n",
 912                 data.channel_id, adc_res, __adc2vbat(adc_res));
 913         *val = adc_res;
 914         return 0;
 915 }
 916
 917 static int debugfs_adc_chan_set(void *data, u64 val)
 918 {
 919         adc_chan = val;
 920         return 0;
 921 }
 922
 923 static int debugfs_enable_get(void *data, u64 * val)
 924 {
 925         struct regulator_dev *rdev = data;
 926         if (rdev && rdev->desc->ops->is_enabled)
 927                 *val = rdev->desc->ops->is_enabled(rdev);
 928         else
 929                 *val = -1;
 930         return 0;
 931 }
 932
 933 static int debugfs_enable_set(void *data, u64 val)
 934 {
 935         struct regulator_dev *rdev = data;
 936         if (rdev && rdev->desc->ops->enable)
 937                 (val) ? rdev->desc->ops->enable(rdev)
 938                     : rdev->desc->ops->disable(rdev);
 939         return 0;
 940 }
 941
 942 static int debugfs_voltage_get(void *data, u64 * val)
 943 {
 944         struct regulator_dev *rdev = data;
 945         if (rdev)
 946                 *val = regu_adc_voltage(rdev);
 947         else
 948                 *val = -1;
 949         return 0;
 950 }
 951
 952 static int debugfs_voltage_set(void *data, u64 val)
 953 {
 954         struct regulator_dev *rdev = data;
 955         if (rdev && rdev->desc->ops->set_voltage) {
 956                 u32 min_uV = (u32)val * 1000;
 957                 min_uV += rdev->constraints->uV_offset;
 958                 rdev->desc->ops->set_voltage(rdev, min_uV, min_uV, 0);
 959         }
 960         return 0;
 961 }
 962
 963
 964 static int debugfs_boost_get(void *data, u64 * val)
 965 {
 966         struct regulator_dev *rdev = data;
 967         if (rdev && rdev->desc->ops->get_current_limit)
 968                 *val = rdev->desc->ops->get_current_limit(rdev) / 1000;
 969         else
 970                 *val = -1;
 971         return 0;
 972 }
 973
 974 static int debugfs_boost_set(void *data, u64 val)
 975 {
 976         struct regulator_dev *rdev = data;
 977         if (rdev && rdev->desc->ops->set_current_limit)
 978                 rdev->desc->ops->set_current_limit(rdev, val * 1000,
 979                                                    val * 1000);
 980         return 0;
 981 }
 982
 983 DEFINE_SIMPLE_ATTRIBUTE(fops_ana_addr,
 984                         debugfs_ana_addr_get, debugfs_ana_addr_set, "%llu\n");
 985 DEFINE_SIMPLE_ATTRIBUTE(fops_adc_chan,
 986                         debugfs_adc_chan_get, debugfs_adc_chan_set, "%llu\n");
 987 DEFINE_SIMPLE_ATTRIBUTE(fops_enable,
 988                         debugfs_enable_get, debugfs_enable_set, "%llu\n");
 989 DEFINE_SIMPLE_ATTRIBUTE(fops_ldo,
 990                         debugfs_voltage_get, debugfs_voltage_set, "%llu\n");
 991 DEFINE_SIMPLE_ATTRIBUTE(fops_boost,
 992                         debugfs_boost_get, debugfs_boost_set, "%llu\n");
 993
 994 static void rdev_init_debugfs(struct regulator_dev *rdev)
 995 {
 996         struct sci_regulator_desc *desc = __get_desc(rdev);
 997         desc->debugfs = debugfs_create_dir(rdev->desc->name, debugfs_root);
 998         if (IS_ERR_OR_NULL(rdev->debugfs)) {
 999                 pr_warn("Failed to create debugfs directory\n");
1000                 rdev->debugfs = NULL;
1001                 return;
1002         }
1003
1004         debugfs_create_file("enable", S_IRUGO | S_IWUSR,
1005                             desc->debugfs, rdev, &fops_enable);
1006
1007         if (desc->desc.type == REGULATOR_CURRENT)
1008                 debugfs_create_file("current", S_IRUGO | S_IWUSR,
1009                                     desc->debugfs, rdev, &fops_boost);
1010         else
1011                 debugfs_create_file("voltage", S_IRUGO | S_IWUSR,
1012                                     desc->debugfs, rdev, &fops_ldo);
1013 }
1014 #else
1015 static void rdev_init_debugfs(struct regulator_dev *rdev)
1016 {
1017 }
1018 #endif
1019
1020 static void *sci_regulator_register(struct platform_device *pdev,
1021                                        struct sci_regulator_desc *desc)
1022 {
1023         static atomic_t idx = ATOMIC_INIT(1);   /* 0: dummy */
1024         struct regulator_dev *rdev;
1025         struct regulator_ops *__regs_ops[] = {
1026                 &ldo_ops, 0, &dcdc_ops, 0 /*lpref_ops */ , &boost_ops,
1027                 0,
1028         };
1029         struct regulator_consumer_supply consumer_supplies_default[] = {
1030                 [0] = {
1031                        .supply = desc->desc.name,
1032                        }
1033         };
1034 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0))
1035         struct regulator_config config = { };
1036 #endif
1037
1038         struct regulator_init_data init_data = {
1039                 .supply_regulator = 0,
1040                 .constraints = {
1041                                 .min_uV = 0,
1042                                 .max_uV = 4200 * 1000,
1043                                 .valid_modes_mask =
1044                                 REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY,
1045                                 .valid_ops_mask =
1046                                 REGULATOR_CHANGE_STATUS |
1047                                 REGULATOR_CHANGE_VOLTAGE |
1048                                 REGULATOR_CHANGE_MODE,
1049                                 },
1050                 .num_consumer_supplies = 1,
1051                 .consumer_supplies = consumer_supplies_default,
1052                 .regulator_init = 0,
1053                 .driver_data = 0,
1054         };
1055
1056         desc->desc.id = atomic_inc_return(&idx) - 1;
1057
1058         /* Fixme: Config dynamically dcdc/ldo
1059          *   accoring to bit BONDOPT4 & BONDOPT6 for Reg(0x40038800 + 0x00E4)
1060          */
1061
1062         /* BONDOPT6 */
1063         if ((ana_status >> 6) & 0x1) {
1064                 if (0 == strcmp(desc->desc.name, "vddcore")) {
1065                         desc->regs->vol_def = 900;
1066                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1067                         desc->regs->vol_ctl_bits = BIT(3)|BIT(4)|BIT(5);
1068                 } else if (0 == strcmp(desc->desc.name, "vddarm")) {
1069                         desc->regs->vol_def = 900;
1070                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1071                         desc->regs->vol_ctl_bits = BIT(6)|BIT(7)|BIT(8);
1072                 } else if (0 == strcmp(desc->desc.name, "vdd25")) {
1073                         desc->regs->vol_def = 1800;
1074                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1075                         desc->regs->vol_ctl_bits = BIT(9)|BIT(10);
1076                         desc->regs->vol_sel[0] = 2500;
1077                         desc->regs->vol_sel[1] = 2750;
1078                         desc->regs->vol_sel[2] = 1800;
1079                         desc->regs->vol_sel[3] = 1900;
1080                 }
1081         } else {
1082                 if (0 == strcmp(desc->desc.name, "vddcore")) {
1083                         desc->regs->vol_def = 1100;
1084                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_DCDC_CORE_ADI;
1085                         desc->regs->vol_ctl_bits = BIT(5)|BIT(6)|BIT(7);
1086                 } else if (0 == strcmp(desc->desc.name, "vddarm")) {
1087                         desc->regs->vol_def = 1100;
1088                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_DCDC_ARM_ADI;
1089                         desc->regs->vol_ctl_bits = BIT(5)|BIT(6)|BIT(7);
1090                 } else if (0 == strcmp(desc->desc.name, "vdd25")) {
1091                         desc->regs->vol_def = 2500;
1092                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_LDO_V_CTRL0;
1093                         desc->regs->vol_ctl_bits = BIT(4)|BIT(5);
1094                         desc->regs->vol_sel[0] = 2500;
1095                         desc->regs->vol_sel[1] = 2750;
1096                         desc->regs->vol_sel[2] = 3000;
1097                         desc->regs->vol_sel[3] = 2900;
1098                 }
1099         }
1100
1101         /* BONDOPT4 */
1102         if ((ana_status >> 4) & 0x1) {
1103                 if (0 == strcmp(desc->desc.name, "vddwrf")) {
1104                         desc->regs->vol_def = 2800;
1105                         desc->regs->vol_sel[0] = 2600;
1106                         desc->regs->vol_sel[1] = 2700;
1107                         desc->regs->vol_sel[2] = 2800;
1108                         desc->regs->vol_sel[3] = 2900;
1109                 } else if (0 == strcmp(desc->desc.name, "vddrf1")) {
1110                         desc->regs->vol_def = 2850;
1111                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_LDO_V_CTRL0;
1112                         desc->regs->vol_ctl_bits = BIT(8)|BIT(9);
1113                 }
1114         } else {
1115                 if (0 == strcmp(desc->desc.name, "vddwrf")) {
1116                         desc->regs->vol_def = 1500;
1117                         desc->regs->vol_sel[0] = 1300;
1118                         desc->regs->vol_sel[1] = 1400;
1119                         desc->regs->vol_sel[2] = 1500;
1120                         desc->regs->vol_sel[3] = 1600;
1121                 } else if (0 == strcmp(desc->desc.name, "vddrf1")) {
1122                         desc->regs->vol_def = 1200;
1123                         desc->regs->vol_ctl = (u32)ANA_REG_GLB_MP_MISC_CTRL;
1124                         desc->regs->vol_ctl_bits = BIT(11)|BIT(12);
1125                 }
1126         }
1127
1128         BUG_ON(desc->regs->pd_set
1129                && desc->regs->pd_set == desc->regs->pd_rst
1130                && desc->regs->pd_set_bit == desc->regs->pd_rst_bit);
1131
1132         BUG_ON(desc->regs->typ >= ARRAY_SIZE(__regs_ops));
1133         if (!desc->desc.ops)
1134                 desc->desc.ops = __regs_ops[desc->regs->typ];
1135
1136         init_data.consumer_supplies =
1137             set_supply_map(&pdev->dev, desc->desc.name,
1138                            &init_data.num_consumer_supplies);
1139
1140         if (!init_data.consumer_supplies)
1141                 init_data.consumer_supplies = consumer_supplies_default;
1142
1143         debug0("regu %p (%s)\n", desc->regs, desc->desc.name);
1144 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 4, 0))
1145         config.dev = &pdev->dev;
1146         config.init_data = &init_data;
1147         config.driver_data = NULL;
1148         config.of_node = NULL;
1149         rdev = regulator_register(&desc->desc, &config);
1150 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0))
1151         rdev = regulator_register(&desc->desc, &pdev->dev, &init_data, 0, 0);
1152 #else
1153         rdev = regulator_register(&desc->desc, &pdev->dev, &init_data, 0);
1154 #endif
1155
1156         if (init_data.consumer_supplies != consumer_supplies_default)
1157                 kfree(init_data.consumer_supplies);
1158
1159
1160         if (!IS_ERR_OR_NULL(rdev)) {
1161                 rdev->reg_data = rdev;
1162                 //INIT_DELAYED_WORK(&desc->data.dwork, do_regu_work);
1163                 desc->data.rdev = rdev;
1164                 __init_trimming(rdev);
1165                 rdev_init_debugfs(rdev);
1166         }
1167         return rdev;
1168 }
1169
1170 /**
1171  * IMPORTANT!!!
1172  * spreadtrum power regulators is intergrated on the chip, include LDOs and DCDCs.
1173  * so i autogen all regulators non-variable description in plat or mach directory,
1174  * which named __xxxx_regulator_map.h, BUT register all in regulator driver probe func,
1175  * just like other regulator vendor drivers.
1176  */
1177 static int sci_regulator_probe(struct platform_device *pdev)
1178 {
1179         debug0("%s %p\n", __func__, pdev);
1180 #include CONFIG_REGULATOR_SPRD_MAP_V1
1181         return 0;
1182 }
1183
1184 static struct platform_driver sci_regulator_driver = {
1185         .driver = {
1186                 .name = "sc2713s-regulator",
1187                 .owner = THIS_MODULE,
1188                 .of_match_table = of_match_ptr(sprd_regulator_of_match),
1189         },
1190         .probe = sci_regulator_probe,
1191 };
1192
1193 static int __init regu_driver_init(void)
1194 {
1195         u32 ana_chip_id;
1196
1197 #ifdef CONFIG_DEBUG_FS
1198         debugfs_root =
1199             debugfs_create_dir(REGULATOR_ROOT_DIR, NULL);
1200         if (IS_ERR_OR_NULL(debugfs_root)) {
1201                 WARN(!debugfs_root,
1202                      "%s: Failed to create debugfs directory\n", REGULATOR_ROOT_DIR);
1203                 debugfs_root = NULL;
1204         }
1205
1206         debugfs_create_u32("ana_addr", S_IRUGO | S_IWUSR,
1207                            debugfs_root, (u32 *) & ana_addr);
1208         debugfs_create_file("ana_valu", S_IRUGO | S_IWUSR,
1209                             debugfs_root, &ana_addr, &fops_ana_addr);
1210         debugfs_create_file("adc_chan", S_IRUGO | S_IWUSR,
1211                             debugfs_root, &adc_chan, &fops_adc_chan);
1212         debugfs_create_u64("adc_data", S_IRUGO | S_IWUSR,
1213                            debugfs_root, (u64 *) & adc_data);
1214
1215         {/* vddarm/vddcore/vddmem common debugfs interface */
1216                 char str[NAME_MAX];
1217                 struct dentry *vol_root = debugfs_create_dir("vol", NULL);
1218                 sprintf(str, "../%s/vddarm/voltage", REGULATOR_ROOT_DIR);
1219                 debugfs_create_symlink("dcdcarm", vol_root, str);
1220                 sprintf(str, "../%s/vddcore/voltage", REGULATOR_ROOT_DIR);
1221                 debugfs_create_symlink("dcdccore", vol_root, str);
1222                 sprintf(str, "../%s/vddmem/voltage", REGULATOR_ROOT_DIR);
1223                 debugfs_create_symlink("dcdcmem", vol_root, str);
1224         }
1225 #endif
1226
1227         ana_chip_id = (sci_get_ana_chip_id() | sci_get_ana_chip_ver());
1228         ana_status = ANA_REG_GET(ANA_REG_GLB_ANA_STATUS);
1229
1230         pr_info("sc271x ana chip id: (0x%08x), bond opt (0x%08x)\n", ana_chip_id, ana_status);
1231
1232 #ifdef CONFIG_REGULATOR_SUPPORT_CAMIO_1200MV
1233         ANA_REG_OR(ANA_REG_GLB_CA_CTRL0, BIT_LDO_CAMIO_V_B2);
1234 #else
1235         ANA_REG_BIC(ANA_REG_GLB_CA_CTRL0, BIT_LDO_CAMIO_V_B2);
1236 #endif
1237
1238 #include CONFIG_REGULATOR_SPRD_MAP_V1
1239
1240         return 0;
1241 }
1242
1243 static struct platform_driver sci_regulator_driver = {
1244         .driver = {
1245                 .name = "sc2713s-regulator",
1246                 .owner = THIS_MODULE,
1247         },
1248         .probe = sci_regulator_probe,
1249 };
1250
1251 static int __init regu_driver_init(void)
1252 {
1253         __adc_cal_fuse_setup();
1254
1255         return platform_driver_register(&sci_regulator_driver);
1256 }
1257
1258 #ifndef CONFIG_REGULATOR_SC2713
1259 int __init sci_regulator_init(void)
1260 {
1261         static struct platform_device regulator_device = {
1262                 .name = "sc2713s-regulator",
1263                 .id = -1,
1264         };
1265
1266         return platform_device_register(&regulator_device);
1267 }
1268 #endif
1269
1270 subsys_initcall(regu_driver_init);
1271
1272 MODULE_LICENSE("GPL v2");
1273 MODULE_DESCRIPTION("Spreadtrum voltage regulator driver");
1274 MODULE_AUTHOR("robot <zhulin.lian@spreadtrum.com>");
1275 MODULE_VERSION("0.5");