drivers/regulator/pv88090-regulator.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * pv88090-regulator.h - Regulator definitions for PV88090
   4  * Copyright (C) 2015 Powerventure Semiconductor Ltd.
   5  */
   6
   7 #ifndef __PV88090_REGISTERS_H__
   8 #define __PV88090_REGISTERS_H__
   9
  10 /* System Control and Event Registers */
  11 #define PV88090_REG_EVENT_A                     0x03
  12 #define PV88090_REG_MASK_A                      0x06
  13 #define PV88090_REG_MASK_B                      0x07
  14
  15 /* Regulator Registers */
  16 #define PV88090_REG_BUCK1_CONF0                 0x18
  17 #define PV88090_REG_BUCK1_CONF1                 0x19
  18 #define PV88090_REG_BUCK1_CONF2                 0x1a
  19 #define PV88090_REG_BUCK2_CONF0                 0x1b
  20 #define PV88090_REG_BUCK2_CONF1                 0x1c
  21 #define PV88090_REG_BUCK2_CONF2                 0x58
  22 #define PV88090_REG_BUCK3_CONF0                 0x1d
  23 #define PV88090_REG_BUCK3_CONF1                 0x1e
  24 #define PV88090_REG_BUCK3_CONF2                 0x5c
  25
  26 #define PV88090_REG_LDO1_CONT                   0x1f
  27 #define PV88090_REG_LDO2_CONT                   0x20
  28 #define PV88090_REG_LDO3_CONT                   0x21
  29 #define PV88090_REG_BUCK_FOLD_RANGE                     0x61
  30
  31 /* PV88090_REG_EVENT_A (addr=0x03) */
  32 #define PV88090_E_VDD_FLT                               0x01
  33 #define PV88090_E_OVER_TEMP                     0x02
  34
  35 /* PV88090_REG_MASK_A (addr=0x06) */
  36 #define PV88090_M_VDD_FLT                               0x01
  37 #define PV88090_M_OVER_TEMP                     0x02
  38
  39 /* PV88090_REG_BUCK1_CONF0 (addr=0x18) */
  40 #define PV88090_BUCK1_EN                                0x80
  41 #define PV88090_VBUCK1_MASK                     0x7F
  42 /* PV88090_REG_BUCK2_CONF0 (addr=0x1b) */
  43 #define PV88090_BUCK2_EN                                0x80
  44 #define PV88090_VBUCK2_MASK                     0x7F
  45 /* PV88090_REG_BUCK3_CONF0 (addr=0x1d) */
  46 #define PV88090_BUCK3_EN                                0x80
  47 #define PV88090_VBUCK3_MASK                     0x7F
  48 /* PV88090_REG_LDO1_CONT (addr=0x1f) */
  49 #define PV88090_LDO1_EN                         0x40
  50 #define PV88090_VLDO1_MASK                      0x3F
  51 /* PV88090_REG_LDO2_CONT (addr=0x20) */
  52 #define PV88090_LDO2_EN                         0x40
  53 #define PV88090_VLDO2_MASK                      0x3F
  54
  55 /* PV88090_REG_BUCK1_CONF1 (addr=0x19) */
  56 #define PV88090_BUCK1_ILIM_SHIFT                        2
  57 #define PV88090_BUCK1_ILIM_MASK                 0x7C
  58 #define PV88090_BUCK1_MODE_MASK                 0x03
  59
  60 /* PV88090_REG_BUCK2_CONF1 (addr=0x1c) */
  61 #define PV88090_BUCK2_ILIM_SHIFT                        2
  62 #define PV88090_BUCK2_ILIM_MASK                 0x0C
  63 #define PV88090_BUCK2_MODE_MASK                 0x03
  64
  65 /* PV88090_REG_BUCK3_CONF1 (addr=0x1e) */
  66 #define PV88090_BUCK3_ILIM_SHIFT                        2
  67 #define PV88090_BUCK3_ILIM_MASK                 0x0C
  68 #define PV88090_BUCK3_MODE_MASK                 0x03
  69
  70 #define PV88090_BUCK_MODE_SLEEP                 0x00
  71 #define PV88090_BUCK_MODE_AUTO                  0x01
  72 #define PV88090_BUCK_MODE_SYNC                  0x02
  73
  74 /* PV88090_REG_BUCK2_CONF2 (addr=0x58) */
  75 /* PV88090_REG_BUCK3_CONF2 (addr=0x5c) */
  76 #define PV88090_BUCK_VDAC_RANGE_SHIFT                   7
  77 #define PV88090_BUCK_VDAC_RANGE_MASK                    0x01
  78
  79 #define PV88090_BUCK_VDAC_RANGE_1                       0x00
  80 #define PV88090_BUCK_VDAC_RANGE_2                       0x01
  81
  82 /* PV88090_REG_BUCK_FOLD_RANGE (addr=0x61) */
  83 #define PV88090_BUCK_VRANGE_GAIN_SHIFT                  3
  84 #define PV88090_BUCK_VRANGE_GAIN_MASK                   0x01
  85
  86 #define PV88090_BUCK_VRANGE_GAIN_1                      0x00
  87 #define PV88090_BUCK_VRANGE_GAIN_2                      0x01
  88
  89 #endif  /* __PV88090_REGISTERS_H__ */