1 // SPDX-License-Identifier: GPL-2.0-only
3 * Maxim MAX77620 Regulator driver
5 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
7 * Author: Mallikarjun Kasoju <mkasoju@nvidia.com>
8 * Laxman Dewangan <ldewangan@nvidia.com>
11 #include <linux/init.h>
12 #include <linux/mfd/max77620.h>
13 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/regmap.h>
17 #include <linux/regulator/driver.h>
18 #include <linux/regulator/machine.h>
19 #include <linux/regulator/of_regulator.h>
21 #define max77620_rails(_name) "max77620-"#_name
24 #define MAX77620_POWER_MODE_NORMAL 3
25 #define MAX77620_POWER_MODE_LPM 2
26 #define MAX77620_POWER_MODE_GLPM 1
27 #define MAX77620_POWER_MODE_DISABLE 0
30 #define MAX77620_SD_SR_13_75 0
31 #define MAX77620_SD_SR_27_5 1
32 #define MAX77620_SD_SR_55 2
33 #define MAX77620_SD_SR_100 3
35 enum max77620_regulators {
36 MAX77620_REGULATOR_ID_SD0,
37 MAX77620_REGULATOR_ID_SD1,
38 MAX77620_REGULATOR_ID_SD2,
39 MAX77620_REGULATOR_ID_SD3,
40 MAX77620_REGULATOR_ID_SD4,
41 MAX77620_REGULATOR_ID_LDO0,
42 MAX77620_REGULATOR_ID_LDO1,
43 MAX77620_REGULATOR_ID_LDO2,
44 MAX77620_REGULATOR_ID_LDO3,
45 MAX77620_REGULATOR_ID_LDO4,
46 MAX77620_REGULATOR_ID_LDO5,
47 MAX77620_REGULATOR_ID_LDO6,
48 MAX77620_REGULATOR_ID_LDO7,
49 MAX77620_REGULATOR_ID_LDO8,
54 enum max77620_regulator_type {
55 MAX77620_REGULATOR_TYPE_SD,
56 MAX77620_REGULATOR_TYPE_LDO_N,
57 MAX77620_REGULATOR_TYPE_LDO_P,
60 struct max77620_regulator_info {
69 struct regulator_desc desc;
72 struct max77620_regulator_pdata {
74 int active_fps_pd_slot;
75 int active_fps_pu_slot;
77 int suspend_fps_pd_slot;
78 int suspend_fps_pu_slot;
81 int ramp_rate_setting;
84 struct max77620_regulator {
87 struct max77620_regulator_info *rinfo[MAX77620_NUM_REGS];
88 struct max77620_regulator_pdata reg_pdata[MAX77620_NUM_REGS];
89 int enable_power_mode[MAX77620_NUM_REGS];
90 int current_power_mode[MAX77620_NUM_REGS];
91 int active_fps_src[MAX77620_NUM_REGS];
94 #define fps_src_name(fps_src) \
95 (fps_src == MAX77620_FPS_SRC_0 ? "FPS_SRC_0" : \
96 fps_src == MAX77620_FPS_SRC_1 ? "FPS_SRC_1" : \
97 fps_src == MAX77620_FPS_SRC_2 ? "FPS_SRC_2" : "FPS_SRC_NONE")
99 static int max77620_regulator_get_fps_src(struct max77620_regulator *pmic,
102 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
106 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
108 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
109 rinfo->fps_addr, ret);
113 return (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
116 static int max77620_regulator_set_fps_src(struct max77620_regulator *pmic,
119 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
127 case MAX77620_FPS_SRC_0:
128 case MAX77620_FPS_SRC_1:
129 case MAX77620_FPS_SRC_2:
130 case MAX77620_FPS_SRC_NONE:
133 case MAX77620_FPS_SRC_DEF:
134 ret = regmap_read(pmic->rmap, rinfo->fps_addr, &val);
136 dev_err(pmic->dev, "Reg 0x%02x read failed %d\n",
137 rinfo->fps_addr, ret);
140 ret = (val & MAX77620_FPS_SRC_MASK) >> MAX77620_FPS_SRC_SHIFT;
141 pmic->active_fps_src[id] = ret;
145 dev_err(pmic->dev, "Invalid FPS %d for regulator %d\n",
150 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
151 MAX77620_FPS_SRC_MASK,
152 fps_src << MAX77620_FPS_SRC_SHIFT);
154 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
155 rinfo->fps_addr, ret);
158 pmic->active_fps_src[id] = fps_src;
163 static int max77620_regulator_set_fps_slots(struct max77620_regulator *pmic,
164 int id, bool is_suspend)
166 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
167 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
168 unsigned int val = 0;
169 unsigned int mask = 0;
170 int pu = rpdata->active_fps_pu_slot;
171 int pd = rpdata->active_fps_pd_slot;
178 pu = rpdata->suspend_fps_pu_slot;
179 pd = rpdata->suspend_fps_pd_slot;
182 /* FPS power up period setting */
184 val |= (pu << MAX77620_FPS_PU_PERIOD_SHIFT);
185 mask |= MAX77620_FPS_PU_PERIOD_MASK;
188 /* FPS power down period setting */
190 val |= (pd << MAX77620_FPS_PD_PERIOD_SHIFT);
191 mask |= MAX77620_FPS_PD_PERIOD_MASK;
195 ret = regmap_update_bits(pmic->rmap, rinfo->fps_addr,
198 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
199 rinfo->fps_addr, ret);
207 static int max77620_regulator_set_power_mode(struct max77620_regulator *pmic,
208 int power_mode, int id)
210 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
211 u8 mask = rinfo->power_mode_mask;
212 u8 shift = rinfo->power_mode_shift;
216 switch (rinfo->type) {
217 case MAX77620_REGULATOR_TYPE_SD:
218 addr = rinfo->cfg_addr;
221 addr = rinfo->volt_addr;
225 ret = regmap_update_bits(pmic->rmap, addr, mask, power_mode << shift);
227 dev_err(pmic->dev, "Regulator %d mode set failed: %d\n",
231 pmic->current_power_mode[id] = power_mode;
236 static int max77620_regulator_get_power_mode(struct max77620_regulator *pmic,
239 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
240 unsigned int val, addr;
241 u8 mask = rinfo->power_mode_mask;
242 u8 shift = rinfo->power_mode_shift;
245 switch (rinfo->type) {
246 case MAX77620_REGULATOR_TYPE_SD:
247 addr = rinfo->cfg_addr;
250 addr = rinfo->volt_addr;
254 ret = regmap_read(pmic->rmap, addr, &val);
256 dev_err(pmic->dev, "Regulator %d: Reg 0x%02x read failed: %d\n",
261 return (val & mask) >> shift;
264 static int max77620_read_slew_rate(struct max77620_regulator *pmic, int id)
266 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
271 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &rval);
273 dev_err(pmic->dev, "Register 0x%02x read failed: %d\n",
274 rinfo->cfg_addr, ret);
278 switch (rinfo->type) {
279 case MAX77620_REGULATOR_TYPE_SD:
280 slew_rate = (rval >> MAX77620_SD_SR_SHIFT) & 0x3;
295 rinfo->desc.ramp_delay = slew_rate;
298 slew_rate = rval & 0x1;
307 rinfo->desc.ramp_delay = slew_rate;
314 static int max77620_set_slew_rate(struct max77620_regulator *pmic, int id,
317 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
322 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
323 if (slew_rate <= 13750)
325 else if (slew_rate <= 27500)
327 else if (slew_rate <= 55000)
331 val <<= MAX77620_SD_SR_SHIFT;
332 mask = MAX77620_SD_SR_MASK;
334 if (slew_rate <= 5000)
338 mask = MAX77620_LDO_SLEW_RATE_MASK;
341 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr, mask, val);
343 dev_err(pmic->dev, "Regulator %d slew rate set failed: %d\n",
351 static int max77620_config_power_ok(struct max77620_regulator *pmic, int id)
353 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
354 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
355 struct max77620_chip *chip = dev_get_drvdata(pmic->dev->parent);
359 switch (chip->chip_id) {
361 if (rpdata->power_ok >= 0) {
362 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD)
363 mask = MAX20024_SD_CFG1_MPOK_MASK;
365 mask = MAX20024_LDO_CFG2_MPOK_MASK;
367 val = rpdata->power_ok ? mask : 0;
369 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
372 dev_err(pmic->dev, "Reg 0x%02x update failed %d\n",
373 rinfo->cfg_addr, ret);
386 static int max77620_init_pmic(struct max77620_regulator *pmic, int id)
388 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
391 max77620_config_power_ok(pmic, id);
393 /* Update power mode */
394 ret = max77620_regulator_get_power_mode(pmic, id);
398 pmic->current_power_mode[id] = ret;
399 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
401 if (rpdata->active_fps_src == MAX77620_FPS_SRC_DEF) {
402 ret = max77620_regulator_get_fps_src(pmic, id);
405 rpdata->active_fps_src = ret;
408 /* If rails are externally control of FPS then enable it always. */
409 if (rpdata->active_fps_src == MAX77620_FPS_SRC_NONE) {
410 ret = max77620_regulator_set_power_mode(pmic,
411 pmic->enable_power_mode[id], id);
415 if (pmic->current_power_mode[id] !=
416 pmic->enable_power_mode[id]) {
417 ret = max77620_regulator_set_power_mode(pmic,
418 pmic->enable_power_mode[id], id);
424 ret = max77620_regulator_set_fps_src(pmic, rpdata->active_fps_src, id);
428 ret = max77620_regulator_set_fps_slots(pmic, id, false);
432 if (rpdata->ramp_rate_setting) {
433 ret = max77620_set_slew_rate(pmic, id,
434 rpdata->ramp_rate_setting);
442 static int max77620_regulator_enable(struct regulator_dev *rdev)
444 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
445 int id = rdev_get_id(rdev);
447 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
450 return max77620_regulator_set_power_mode(pmic,
451 pmic->enable_power_mode[id], id);
454 static int max77620_regulator_disable(struct regulator_dev *rdev)
456 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
457 int id = rdev_get_id(rdev);
459 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
462 return max77620_regulator_set_power_mode(pmic,
463 MAX77620_POWER_MODE_DISABLE, id);
466 static int max77620_regulator_is_enabled(struct regulator_dev *rdev)
468 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
469 int id = rdev_get_id(rdev);
472 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE)
475 ret = max77620_regulator_get_power_mode(pmic, id);
479 if (ret != MAX77620_POWER_MODE_DISABLE)
485 static int max77620_regulator_set_mode(struct regulator_dev *rdev,
488 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
489 int id = rdev_get_id(rdev);
490 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
491 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
498 case REGULATOR_MODE_FAST:
500 power_mode = MAX77620_POWER_MODE_NORMAL;
503 case REGULATOR_MODE_NORMAL:
504 power_mode = MAX77620_POWER_MODE_NORMAL;
507 case REGULATOR_MODE_IDLE:
508 power_mode = MAX77620_POWER_MODE_LPM;
512 dev_err(pmic->dev, "Regulator %d mode %d is invalid\n",
517 if (rinfo->type != MAX77620_REGULATOR_TYPE_SD)
520 val = (fpwm) ? MAX77620_SD_FPWM_MASK : 0;
521 ret = regmap_update_bits(pmic->rmap, rinfo->cfg_addr,
522 MAX77620_SD_FPWM_MASK, val);
524 dev_err(pmic->dev, "Reg 0x%02x update failed: %d\n",
525 rinfo->cfg_addr, ret);
528 rpdata->current_mode = mode;
531 ret = max77620_regulator_set_power_mode(pmic, power_mode, id);
535 pmic->enable_power_mode[id] = power_mode;
540 static unsigned int max77620_regulator_get_mode(struct regulator_dev *rdev)
542 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
543 int id = rdev_get_id(rdev);
544 struct max77620_regulator_info *rinfo = pmic->rinfo[id];
547 int pm_mode, reg_mode;
550 ret = max77620_regulator_get_power_mode(pmic, id);
556 if (rinfo->type == MAX77620_REGULATOR_TYPE_SD) {
557 ret = regmap_read(pmic->rmap, rinfo->cfg_addr, &val);
559 dev_err(pmic->dev, "Reg 0x%02x read failed: %d\n",
560 rinfo->cfg_addr, ret);
563 fpwm = !!(val & MAX77620_SD_FPWM_MASK);
567 case MAX77620_POWER_MODE_NORMAL:
568 case MAX77620_POWER_MODE_DISABLE:
570 reg_mode = REGULATOR_MODE_FAST;
572 reg_mode = REGULATOR_MODE_NORMAL;
574 case MAX77620_POWER_MODE_LPM:
575 case MAX77620_POWER_MODE_GLPM:
576 reg_mode = REGULATOR_MODE_IDLE;
585 static int max77620_regulator_set_ramp_delay(struct regulator_dev *rdev,
588 struct max77620_regulator *pmic = rdev_get_drvdata(rdev);
589 int id = rdev_get_id(rdev);
590 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[id];
592 /* Device specific ramp rate setting tells that platform has
593 * different ramp rate from advertised value. In this case,
594 * do not configure anything and just return success.
596 if (rpdata->ramp_rate_setting)
599 return max77620_set_slew_rate(pmic, id, ramp_delay);
602 static int max77620_of_parse_cb(struct device_node *np,
603 const struct regulator_desc *desc,
604 struct regulator_config *config)
606 struct max77620_regulator *pmic = config->driver_data;
607 struct max77620_regulator_pdata *rpdata = &pmic->reg_pdata[desc->id];
611 ret = of_property_read_u32(np, "maxim,active-fps-source", &pval);
612 rpdata->active_fps_src = (!ret) ? pval : MAX77620_FPS_SRC_DEF;
614 ret = of_property_read_u32(np, "maxim,active-fps-power-up-slot", &pval);
615 rpdata->active_fps_pu_slot = (!ret) ? pval : -1;
617 ret = of_property_read_u32(
618 np, "maxim,active-fps-power-down-slot", &pval);
619 rpdata->active_fps_pd_slot = (!ret) ? pval : -1;
621 ret = of_property_read_u32(np, "maxim,suspend-fps-source", &pval);
622 rpdata->suspend_fps_src = (!ret) ? pval : -1;
624 ret = of_property_read_u32(
625 np, "maxim,suspend-fps-power-up-slot", &pval);
626 rpdata->suspend_fps_pu_slot = (!ret) ? pval : -1;
628 ret = of_property_read_u32(
629 np, "maxim,suspend-fps-power-down-slot", &pval);
630 rpdata->suspend_fps_pd_slot = (!ret) ? pval : -1;
632 ret = of_property_read_u32(np, "maxim,power-ok-control", &pval);
634 rpdata->power_ok = pval;
636 rpdata->power_ok = -1;
638 ret = of_property_read_u32(np, "maxim,ramp-rate-setting", &pval);
639 rpdata->ramp_rate_setting = (!ret) ? pval : 0;
641 return max77620_init_pmic(pmic, desc->id);
644 static const struct regulator_ops max77620_regulator_ops = {
645 .is_enabled = max77620_regulator_is_enabled,
646 .enable = max77620_regulator_enable,
647 .disable = max77620_regulator_disable,
648 .list_voltage = regulator_list_voltage_linear,
649 .map_voltage = regulator_map_voltage_linear,
650 .get_voltage_sel = regulator_get_voltage_sel_regmap,
651 .set_voltage_sel = regulator_set_voltage_sel_regmap,
652 .set_mode = max77620_regulator_set_mode,
653 .get_mode = max77620_regulator_get_mode,
654 .set_ramp_delay = max77620_regulator_set_ramp_delay,
655 .set_voltage_time_sel = regulator_set_voltage_time_sel,
656 .set_active_discharge = regulator_set_active_discharge_regmap,
659 #define MAX77620_SD_CNF2_ROVS_EN_NONE 0
660 #define RAIL_SD(_id, _name, _sname, _volt_mask, _min_uV, _max_uV, \
661 _step_uV, _rs_add, _rs_mask) \
662 [MAX77620_REGULATOR_ID_##_id] = { \
663 .type = MAX77620_REGULATOR_TYPE_SD, \
664 .volt_addr = MAX77620_REG_##_id, \
665 .cfg_addr = MAX77620_REG_##_id##_CFG, \
666 .fps_addr = MAX77620_REG_FPS_##_id, \
667 .remote_sense_addr = _rs_add, \
668 .remote_sense_mask = MAX77620_SD_CNF2_ROVS_EN_##_rs_mask, \
669 .power_mode_mask = MAX77620_SD_POWER_MODE_MASK, \
670 .power_mode_shift = MAX77620_SD_POWER_MODE_SHIFT, \
672 .name = max77620_rails(_name), \
673 .of_match = of_match_ptr(#_name), \
674 .regulators_node = of_match_ptr("regulators"), \
675 .of_parse_cb = max77620_of_parse_cb, \
676 .supply_name = _sname, \
677 .id = MAX77620_REGULATOR_ID_##_id, \
678 .ops = &max77620_regulator_ops, \
679 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
681 .uV_step = _step_uV, \
682 .enable_time = 500, \
683 .vsel_mask = MAX77620_##_volt_mask##_VOLT_MASK, \
684 .vsel_reg = MAX77620_REG_##_id, \
685 .active_discharge_off = 0, \
686 .active_discharge_on = MAX77620_SD_CFG1_ADE_ENABLE, \
687 .active_discharge_mask = MAX77620_SD_CFG1_ADE_MASK, \
688 .active_discharge_reg = MAX77620_REG_##_id##_CFG, \
689 .type = REGULATOR_VOLTAGE, \
690 .owner = THIS_MODULE, \
694 #define RAIL_LDO(_id, _name, _sname, _type, _min_uV, _max_uV, _step_uV) \
695 [MAX77620_REGULATOR_ID_##_id] = { \
696 .type = MAX77620_REGULATOR_TYPE_LDO_##_type, \
697 .volt_addr = MAX77620_REG_##_id##_CFG, \
698 .cfg_addr = MAX77620_REG_##_id##_CFG2, \
699 .fps_addr = MAX77620_REG_FPS_##_id, \
700 .remote_sense_addr = 0xFF, \
701 .power_mode_mask = MAX77620_LDO_POWER_MODE_MASK, \
702 .power_mode_shift = MAX77620_LDO_POWER_MODE_SHIFT, \
704 .name = max77620_rails(_name), \
705 .of_match = of_match_ptr(#_name), \
706 .regulators_node = of_match_ptr("regulators"), \
707 .of_parse_cb = max77620_of_parse_cb, \
708 .supply_name = _sname, \
709 .id = MAX77620_REGULATOR_ID_##_id, \
710 .ops = &max77620_regulator_ops, \
711 .n_voltages = ((_max_uV - _min_uV) / _step_uV) + 1, \
713 .uV_step = _step_uV, \
714 .enable_time = 500, \
715 .vsel_mask = MAX77620_LDO_VOLT_MASK, \
716 .vsel_reg = MAX77620_REG_##_id##_CFG, \
717 .active_discharge_off = 0, \
718 .active_discharge_on = MAX77620_LDO_CFG2_ADE_ENABLE, \
719 .active_discharge_mask = MAX77620_LDO_CFG2_ADE_MASK, \
720 .active_discharge_reg = MAX77620_REG_##_id##_CFG2, \
721 .type = REGULATOR_VOLTAGE, \
722 .owner = THIS_MODULE, \
726 static struct max77620_regulator_info max77620_regs_info[MAX77620_NUM_REGS] = {
727 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 1400000, 12500, 0x22, SD0),
728 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 1550000, 12500, 0x22, SD1),
729 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
730 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
732 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
733 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
734 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
735 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
736 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
737 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
738 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
739 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
740 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
743 static struct max77620_regulator_info max20024_regs_info[MAX77620_NUM_REGS] = {
744 RAIL_SD(SD0, sd0, "in-sd0", SD0, 800000, 1587500, 12500, 0x22, SD0),
745 RAIL_SD(SD1, sd1, "in-sd1", SD1, 600000, 3387500, 12500, 0x22, SD1),
746 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
747 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
748 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
750 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
751 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
752 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
753 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
754 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
755 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
756 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
757 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
758 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
761 static struct max77620_regulator_info max77663_regs_info[MAX77620_NUM_REGS] = {
762 RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 3387500, 12500, 0xFF, NONE),
763 RAIL_SD(SD1, sd1, "in-sd1", SD1, 800000, 1587500, 12500, 0xFF, NONE),
764 RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE),
765 RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE),
766 RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE),
768 RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000),
769 RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000),
770 RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000),
771 RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000),
772 RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500),
773 RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000),
774 RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000),
775 RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000),
776 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000),
779 static int max77620_regulator_probe(struct platform_device *pdev)
781 struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent);
782 struct max77620_regulator_info *rinfo;
783 struct device *dev = &pdev->dev;
784 struct regulator_config config = { };
785 struct max77620_regulator *pmic;
789 pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
793 platform_set_drvdata(pdev, pmic);
795 pmic->rmap = max77620_chip->rmap;
797 dev->of_node = pdev->dev.parent->of_node;
799 switch (max77620_chip->chip_id) {
801 rinfo = max77620_regs_info;
804 rinfo = max20024_regs_info;
807 rinfo = max77663_regs_info;
813 config.regmap = pmic->rmap;
815 config.driver_data = pmic;
818 * Set of_node_reuse flag to prevent driver core from attempting to
819 * claim any pinmux resources already claimed by the parent device.
820 * Otherwise PMIC driver will fail to re-probe.
822 device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent);
824 for (id = 0; id < MAX77620_NUM_REGS; id++) {
825 struct regulator_dev *rdev;
826 struct regulator_desc *rdesc;
828 if ((max77620_chip->chip_id == MAX77620) &&
829 (id == MAX77620_REGULATOR_ID_SD4))
832 rdesc = &rinfo[id].desc;
833 pmic->rinfo[id] = &rinfo[id];
834 pmic->enable_power_mode[id] = MAX77620_POWER_MODE_NORMAL;
835 pmic->reg_pdata[id].active_fps_src = -1;
836 pmic->reg_pdata[id].active_fps_pd_slot = -1;
837 pmic->reg_pdata[id].active_fps_pu_slot = -1;
838 pmic->reg_pdata[id].suspend_fps_src = -1;
839 pmic->reg_pdata[id].suspend_fps_pd_slot = -1;
840 pmic->reg_pdata[id].suspend_fps_pu_slot = -1;
841 pmic->reg_pdata[id].power_ok = -1;
842 pmic->reg_pdata[id].ramp_rate_setting = -1;
844 ret = max77620_read_slew_rate(pmic, id);
848 rdev = devm_regulator_register(dev, rdesc, &config);
850 return dev_err_probe(dev, PTR_ERR(rdev),
851 "Regulator registration %s failed\n",
858 #ifdef CONFIG_PM_SLEEP
859 static int max77620_regulator_suspend(struct device *dev)
861 struct max77620_regulator *pmic = dev_get_drvdata(dev);
862 struct max77620_regulator_pdata *reg_pdata;
865 for (id = 0; id < MAX77620_NUM_REGS; id++) {
866 reg_pdata = &pmic->reg_pdata[id];
868 max77620_regulator_set_fps_slots(pmic, id, true);
869 if (reg_pdata->suspend_fps_src < 0)
872 max77620_regulator_set_fps_src(pmic, reg_pdata->suspend_fps_src,
879 static int max77620_regulator_resume(struct device *dev)
881 struct max77620_regulator *pmic = dev_get_drvdata(dev);
882 struct max77620_regulator_pdata *reg_pdata;
885 for (id = 0; id < MAX77620_NUM_REGS; id++) {
886 reg_pdata = &pmic->reg_pdata[id];
888 max77620_config_power_ok(pmic, id);
890 max77620_regulator_set_fps_slots(pmic, id, false);
891 if (reg_pdata->active_fps_src < 0)
893 max77620_regulator_set_fps_src(pmic, reg_pdata->active_fps_src,
901 static const struct dev_pm_ops max77620_regulator_pm_ops = {
902 SET_SYSTEM_SLEEP_PM_OPS(max77620_regulator_suspend,
903 max77620_regulator_resume)
906 static const struct platform_device_id max77620_regulator_devtype[] = {
907 { .name = "max77620-pmic", },
908 { .name = "max20024-pmic", },
909 { .name = "max77663-pmic", },
912 MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype);
914 static struct platform_driver max77620_regulator_driver = {
915 .probe = max77620_regulator_probe,
916 .id_table = max77620_regulator_devtype,
918 .name = "max77620-pmic",
919 .pm = &max77620_regulator_pm_ops,
923 module_platform_driver(max77620_regulator_driver);
925 MODULE_DESCRIPTION("MAX77620/MAX20024 regulator driver");
926 MODULE_AUTHOR("Mallikarjun Kasoju <mkasoju@nvidia.com>");
927 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
928 MODULE_LICENSE("GPL v2");