drivers/regulator/da9210-regulator.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * da9210-regulator.h - Regulator definitions for DA9210
   4  * Copyright (C) 2013  Dialog Semiconductor Ltd.
   5  */
   6
   7 #ifndef __DA9210_REGISTERS_H__
   8 #define __DA9210_REGISTERS_H__
   9
  10 struct da9210_pdata {
  11         struct regulator_init_data da9210_constraints;
  12 };
  13
  14 /* Page selection */
  15 #define DA9210_REG_PAGE_CON                     0x00
  16
  17 /* System Control and Event Registers */
  18 #define DA9210_REG_STATUS_A                     0x50
  19 #define DA9210_REG_STATUS_B                     0x51
  20 #define DA9210_REG_EVENT_A                      0x52
  21 #define DA9210_REG_EVENT_B                      0x53
  22 #define DA9210_REG_MASK_A                       0x54
  23 #define DA9210_REG_MASK_B                       0x55
  24 #define DA9210_REG_CONTROL_A                    0x56
  25
  26 /* GPIO Control Registers */
  27 #define DA9210_REG_GPIO_0_1                     0x58
  28 #define DA9210_REG_GPIO_2_3                     0x59
  29 #define DA9210_REG_GPIO_4_5                     0x5A
  30 #define DA9210_REG_GPIO_6                       0x5B
  31
  32 /* Regulator Registers */
  33 #define DA9210_REG_BUCK_CONT                    0x5D
  34 #define DA9210_REG_BUCK_ILIM                    0xD0
  35 #define DA9210_REG_BUCK_CONF1                   0xD1
  36 #define DA9210_REG_BUCK_CONF2                   0xD2
  37 #define DA9210_REG_VBACK_AUTO                   0xD4
  38 #define DA9210_REG_VBACK_BASE                   0xD5
  39 #define DA9210_REG_VBACK_MAX_DVC_IF             0xD6
  40 #define DA9210_REG_VBACK_DVC                    0xD7
  41 #define DA9210_REG_VBUCK_A                      0xD8
  42 #define DA9210_REG_VBUCK_B                      0xD9
  43
  44 /* I2C Interface Settings */
  45 #define DA9210_REG_INTERFACE                    0x105
  46
  47 /* OTP */
  48 #define DA9210_REG_OPT_COUNT                    0x140
  49 #define DA9210_REG_OPT_ADDR                     0x141
  50 #define DA9210_REG_OPT_DATA                     0x142
  51
  52 /* Customer Trim and Configuration */
  53 #define DA9210_REG_CONFIG_A                     0x143
  54 #define DA9210_REG_CONFIG_B                     0x144
  55 #define DA9210_REG_CONFIG_C                     0x145
  56 #define DA9210_REG_CONFIG_D                     0x146
  57 #define DA9210_REG_CONFIG_E                     0x147
  58
  59
  60 /*
  61  * Registers bits
  62  */
  63 /* DA9210_REG_PAGE_CON (addr=0x00) */
  64 #define DA9210_PEG_PAGE_SHIFT                   0
  65 #define DA9210_REG_PAGE_MASK                    0x0F
  66 /* On I2C registers 0x00 - 0xFF */
  67 #define DA9210_REG_PAGE0                        0
  68 /* On I2C registers 0x100 - 0x1FF */
  69 #define DA9210_REG_PAGE2                        2
  70 #define DA9210_PAGE_WRITE_MODE                  0x00
  71 #define DA9210_REPEAT_WRITE_MODE                0x40
  72 #define DA9210_PAGE_REVERT                      0x80
  73
  74 /* DA9210_REG_STATUS_A (addr=0x50) */
  75 #define DA9210_GPI0                             0x01
  76 #define DA9210_GPI1                             0x02
  77 #define DA9210_GPI2                             0x04
  78 #define DA9210_GPI3                             0x08
  79 #define DA9210_GPI4                             0x10
  80 #define DA9210_GPI5                             0x20
  81 #define DA9210_GPI6                             0x40
  82
  83 /* DA9210_REG_EVENT_A (addr=0x52) */
  84 #define DA9210_E_GPI0                           0x01
  85 #define DA9210_E_GPI1                           0x02
  86 #define DA9210_E_GPI2                           0x04
  87 #define DA9210_E_GPI3                           0x08
  88 #define DA9210_E_GPI4                           0x10
  89 #define DA9210_E_GPI5                           0x20
  90 #define DA9210_E_GPI6                           0x40
  91
  92 /* DA9210_REG_EVENT_B (addr=0x53) */
  93 #define DA9210_E_OVCURR                         0x01
  94 #define DA9210_E_NPWRGOOD                       0x02
  95 #define DA9210_E_TEMP_WARN                      0x04
  96 #define DA9210_E_TEMP_CRIT                      0x08
  97 #define DA9210_E_VMAX                           0x10
  98
  99 /* DA9210_REG_MASK_A (addr=0x54) */
 100 #define DA9210_M_GPI0                           0x01
 101 #define DA9210_M_GPI1                           0x02
 102 #define DA9210_M_GPI2                           0x04
 103 #define DA9210_M_GPI3                           0x08
 104 #define DA9210_M_GPI4                           0x10
 105 #define DA9210_M_GPI5                           0x20
 106 #define DA9210_M_GPI6                           0x40
 107
 108 /* DA9210_REG_MASK_B (addr=0x55) */
 109 #define DA9210_M_OVCURR                         0x01
 110 #define DA9210_M_NPWRGOOD                       0x02
 111 #define DA9210_M_TEMP_WARN                      0x04
 112 #define DA9210_M_TEMP_CRIT                      0x08
 113 #define DA9210_M_VMAX                           0x10
 114
 115 /* DA9210_REG_CONTROL_A (addr=0x56) */
 116 #define DA9210_DEBOUNCING_SHIFT                 0
 117 #define DA9210_DEBOUNCING_MASK                  0x07
 118 #define DA9210_SLEW_RATE_SHIFT                  3
 119 #define DA9210_SLEW_RATE_MASK                   0x18
 120 #define DA9210_V_LOCK                           0x20
 121
 122 /* DA9210_REG_GPIO_0_1 (addr=0x58) */
 123 #define DA9210_GPIO0_PIN_SHIFT                  0
 124 #define DA9210_GPIO0_PIN_MASK                   0x03
 125 #define         DA9210_GPIO0_PIN_GPI            0x00
 126 #define         DA9210_GPIO0_PIN_GPO_OD         0x02
 127 #define         DA9210_GPIO0_PIN_GPO            0x03
 128 #define DA9210_GPIO0_TYPE                       0x04
 129 #define         DA9210_GPIO0_TYPE_GPI           0x00
 130 #define         DA9210_GPIO0_TYPE_GPO           0x04
 131 #define DA9210_GPIO0_MODE                       0x08
 132 #define DA9210_GPIO1_PIN_SHIFT                  4
 133 #define DA9210_GPIO1_PIN_MASK                   0x30
 134 #define         DA9210_GPIO1_PIN_GPI            0x00
 135 #define         DA9210_GPIO1_PIN_VERROR         0x10
 136 #define         DA9210_GPIO1_PIN_GPO_OD         0x20
 137 #define         DA9210_GPIO1_PIN_GPO            0x30
 138 #define DA9210_GPIO1_TYPE_SHIFT                 0x40
 139 #define         DA9210_GPIO1_TYPE_GPI           0x00
 140 #define         DA9210_GPIO1_TYPE_GPO           0x40
 141 #define DA9210_GPIO1_MODE                       0x80
 142
 143 /* DA9210_REG_GPIO_2_3 (addr=0x59) */
 144 #define DA9210_GPIO2_PIN_SHIFT                  0
 145 #define DA9210_GPIO2_PIN_MASK                   0x03
 146 #define         DA9210_GPIO2_PIN_GPI            0x00
 147 #define         DA9210_GPIO5_PIN_BUCK_CLK       0x10
 148 #define         DA9210_GPIO2_PIN_GPO_OD         0x02
 149 #define         DA9210_GPIO2_PIN_GPO            0x03
 150 #define DA9210_GPIO2_TYPE                       0x04
 151 #define         DA9210_GPIO2_TYPE_GPI           0x00
 152 #define         DA9210_GPIO2_TYPE_GPO           0x04
 153 #define DA9210_GPIO2_MODE                       0x08
 154 #define DA9210_GPIO3_PIN_SHIFT                  4
 155 #define DA9210_GPIO3_PIN_MASK                   0x30
 156 #define         DA9210_GPIO3_PIN_GPI            0x00
 157 #define         DA9210_GPIO3_PIN_IERROR         0x10
 158 #define         DA9210_GPIO3_PIN_GPO_OD         0x20
 159 #define         DA9210_GPIO3_PIN_GPO            0x30
 160 #define DA9210_GPIO3_TYPE_SHIFT                 0x40
 161 #define         DA9210_GPIO3_TYPE_GPI           0x00
 162 #define         DA9210_GPIO3_TYPE_GPO           0x40
 163 #define DA9210_GPIO3_MODE                       0x80
 164
 165 /* DA9210_REG_GPIO_4_5 (addr=0x5A) */
 166 #define DA9210_GPIO4_PIN_SHIFT                  0
 167 #define DA9210_GPIO4_PIN_MASK                   0x03
 168 #define         DA9210_GPIO4_PIN_GPI            0x00
 169 #define         DA9210_GPIO4_PIN_GPO_OD         0x02
 170 #define         DA9210_GPIO4_PIN_GPO            0x03
 171 #define DA9210_GPIO4_TYPE                       0x04
 172 #define         DA9210_GPIO4_TYPE_GPI           0x00
 173 #define         DA9210_GPIO4_TYPE_GPO           0x04
 174 #define DA9210_GPIO4_MODE                       0x08
 175 #define DA9210_GPIO5_PIN_SHIFT                  4
 176 #define DA9210_GPIO5_PIN_MASK                   0x30
 177 #define         DA9210_GPIO5_PIN_GPI            0x00
 178 #define         DA9210_GPIO5_PIN_INTERFACE      0x01
 179 #define         DA9210_GPIO5_PIN_GPO_OD         0x20
 180 #define         DA9210_GPIO5_PIN_GPO            0x30
 181 #define DA9210_GPIO5_TYPE_SHIFT                 0x40
 182 #define         DA9210_GPIO5_TYPE_GPI           0x00
 183 #define         DA9210_GPIO5_TYPE_GPO           0x40
 184 #define DA9210_GPIO5_MODE                       0x80
 185
 186 /* DA9210_REG_GPIO_6 (addr=0x5B) */
 187 #define DA9210_GPIO6_PIN_SHIFT                  0
 188 #define DA9210_GPIO6_PIN_MASK                   0x03
 189 #define         DA9210_GPIO6_PIN_GPI            0x00
 190 #define         DA9210_GPIO6_PIN_INTERFACE      0x01
 191 #define         DA9210_GPIO6_PIN_GPO_OD         0x02
 192 #define         DA9210_GPIO6_PIN_GPO            0x03
 193 #define DA9210_GPIO6_TYPE                       0x04
 194 #define         DA9210_GPIO6_TYPE_GPI           0x00
 195 #define         DA9210_GPIO6_TYPE_GPO           0x04
 196 #define DA9210_GPIO6_MODE                       0x08
 197
 198 /* DA9210_REG_BUCK_CONT (addr=0x5D) */
 199 #define DA9210_BUCK_EN                          0x01
 200 #define DA9210_BUCK_GPI_SHIFT                   1
 201 #define DA9210_BUCK_GPI_MASK                    0x06
 202 #define         DA9210_BUCK_GPI_OFF             0x00
 203 #define         DA9210_BUCK_GPI_GPIO0           0x02
 204 #define         DA9210_BUCK_GPI_GPIO3           0x04
 205 #define         DA9210_BUCK_GPI_GPIO4           0x06
 206 #define DA9210_BUCK_PD_DIS                      0x08
 207 #define DA9210_VBUCK_SEL                        0x10
 208 #define         DA9210_VBUCK_SEL_A              0x00
 209 #define         DA9210_VBUCK_SEL_B              0x10
 210 #define DA9210_VBUCK_GPI_SHIFT                  5
 211 #define DA9210_VBUCK_GPI_MASK                   0x60
 212 #define         DA9210_VBUCK_GPI_OFF            0x00
 213 #define         DA9210_VBUCK_GPI_GPIO0          0x20
 214 #define         DA9210_VBUCK_GPI_GPIO3          0x40
 215 #define         DA9210_VBUCK_GPI_GPIO4          0x60
 216 #define DA9210_DVC_CTRL_EN                      0x80
 217
 218 /* DA9210_REG_BUCK_ILIM (addr=0xD0) */
 219 #define DA9210_BUCK_ILIM_SHIFT                  0
 220 #define DA9210_BUCK_ILIM_MASK                   0x0F
 221 #define DA9210_BUCK_IALARM                      0x10
 222
 223 /* DA9210_REG_BUCK_CONF1 (addr=0xD1) */
 224 #define DA9210_BUCK_MODE_SHIFT                  0
 225 #define DA9210_BUCK_MODE_MASK                   0x03
 226 #define         DA9210_BUCK_MODE_MANUAL         0x00
 227 #define         DA9210_BUCK_MODE_SLEEP          0x01
 228 #define         DA9210_BUCK_MODE_SYNC           0x02
 229 #define         DA9210_BUCK_MODE_AUTO           0x03
 230 #define DA9210_STARTUP_CTRL_SHIFT               2
 231 #define DA9210_STARTUP_CTRL_MASK                0x1C
 232 #define DA9210_PWR_DOWN_CTRL_SHIFT              5
 233 #define DA9210_PWR_DOWN_CTRL_MASK               0xE0
 234
 235 /* DA9210_REG_BUCK_CONF2 (addr=0xD2) */
 236 #define DA9210_PHASE_SEL_SHIFT                  0
 237 #define DA9210_PHASE_SEL_MASK                   0x03
 238 #define DA9210_FREQ_SEL                         0x40
 239
 240 /* DA9210_REG_BUCK_AUTO (addr=0xD4) */
 241 #define DA9210_VBUCK_AUTO_SHIFT                 0
 242 #define DA9210_VBUCK_AUTO_MASK                  0x7F
 243
 244 /* DA9210_REG_BUCK_BASE (addr=0xD5) */
 245 #define DA9210_VBUCK_BASE_SHIFT                 0
 246 #define DA9210_VBUCK_BASE_MASK                  0x7F
 247
 248 /* DA9210_REG_VBUCK_MAX_DVC_IF (addr=0xD6) */
 249 #define DA9210_VBUCK_MAX_SHIFT                  0
 250 #define DA9210_VBUCK_MAX_MASK                   0x7F
 251 #define DA9210_DVC_STEP_SIZE                    0x80
 252 #define         DA9210_DVC_STEP_SIZE_10MV       0x00
 253 #define         DA9210_DVC_STEP_SIZE_20MV       0x80
 254
 255 /* DA9210_REG_VBUCK_DVC (addr=0xD7) */
 256 #define DA9210_VBUCK_DVC_SHIFT                  0
 257 #define DA9210_VBUCK_DVC_MASK                   0x7F
 258
 259 /* DA9210_REG_VBUCK_A/B (addr=0xD8/0xD9) */
 260 #define DA9210_VBUCK_SHIFT                      0
 261 #define DA9210_VBUCK_MASK                       0x7F
 262 #define DA9210_VBUCK_BIAS                       0
 263 #define DA9210_BUCK_SL                          0x80
 264
 265 /* DA9210_REG_INTERFACE (addr=0x105) */
 266 #define DA9210_IF_BASE_ADDR_SHIFT               4
 267 #define DA9210_IF_BASE_ADDR_MASK                0xF0
 268
 269 /* DA9210_REG_CONFIG_E (addr=0x147) */
 270 #define DA9210_STAND_ALONE                      0x01
 271
 272 #endif  /* __DA9210_REGISTERS_H__ */
 273