1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
10 #include <asm/arch-rockchip/clock.h>
11 #include <asm/arch-rockchip/grf_rk3128.h>
12 #include <asm/arch-rockchip/sdram.h>
16 struct rk3128_grf *grf;
19 static int rk3128_dmc_probe(struct udevice *dev)
21 struct dram_info *priv = dev_get_priv(dev);
23 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
24 debug("%s: grf=%p\n", __func__, priv->grf);
25 priv->info.base = CONFIG_SYS_SDRAM_BASE;
26 priv->info.size = rockchip_sdram_size(
27 (phys_addr_t)&priv->grf->os_reg[1]);
32 static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
34 struct dram_info *priv = dev_get_priv(dev);
41 static struct ram_ops rk3128_dmc_ops = {
42 .get_info = rk3128_dmc_get_info,
45 static const struct udevice_id rk3128_dmc_ids[] = {
46 { .compatible = "rockchip,rk3128-dmc" },
50 U_BOOT_DRIVER(dmc_rk3128) = {
51 .name = "rockchip_rk3128_dmc",
53 .of_match = rk3128_dmc_ids,
54 .ops = &rk3128_dmc_ops,
55 .probe = rk3128_dmc_probe,
56 .priv_auto_alloc_size = sizeof(struct dram_info),