1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
11 #include <asm/arch-rockchip/clock.h>
12 #include <asm/arch-rockchip/grf_rk3128.h>
13 #include <asm/arch-rockchip/sdram.h>
17 struct rk3128_grf *grf;
20 static int rk3128_dmc_probe(struct udevice *dev)
22 struct dram_info *priv = dev_get_priv(dev);
24 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
25 debug("%s: grf=%p\n", __func__, priv->grf);
26 priv->info.base = CONFIG_SYS_SDRAM_BASE;
27 priv->info.size = rockchip_sdram_size(
28 (phys_addr_t)&priv->grf->os_reg[1]);
33 static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
35 struct dram_info *priv = dev_get_priv(dev);
42 static struct ram_ops rk3128_dmc_ops = {
43 .get_info = rk3128_dmc_get_info,
46 static const struct udevice_id rk3128_dmc_ids[] = {
47 { .compatible = "rockchip,rk3128-dmc" },
51 U_BOOT_DRIVER(dmc_rk3128) = {
52 .name = "rockchip_rk3128_dmc",
54 .of_match = rk3128_dmc_ids,
55 .ops = &rk3128_dmc_ops,
56 .probe = rk3128_dmc_probe,
57 .priv_auto_alloc_size = sizeof(struct dram_info),