Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / drivers / qe / fdt.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2008 Freescale Semiconductor, Inc.
4  *
5  * (C) Copyright 2000
6  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7  */
8
9 #include <common.h>
10 #include <asm/global_data.h>
11 #include <linux/libfdt.h>
12 #include <fdt_support.h>
13 #include <fsl_qe.h>
14
15 #ifdef CONFIG_QE
16 DECLARE_GLOBAL_DATA_PTR;
17
18 /*
19  * If a QE firmware has been uploaded, then add the 'firmware' node under
20  * the 'qe' node.
21  */
22 void fdt_fixup_qe_firmware(void *blob)
23 {
24         struct qe_firmware_info *qe_fw_info;
25         int node, ret;
26
27         qe_fw_info = qe_get_firmware_info();
28         if (!qe_fw_info)
29                 return;
30
31         node = fdt_path_offset(blob, "/qe");
32         if (node < 0)
33                 return;
34
35         /* We assume the node doesn't exist yet */
36         node = fdt_add_subnode(blob, node, "firmware");
37         if (node < 0)
38                 return;
39
40         ret = fdt_setprop(blob, node, "extended-modes",
41                 &qe_fw_info->extended_modes, sizeof(u64));
42         if (ret < 0)
43                 goto error;
44
45         ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id);
46         if (ret < 0)
47                 goto error;
48
49         ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps,
50                 sizeof(qe_fw_info->vtraps));
51         if (ret < 0)
52                 goto error;
53
54         return;
55
56 error:
57         fdt_del_node(blob, node);
58 }
59
60 void ft_qe_setup(void *blob)
61 {
62         do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
63                 "bus-frequency", gd->arch.qe_clk, 1);
64         do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
65                 "brg-frequency", gd->arch.brg_clk, 1);
66         do_fixup_by_compat_u32(blob, "fsl,qe",
67                 "clock-frequency", gd->arch.qe_clk, 1);
68         do_fixup_by_compat_u32(blob, "fsl,qe",
69                 "bus-frequency", gd->arch.qe_clk, 1);
70         do_fixup_by_compat_u32(blob, "fsl,qe",
71                 "brg-frequency", gd->arch.brg_clk, 1);
72         do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
73                 "clock-frequency", gd->arch.qe_clk / 2, 1);
74         fdt_fixup_qe_firmware(blob);
75 }
76 #endif