drivers/pwm/sunxi_pwm.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 2017-2018 Vasily Khoruzhick <anarsoul@gmail.com>
   4  */
   5
   6 #include <common.h>
   7 #include <div64.h>
   8 #include <dm.h>
   9 #include <log.h>
  10 #include <pwm.h>
  11 #include <regmap.h>
  12 #include <syscon.h>
  13 #include <asm/io.h>
  14 #include <asm/arch/pwm.h>
  15 #include <asm/arch/gpio.h>
  16 #include <power/regulator.h>
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 #define OSC_24MHZ 24000000
  21
  22 struct sunxi_pwm_priv {
  23         struct sunxi_pwm *regs;
  24         bool invert;
  25         u32 prescaler;
  26 };
  27
  28 static const u32 prescaler_table[] = {
  29         120,    /* 0000 */
  30         180,    /* 0001 */
  31         240,    /* 0010 */
  32         360,    /* 0011 */
  33         480,    /* 0100 */
  34         0,      /* 0101 */
  35         0,      /* 0110 */
  36         0,      /* 0111 */
  37         12000,  /* 1000 */
  38         24000,  /* 1001 */
  39         36000,  /* 1010 */
  40         48000,  /* 1011 */
  41         72000,  /* 1100 */
  42         0,      /* 1101 */
  43         0,      /* 1110 */
  44         1,      /* 1111 */
  45 };
  46
  47 static int sunxi_pwm_config_pinmux(void)
  48 {
  49 #ifdef CONFIG_MACH_SUN50I
  50         sunxi_gpio_set_cfgpin(SUNXI_GPD(22), SUNXI_GPD_PWM);
  51 #endif
  52         return 0;
  53 }
  54
  55 static int sunxi_pwm_set_invert(struct udevice *dev, uint channel,
  56                                 bool polarity)
  57 {
  58         struct sunxi_pwm_priv *priv = dev_get_priv(dev);
  59
  60         debug("%s: polarity=%u\n", __func__, polarity);
  61         priv->invert = polarity;
  62
  63         return 0;
  64 }
  65
  66 static int sunxi_pwm_set_config(struct udevice *dev, uint channel,
  67                                 uint period_ns, uint duty_ns)
  68 {
  69         struct sunxi_pwm_priv *priv = dev_get_priv(dev);
  70         struct sunxi_pwm *regs = priv->regs;
  71         int best_prescaler = 0;
  72         u32 v, best_period = 0, duty;
  73         u64 best_scaled_freq = 0;
  74         const u32 nsecs_per_sec = 1000000000U;
  75
  76         debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
  77
  78         for (int prescaler = 0; prescaler <= SUNXI_PWM_CTRL_PRESCALE0_MASK;
  79              prescaler++) {
  80                 u32 period = 0;
  81                 u64 scaled_freq = 0;
  82                 if (!prescaler_table[prescaler])
  83                         continue;
  84                 scaled_freq = lldiv(OSC_24MHZ, prescaler_table[prescaler]);
  85                 period = lldiv(scaled_freq * period_ns, nsecs_per_sec);
  86                 if ((period - 1 <= SUNXI_PWM_CH0_PERIOD_MAX) &&
  87                     best_period < period) {
  88                         best_period = period;
  89                         best_scaled_freq = scaled_freq;
  90                         best_prescaler = prescaler;
  91                 }
  92         }
  93
  94         if (best_period - 1 > SUNXI_PWM_CH0_PERIOD_MAX) {
  95                 debug("%s: failed to find prescaler value\n", __func__);
  96                 return -EINVAL;
  97         }
  98
  99         duty = lldiv(best_scaled_freq * duty_ns, nsecs_per_sec);
 100
 101         if (priv->prescaler != best_prescaler) {
 102                 /* Mask clock to update prescaler */
 103                 v = readl(&regs->ctrl);
 104                 v &= ~SUNXI_PWM_CTRL_CLK_GATE;
 105                 writel(v, &regs->ctrl);
 106                 v &= ~SUNXI_PWM_CTRL_PRESCALE0_MASK;
 107                 v |= (best_prescaler & SUNXI_PWM_CTRL_PRESCALE0_MASK);
 108                 writel(v, &regs->ctrl);
 109                 v |= SUNXI_PWM_CTRL_CLK_GATE;
 110                 writel(v, &regs->ctrl);
 111                 priv->prescaler = best_prescaler;
 112         }
 113
 114         writel(SUNXI_PWM_CH0_PERIOD_PRD(best_period) |
 115                SUNXI_PWM_CH0_PERIOD_DUTY(duty), &regs->ch0_period);
 116
 117         debug("%s: prescaler: %d, period: %d, duty: %d\n",
 118               __func__, priv->prescaler,
 119               best_period, duty);
 120
 121         return 0;
 122 }
 123
 124 static int sunxi_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
 125 {
 126         struct sunxi_pwm_priv *priv = dev_get_priv(dev);
 127         struct sunxi_pwm *regs = priv->regs;
 128         u32 v;
 129
 130         debug("%s: Enable '%s'\n", __func__, dev->name);
 131
 132         v = readl(&regs->ctrl);
 133         if (!enable) {
 134                 v &= ~SUNXI_PWM_CTRL_ENABLE0;
 135                 writel(v, &regs->ctrl);
 136                 return 0;
 137         }
 138
 139         sunxi_pwm_config_pinmux();
 140
 141         if (priv->invert)
 142                 v &= ~SUNXI_PWM_CTRL_CH0_ACT_STA;
 143         else
 144                 v |= SUNXI_PWM_CTRL_CH0_ACT_STA;
 145         v |= SUNXI_PWM_CTRL_ENABLE0;
 146         writel(v, &regs->ctrl);
 147
 148         return 0;
 149 }
 150
 151 static int sunxi_pwm_of_to_plat(struct udevice *dev)
 152 {
 153         struct sunxi_pwm_priv *priv = dev_get_priv(dev);
 154
 155         priv->regs = dev_read_addr_ptr(dev);
 156
 157         return 0;
 158 }
 159
 160 static int sunxi_pwm_probe(struct udevice *dev)
 161 {
 162         return 0;
 163 }
 164
 165 static const struct pwm_ops sunxi_pwm_ops = {
 166         .set_invert     = sunxi_pwm_set_invert,
 167         .set_config     = sunxi_pwm_set_config,
 168         .set_enable     = sunxi_pwm_set_enable,
 169 };
 170
 171 static const struct udevice_id sunxi_pwm_ids[] = {
 172         { .compatible = "allwinner,sun5i-a13-pwm" },
 173         { .compatible = "allwinner,sun50i-a64-pwm" },
 174         { }
 175 };
 176
 177 U_BOOT_DRIVER(sunxi_pwm) = {
 178         .name   = "sunxi_pwm",
 179         .id     = UCLASS_PWM,
 180         .of_match = sunxi_pwm_ids,
 181         .ops    = &sunxi_pwm_ops,
 182         .of_to_plat     = sunxi_pwm_of_to_plat,
 183         .probe          = sunxi_pwm_probe,
 184         .priv_auto      = sizeof(struct sunxi_pwm_priv),
 185 };