2 * Copyright 2012 Alexandre Pereira da Silva <aletes.xgr@gmail.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2.
10 #include <linux/clk.h>
11 #include <linux/err.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/slab.h>
21 struct lpc32xx_pwm_chip {
27 #define PWM_ENABLE (1 << 31)
28 #define PWM_RELOADV(x) (((x) & 0xFF) << 8)
29 #define PWM_DUTY(x) ((x) & 0xFF)
31 #define to_lpc32xx_pwm_chip(_chip) \
32 container_of(_chip, struct lpc32xx_pwm_chip, chip)
34 static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
35 int duty_ns, int period_ns)
37 struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
39 int period_cycles, duty_cycles;
42 c = clk_get_rate(lpc32xx->clk) / 256;
44 do_div(c, NSEC_PER_SEC);
46 /* Handle high and low extremes */
50 c = 0; /* 0 set division by 256 */
53 /* The duty-cycle value is as follows:
55 * DUTY-CYCLE HIGH LEVEL
63 * In other words, the register value is duty-cycle % 256 with
64 * duty-cycle in the range 1-256.
70 duty_cycles = 256 - c;
72 val = readl(lpc32xx->base + (pwm->hwpwm << 2));
74 val |= PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles);
75 writel(val, lpc32xx->base + (pwm->hwpwm << 2));
80 static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
82 struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
86 ret = clk_enable(lpc32xx->clk);
90 val = readl(lpc32xx->base + (pwm->hwpwm << 2));
92 writel(val, lpc32xx->base + (pwm->hwpwm << 2));
97 static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
99 struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
102 val = readl(lpc32xx->base + (pwm->hwpwm << 2));
104 writel(val, lpc32xx->base + (pwm->hwpwm << 2));
106 clk_disable(lpc32xx->clk);
109 static const struct pwm_ops lpc32xx_pwm_ops = {
110 .config = lpc32xx_pwm_config,
111 .enable = lpc32xx_pwm_enable,
112 .disable = lpc32xx_pwm_disable,
113 .owner = THIS_MODULE,
116 static int lpc32xx_pwm_probe(struct platform_device *pdev)
118 struct lpc32xx_pwm_chip *lpc32xx;
119 struct resource *res;
122 lpc32xx = devm_kzalloc(&pdev->dev, sizeof(*lpc32xx), GFP_KERNEL);
126 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
127 lpc32xx->base = devm_ioremap_resource(&pdev->dev, res);
128 if (IS_ERR(lpc32xx->base))
129 return PTR_ERR(lpc32xx->base);
131 lpc32xx->clk = devm_clk_get(&pdev->dev, NULL);
132 if (IS_ERR(lpc32xx->clk))
133 return PTR_ERR(lpc32xx->clk);
135 lpc32xx->chip.dev = &pdev->dev;
136 lpc32xx->chip.ops = &lpc32xx_pwm_ops;
137 lpc32xx->chip.npwm = 2;
138 lpc32xx->chip.base = -1;
140 ret = pwmchip_add(&lpc32xx->chip);
142 dev_err(&pdev->dev, "failed to add PWM chip, error %d\n", ret);
146 platform_set_drvdata(pdev, lpc32xx);
151 static int lpc32xx_pwm_remove(struct platform_device *pdev)
153 struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
156 for (i = 0; i < lpc32xx->chip.npwm; i++)
157 pwm_disable(&lpc32xx->chip.pwms[i]);
159 return pwmchip_remove(&lpc32xx->chip);
162 static const struct of_device_id lpc32xx_pwm_dt_ids[] = {
163 { .compatible = "nxp,lpc3220-pwm", },
166 MODULE_DEVICE_TABLE(of, lpc32xx_pwm_dt_ids);
168 static struct platform_driver lpc32xx_pwm_driver = {
170 .name = "lpc32xx-pwm",
171 .owner = THIS_MODULE,
172 .of_match_table = of_match_ptr(lpc32xx_pwm_dt_ids),
174 .probe = lpc32xx_pwm_probe,
175 .remove = lpc32xx_pwm_remove,
177 module_platform_driver(lpc32xx_pwm_driver);
179 MODULE_ALIAS("platform:lpc32xx-pwm");
180 MODULE_AUTHOR("Alexandre Pereira da Silva <aletes.xgr@gmail.com>");
181 MODULE_DESCRIPTION("LPC32XX PWM Driver");
182 MODULE_LICENSE("GPL v2");