drivers/pwm/pwm-atmel-tcb.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) Overkiz SAS 2012
   4  *
   5  * Author: Boris BREZILLON <b.brezillon@overkiz.com>
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/init.h>
  10 #include <linux/clocksource.h>
  11 #include <linux/clockchips.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irq.h>
  14
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/ioport.h>
  18 #include <linux/io.h>
  19 #include <linux/mfd/syscon.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/pwm.h>
  22 #include <linux/of.h>
  23 #include <linux/regmap.h>
  24 #include <linux/slab.h>
  25 #include <soc/at91/atmel_tcb.h>
  26
  27 #define NPWM    2
  28
  29 #define ATMEL_TC_ACMR_MASK      (ATMEL_TC_ACPA | ATMEL_TC_ACPC |        \
  30                                  ATMEL_TC_AEEVT | ATMEL_TC_ASWTRG)
  31
  32 #define ATMEL_TC_BCMR_MASK      (ATMEL_TC_BCPB | ATMEL_TC_BCPC |        \
  33                                  ATMEL_TC_BEEVT | ATMEL_TC_BSWTRG)
  34
  35 struct atmel_tcb_pwm_device {
  36         enum pwm_polarity polarity;     /* PWM polarity */
  37         unsigned div;                   /* PWM clock divider */
  38         unsigned duty;                  /* PWM duty expressed in clk cycles */
  39         unsigned period;                /* PWM period expressed in clk cycles */
  40 };
  41
  42 struct atmel_tcb_channel {
  43         u32 enabled;
  44         u32 cmr;
  45         u32 ra;
  46         u32 rb;
  47         u32 rc;
  48 };
  49
  50 struct atmel_tcb_pwm_chip {
  51         struct pwm_chip chip;
  52         spinlock_t lock;
  53         u8 channel;
  54         u8 width;
  55         struct regmap *regmap;
  56         struct clk *clk;
  57         struct clk *gclk;
  58         struct clk *slow_clk;
  59         struct atmel_tcb_pwm_device *pwms[NPWM];
  60         struct atmel_tcb_channel bkup;
  61 };
  62
  63 static const u8 atmel_tcb_divisors[] = { 2, 8, 32, 128, 0, };
  64
  65 static inline struct atmel_tcb_pwm_chip *to_tcb_chip(struct pwm_chip *chip)
  66 {
  67         return container_of(chip, struct atmel_tcb_pwm_chip, chip);
  68 }
  69
  70 static int atmel_tcb_pwm_set_polarity(struct pwm_chip *chip,
  71                                       struct pwm_device *pwm,
  72                                       enum pwm_polarity polarity)
  73 {
  74         struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
  75         struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
  76
  77         tcbpwm->polarity = polarity;
  78
  79         return 0;
  80 }
  81
  82 static int atmel_tcb_pwm_request(struct pwm_chip *chip,
  83                                  struct pwm_device *pwm)
  84 {
  85         struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
  86         struct atmel_tcb_pwm_device *tcbpwm;
  87         unsigned cmr;
  88         int ret;
  89
  90         tcbpwm = devm_kzalloc(chip->dev, sizeof(*tcbpwm), GFP_KERNEL);
  91         if (!tcbpwm)
  92                 return -ENOMEM;
  93
  94         ret = clk_prepare_enable(tcbpwmc->clk);
  95         if (ret) {
  96                 devm_kfree(chip->dev, tcbpwm);
  97                 return ret;
  98         }
  99
 100         tcbpwm->polarity = PWM_POLARITY_NORMAL;
 101         tcbpwm->duty = 0;
 102         tcbpwm->period = 0;
 103         tcbpwm->div = 0;
 104
 105         spin_lock(&tcbpwmc->lock);
 106         regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
 107         /*
 108          * Get init config from Timer Counter registers if
 109          * Timer Counter is already configured as a PWM generator.
 110          */
 111         if (cmr & ATMEL_TC_WAVE) {
 112                 if (pwm->hwpwm == 0)
 113                         regmap_read(tcbpwmc->regmap,
 114                                     ATMEL_TC_REG(tcbpwmc->channel, RA),
 115                                     &tcbpwm->duty);
 116                 else
 117                         regmap_read(tcbpwmc->regmap,
 118                                     ATMEL_TC_REG(tcbpwmc->channel, RB),
 119                                     &tcbpwm->duty);
 120
 121                 tcbpwm->div = cmr & ATMEL_TC_TCCLKS;
 122                 regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
 123                             &tcbpwm->period);
 124                 cmr &= (ATMEL_TC_TCCLKS | ATMEL_TC_ACMR_MASK |
 125                         ATMEL_TC_BCMR_MASK);
 126         } else
 127                 cmr = 0;
 128
 129         cmr |= ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO | ATMEL_TC_EEVT_XC0;
 130         regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
 131         spin_unlock(&tcbpwmc->lock);
 132
 133         tcbpwmc->pwms[pwm->hwpwm] = tcbpwm;
 134
 135         return 0;
 136 }
 137
 138 static void atmel_tcb_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
 139 {
 140         struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
 141         struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
 142
 143         clk_disable_unprepare(tcbpwmc->clk);
 144         tcbpwmc->pwms[pwm->hwpwm] = NULL;
 145         devm_kfree(chip->dev, tcbpwm);
 146 }
 147
 148 static void atmel_tcb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 149 {
 150         struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
 151         struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
 152         unsigned cmr;
 153         enum pwm_polarity polarity = tcbpwm->polarity;
 154
 155         /*
 156          * If duty is 0 the timer will be stopped and we have to
 157          * configure the output correctly on software trigger:
 158          *  - set output to high if PWM_POLARITY_INVERSED
 159          *  - set output to low if PWM_POLARITY_NORMAL
 160          *
 161          * This is why we're reverting polarity in this case.
 162          */
 163         if (tcbpwm->duty == 0)
 164                 polarity = !polarity;
 165
 166         spin_lock(&tcbpwmc->lock);
 167         regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
 168
 169         /* flush old setting and set the new one */
 170         if (pwm->hwpwm == 0) {
 171                 cmr &= ~ATMEL_TC_ACMR_MASK;
 172                 if (polarity == PWM_POLARITY_INVERSED)
 173                         cmr |= ATMEL_TC_ASWTRG_CLEAR;
 174                 else
 175                         cmr |= ATMEL_TC_ASWTRG_SET;
 176         } else {
 177                 cmr &= ~ATMEL_TC_BCMR_MASK;
 178                 if (polarity == PWM_POLARITY_INVERSED)
 179                         cmr |= ATMEL_TC_BSWTRG_CLEAR;
 180                 else
 181                         cmr |= ATMEL_TC_BSWTRG_SET;
 182         }
 183
 184         regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
 185
 186         /*
 187          * Use software trigger to apply the new setting.
 188          * If both PWM devices in this group are disabled we stop the clock.
 189          */
 190         if (!(cmr & (ATMEL_TC_ACPC | ATMEL_TC_BCPC))) {
 191                 regmap_write(tcbpwmc->regmap,
 192                              ATMEL_TC_REG(tcbpwmc->channel, CCR),
 193                              ATMEL_TC_SWTRG | ATMEL_TC_CLKDIS);
 194                 tcbpwmc->bkup.enabled = 1;
 195         } else {
 196                 regmap_write(tcbpwmc->regmap,
 197                              ATMEL_TC_REG(tcbpwmc->channel, CCR),
 198                              ATMEL_TC_SWTRG);
 199                 tcbpwmc->bkup.enabled = 0;
 200         }
 201
 202         spin_unlock(&tcbpwmc->lock);
 203 }
 204
 205 static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 206 {
 207         struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
 208         struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
 209         u32 cmr;
 210         enum pwm_polarity polarity = tcbpwm->polarity;
 211
 212         /*
 213          * If duty is 0 the timer will be stopped and we have to
 214          * configure the output correctly on software trigger:
 215          *  - set output to high if PWM_POLARITY_INVERSED
 216          *  - set output to low if PWM_POLARITY_NORMAL
 217          *
 218          * This is why we're reverting polarity in this case.
 219          */
 220         if (tcbpwm->duty == 0)
 221                 polarity = !polarity;
 222
 223         spin_lock(&tcbpwmc->lock);
 224         regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr);
 225
 226         /* flush old setting and set the new one */
 227         cmr &= ~ATMEL_TC_TCCLKS;
 228
 229         if (pwm->hwpwm == 0) {
 230                 cmr &= ~ATMEL_TC_ACMR_MASK;
 231
 232                 /* Set CMR flags according to given polarity */
 233                 if (polarity == PWM_POLARITY_INVERSED)
 234                         cmr |= ATMEL_TC_ASWTRG_CLEAR;
 235                 else
 236                         cmr |= ATMEL_TC_ASWTRG_SET;
 237         } else {
 238                 cmr &= ~ATMEL_TC_BCMR_MASK;
 239                 if (polarity == PWM_POLARITY_INVERSED)
 240                         cmr |= ATMEL_TC_BSWTRG_CLEAR;
 241                 else
 242                         cmr |= ATMEL_TC_BSWTRG_SET;
 243         }
 244
 245         /*
 246          * If duty is 0 or equal to period there's no need to register
 247          * a specific action on RA/RB and RC compare.
 248          * The output will be configured on software trigger and keep
 249          * this config till next config call.
 250          */
 251         if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) {
 252                 if (pwm->hwpwm == 0) {
 253                         if (polarity == PWM_POLARITY_INVERSED)
 254                                 cmr |= ATMEL_TC_ACPA_SET | ATMEL_TC_ACPC_CLEAR;
 255                         else
 256                                 cmr |= ATMEL_TC_ACPA_CLEAR | ATMEL_TC_ACPC_SET;
 257                 } else {
 258                         if (polarity == PWM_POLARITY_INVERSED)
 259                                 cmr |= ATMEL_TC_BCPB_SET | ATMEL_TC_BCPC_CLEAR;
 260                         else
 261                                 cmr |= ATMEL_TC_BCPB_CLEAR | ATMEL_TC_BCPC_SET;
 262                 }
 263         }
 264
 265         cmr |= (tcbpwm->div & ATMEL_TC_TCCLKS);
 266
 267         regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr);
 268
 269         if (pwm->hwpwm == 0)
 270                 regmap_write(tcbpwmc->regmap,
 271                              ATMEL_TC_REG(tcbpwmc->channel, RA),
 272                              tcbpwm->duty);
 273         else
 274                 regmap_write(tcbpwmc->regmap,
 275                              ATMEL_TC_REG(tcbpwmc->channel, RB),
 276                              tcbpwm->duty);
 277
 278         regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, RC),
 279                      tcbpwm->period);
 280
 281         /* Use software trigger to apply the new setting */
 282         regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CCR),
 283                      ATMEL_TC_SWTRG | ATMEL_TC_CLKEN);
 284         tcbpwmc->bkup.enabled = 1;
 285         spin_unlock(&tcbpwmc->lock);
 286         return 0;
 287 }
 288
 289 static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 290                                 int duty_ns, int period_ns)
 291 {
 292         struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip);
 293         struct atmel_tcb_pwm_device *tcbpwm = tcbpwmc->pwms[pwm->hwpwm];
 294         struct atmel_tcb_pwm_device *atcbpwm = NULL;
 295         int i = 0;
 296         int slowclk = 0;
 297         unsigned period;
 298         unsigned duty;
 299         unsigned rate = clk_get_rate(tcbpwmc->clk);
 300         unsigned long long min;
 301         unsigned long long max;
 302
 303         /*
 304          * Find best clk divisor:
 305          * the smallest divisor which can fulfill the period_ns requirements.
 306          * If there is a gclk, the first divisor is actually the gclk selector
 307          */
 308         if (tcbpwmc->gclk)
 309                 i = 1;
 310         for (; i < ARRAY_SIZE(atmel_tcb_divisors); ++i) {
 311                 if (atmel_tcb_divisors[i] == 0) {
 312                         slowclk = i;
 313                         continue;
 314                 }
 315                 min = div_u64((u64)NSEC_PER_SEC * atmel_tcb_divisors[i], rate);
 316                 max = min << tcbpwmc->width;
 317                 if (max >= period_ns)
 318                         break;
 319         }
 320
 321         /*
 322          * If none of the divisor are small enough to represent period_ns
 323          * take slow clock (32KHz).
 324          */
 325         if (i == ARRAY_SIZE(atmel_tcb_divisors)) {
 326                 i = slowclk;
 327                 rate = clk_get_rate(tcbpwmc->slow_clk);
 328                 min = div_u64(NSEC_PER_SEC, rate);
 329                 max = min << tcbpwmc->width;
 330
 331                 /* If period is too big return ERANGE error */
 332                 if (max < period_ns)
 333                         return -ERANGE;
 334         }
 335
 336         duty = div_u64(duty_ns, min);
 337         period = div_u64(period_ns, min);
 338
 339         if (pwm->hwpwm == 0)
 340                 atcbpwm = tcbpwmc->pwms[1];
 341         else
 342                 atcbpwm = tcbpwmc->pwms[0];
 343
 344         /*
 345          * PWM devices provided by the TCB driver are grouped by 2.
 346          * PWM devices in a given group must be configured with the
 347          * same period_ns.
 348          *
 349          * We're checking the period value of the second PWM device
 350          * in this group before applying the new config.
 351          */
 352         if ((atcbpwm && atcbpwm->duty > 0 &&
 353                         atcbpwm->duty != atcbpwm->period) &&
 354                 (atcbpwm->div != i || atcbpwm->period != period)) {
 355                 dev_err(chip->dev,
 356                         "failed to configure period_ns: PWM group already configured with a different value\n");
 357                 return -EINVAL;
 358         }
 359
 360         tcbpwm->period = period;
 361         tcbpwm->div = i;
 362         tcbpwm->duty = duty;
 363
 364         return 0;
 365 }
 366
 367 static int atmel_tcb_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
 368                                const struct pwm_state *state)
 369 {
 370         int duty_cycle, period;
 371         int ret;
 372
 373         /* This function only sets a flag in driver data */
 374         atmel_tcb_pwm_set_polarity(chip, pwm, state->polarity);
 375
 376         if (!state->enabled) {
 377                 atmel_tcb_pwm_disable(chip, pwm);
 378                 return 0;
 379         }
 380
 381         period = state->period < INT_MAX ? state->period : INT_MAX;
 382         duty_cycle = state->duty_cycle < INT_MAX ? state->duty_cycle : INT_MAX;
 383
 384         ret = atmel_tcb_pwm_config(chip, pwm, duty_cycle, period);
 385         if (ret)
 386                 return ret;
 387
 388         return atmel_tcb_pwm_enable(chip, pwm);
 389 }
 390
 391 static const struct pwm_ops atmel_tcb_pwm_ops = {
 392         .request = atmel_tcb_pwm_request,
 393         .free = atmel_tcb_pwm_free,
 394         .apply = atmel_tcb_pwm_apply,
 395         .owner = THIS_MODULE,
 396 };
 397
 398 static struct atmel_tcb_config tcb_rm9200_config = {
 399         .counter_width = 16,
 400 };
 401
 402 static struct atmel_tcb_config tcb_sam9x5_config = {
 403         .counter_width = 32,
 404 };
 405
 406 static struct atmel_tcb_config tcb_sama5d2_config = {
 407         .counter_width = 32,
 408         .has_gclk = 1,
 409 };
 410
 411 static const struct of_device_id atmel_tcb_of_match[] = {
 412         { .compatible = "atmel,at91rm9200-tcb", .data = &tcb_rm9200_config, },
 413         { .compatible = "atmel,at91sam9x5-tcb", .data = &tcb_sam9x5_config, },
 414         { .compatible = "atmel,sama5d2-tcb", .data = &tcb_sama5d2_config, },
 415         { /* sentinel */ }
 416 };
 417
 418 static int atmel_tcb_pwm_probe(struct platform_device *pdev)
 419 {
 420         const struct of_device_id *match;
 421         struct atmel_tcb_pwm_chip *tcbpwm;
 422         const struct atmel_tcb_config *config;
 423         struct device_node *np = pdev->dev.of_node;
 424         struct regmap *regmap;
 425         struct clk *clk, *gclk = NULL;
 426         struct clk *slow_clk;
 427         char clk_name[] = "t0_clk";
 428         int err;
 429         int channel;
 430
 431         err = of_property_read_u32(np, "reg", &channel);
 432         if (err < 0) {
 433                 dev_err(&pdev->dev,
 434                         "failed to get Timer Counter Block channel from device tree (error: %d)\n",
 435                         err);
 436                 return err;
 437         }
 438
 439         regmap = syscon_node_to_regmap(np->parent);
 440         if (IS_ERR(regmap))
 441                 return PTR_ERR(regmap);
 442
 443         slow_clk = of_clk_get_by_name(np->parent, "slow_clk");
 444         if (IS_ERR(slow_clk))
 445                 return PTR_ERR(slow_clk);
 446
 447         clk_name[1] += channel;
 448         clk = of_clk_get_by_name(np->parent, clk_name);
 449         if (IS_ERR(clk))
 450                 clk = of_clk_get_by_name(np->parent, "t0_clk");
 451         if (IS_ERR(clk))
 452                 return PTR_ERR(clk);
 453
 454         match = of_match_node(atmel_tcb_of_match, np->parent);
 455         config = match->data;
 456
 457         if (config->has_gclk) {
 458                 gclk = of_clk_get_by_name(np->parent, "gclk");
 459                 if (IS_ERR(gclk))
 460                         return PTR_ERR(gclk);
 461         }
 462
 463         tcbpwm = devm_kzalloc(&pdev->dev, sizeof(*tcbpwm), GFP_KERNEL);
 464         if (tcbpwm == NULL) {
 465                 err = -ENOMEM;
 466                 goto err_slow_clk;
 467         }
 468
 469         tcbpwm->chip.dev = &pdev->dev;
 470         tcbpwm->chip.ops = &atmel_tcb_pwm_ops;
 471         tcbpwm->chip.npwm = NPWM;
 472         tcbpwm->channel = channel;
 473         tcbpwm->regmap = regmap;
 474         tcbpwm->clk = clk;
 475         tcbpwm->gclk = gclk;
 476         tcbpwm->slow_clk = slow_clk;
 477         tcbpwm->width = config->counter_width;
 478
 479         err = clk_prepare_enable(slow_clk);
 480         if (err)
 481                 goto err_slow_clk;
 482
 483         spin_lock_init(&tcbpwm->lock);
 484
 485         err = pwmchip_add(&tcbpwm->chip);
 486         if (err < 0)
 487                 goto err_disable_clk;
 488
 489         platform_set_drvdata(pdev, tcbpwm);
 490
 491         return 0;
 492
 493 err_disable_clk:
 494         clk_disable_unprepare(tcbpwm->slow_clk);
 495
 496 err_slow_clk:
 497         clk_put(slow_clk);
 498
 499         return err;
 500 }
 501
 502 static void atmel_tcb_pwm_remove(struct platform_device *pdev)
 503 {
 504         struct atmel_tcb_pwm_chip *tcbpwm = platform_get_drvdata(pdev);
 505
 506         pwmchip_remove(&tcbpwm->chip);
 507
 508         clk_disable_unprepare(tcbpwm->slow_clk);
 509         clk_put(tcbpwm->slow_clk);
 510         clk_put(tcbpwm->clk);
 511 }
 512
 513 static const struct of_device_id atmel_tcb_pwm_dt_ids[] = {
 514         { .compatible = "atmel,tcb-pwm", },
 515         { /* sentinel */ }
 516 };
 517 MODULE_DEVICE_TABLE(of, atmel_tcb_pwm_dt_ids);
 518
 519 #ifdef CONFIG_PM_SLEEP
 520 static int atmel_tcb_pwm_suspend(struct device *dev)
 521 {
 522         struct atmel_tcb_pwm_chip *tcbpwm = dev_get_drvdata(dev);
 523         struct atmel_tcb_channel *chan = &tcbpwm->bkup;
 524         unsigned int channel = tcbpwm->channel;
 525
 526         regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, CMR), &chan->cmr);
 527         regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, RA), &chan->ra);
 528         regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, RB), &chan->rb);
 529         regmap_read(tcbpwm->regmap, ATMEL_TC_REG(channel, RC), &chan->rc);
 530
 531         return 0;
 532 }
 533
 534 static int atmel_tcb_pwm_resume(struct device *dev)
 535 {
 536         struct atmel_tcb_pwm_chip *tcbpwm = dev_get_drvdata(dev);
 537         struct atmel_tcb_channel *chan = &tcbpwm->bkup;
 538         unsigned int channel = tcbpwm->channel;
 539
 540         regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, CMR), chan->cmr);
 541         regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, RA), chan->ra);
 542         regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, RB), chan->rb);
 543         regmap_write(tcbpwm->regmap, ATMEL_TC_REG(channel, RC), chan->rc);
 544
 545         if (chan->enabled)
 546                 regmap_write(tcbpwm->regmap,
 547                              ATMEL_TC_CLKEN | ATMEL_TC_SWTRG,
 548                              ATMEL_TC_REG(channel, CCR));
 549
 550         return 0;
 551 }
 552 #endif
 553
 554 static SIMPLE_DEV_PM_OPS(atmel_tcb_pwm_pm_ops, atmel_tcb_pwm_suspend,
 555                          atmel_tcb_pwm_resume);
 556
 557 static struct platform_driver atmel_tcb_pwm_driver = {
 558         .driver = {
 559                 .name = "atmel-tcb-pwm",
 560                 .of_match_table = atmel_tcb_pwm_dt_ids,
 561                 .pm = &atmel_tcb_pwm_pm_ops,
 562         },
 563         .probe = atmel_tcb_pwm_probe,
 564         .remove_new = atmel_tcb_pwm_remove,
 565 };
 566 module_platform_driver(atmel_tcb_pwm_driver);
 567
 568 MODULE_AUTHOR("Boris BREZILLON <b.brezillon@overkiz.com>");
 569 MODULE_DESCRIPTION("Atmel Timer Counter Pulse Width Modulation Driver");
 570 MODULE_LICENSE("GPL v2");