drivers/pvr/services4/srvkm/hwdefs/sgxmmu.h

   1 /**********************************************************************
   2  Copyright (c) Imagination Technologies Ltd.
   3
   4  Permission is hereby granted, free of charge, to any person obtaining a copy
   5  of this software and associated documentation files (the "Software"), to deal
   6  in the Software without restriction, including without limitation the rights
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   8  copies of the Software, and to permit persons to whom the Software is
   9  furnished to do so, subject to the following conditions:
  10
  11  The above copyright notice and this permission notice shall be included in
  12  all copies or substantial portions of the Software.
  13
  14  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  17  AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  19  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  20  THE SOFTWARE.
  21  ******************************************************************************/
  22
  23 #if !defined(__SGXMMU_KM_H__)
  24 #define __SGXMMU_KM_H__
  25
  26 #define SGX_MMU_PAGE_SHIFT                              (12)
  27 #define SGX_MMU_PAGE_SIZE                               (1UL<<SGX_MMU_PAGE_SHIFT)
  28 #define SGX_MMU_PAGE_MASK                               (SGX_MMU_PAGE_SIZE - 1UL)
  29
  30 #define SGX_MMU_PD_SHIFT                                (10)
  31 #define SGX_MMU_PD_SIZE                                 (1UL<<SGX_MMU_PD_SHIFT)
  32 #define SGX_MMU_PD_MASK                                 (0xFFC00000UL)
  33
  34 #if defined(SGX_FEATURE_36BIT_MMU)
  35         #define SGX_MMU_PDE_ADDR_MASK                   (0xFFFFFF00UL)
  36         #define SGX_MMU_PDE_ADDR_ALIGNSHIFT             (4)
  37 #else
  38         #define SGX_MMU_PDE_ADDR_MASK                   (0xFFFFF000UL)
  39         #define SGX_MMU_PDE_ADDR_ALIGNSHIFT             (0)
  40 #endif
  41 #define SGX_MMU_PDE_VALID                               (0x00000001UL)
  42 #define SGX_MMU_PDE_PAGE_SIZE_4K                (0x00000000UL)
  43 #if defined(SGX_FEATURE_VARIABLE_MMU_PAGE_SIZE)
  44         #define SGX_MMU_PDE_PAGE_SIZE_16K               (0x00000002UL)
  45         #define SGX_MMU_PDE_PAGE_SIZE_64K               (0x00000004UL)
  46         #define SGX_MMU_PDE_PAGE_SIZE_256K              (0x00000006UL)
  47         #define SGX_MMU_PDE_PAGE_SIZE_1M                (0x00000008UL)
  48         #define SGX_MMU_PDE_PAGE_SIZE_4M                (0x0000000AUL)
  49         #define SGX_MMU_PDE_PAGE_SIZE_MASK              (0x0000000EUL)
  50 #else
  51         #define SGX_MMU_PDE_WRITEONLY                   (0x00000002UL)
  52         #define SGX_MMU_PDE_READONLY                    (0x00000004UL)
  53         #define SGX_MMU_PDE_CACHECONSISTENT             (0x00000008UL)
  54         #define SGX_MMU_PDE_EDMPROTECT                  (0x00000010UL)
  55 #endif
  56
  57 #define SGX_MMU_PT_SHIFT                                (10)
  58 #define SGX_MMU_PT_SIZE                                 (1UL<<SGX_MMU_PT_SHIFT)
  59 #define SGX_MMU_PT_MASK                                 (0x003FF000UL)
  60
  61 #if defined(SGX_FEATURE_36BIT_MMU)
  62         #define SGX_MMU_PTE_ADDR_MASK                   (0xFFFFFF00UL)
  63         #define SGX_MMU_PTE_ADDR_ALIGNSHIFT             (4)
  64 #else
  65         #define SGX_MMU_PTE_ADDR_MASK                   (0xFFFFF000UL)
  66         #define SGX_MMU_PTE_ADDR_ALIGNSHIFT             (0)
  67 #endif
  68 #define SGX_MMU_PTE_VALID                               (0x00000001UL)
  69 #define SGX_MMU_PTE_WRITEONLY                   (0x00000002UL)
  70 #define SGX_MMU_PTE_READONLY                    (0x00000004UL)
  71 #define SGX_MMU_PTE_CACHECONSISTENT             (0x00000008UL)
  72 #define SGX_MMU_PTE_EDMPROTECT                  (0x00000010UL)
  73
  74 #endif
  75