1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock for Freescale QorIQ 1588 timer
5 * Copyright (C) 2010 OMICRON electronics GmbH
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10 #include <linux/device.h>
11 #include <linux/hrtimer.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/timex.h>
17 #include <linux/slab.h>
18 #include <linux/clk.h>
20 #include <linux/fsl/ptp_qoriq.h>
23 * Register access functions
26 /* Caller must hold ptp_qoriq->lock. */
27 static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq)
29 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
33 lo = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_l);
34 hi = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_h);
35 ns = ((u64) hi) << 32;
40 /* Caller must hold ptp_qoriq->lock. */
41 static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns)
43 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
45 u32 lo = ns & 0xffffffff;
47 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_l, lo);
48 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_h, hi);
51 /* Caller must hold ptp_qoriq->lock. */
52 static void set_alarm(struct ptp_qoriq *ptp_qoriq)
54 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
58 ns = tmr_cnt_read(ptp_qoriq) + 1500000000ULL;
59 ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
60 ns -= ptp_qoriq->tclk_period;
63 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_l, lo);
64 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_h, hi);
67 /* Caller must hold ptp_qoriq->lock. */
68 static void set_fipers(struct ptp_qoriq *ptp_qoriq)
70 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
73 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
74 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
76 if (ptp_qoriq->fiper3_support)
77 ptp_qoriq->write(®s->fiper_regs->tmr_fiper3,
78 ptp_qoriq->tmr_fiper3);
81 int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index, bool update_event)
83 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
84 struct ptp_clock_event event;
85 void __iomem *reg_etts_l;
86 void __iomem *reg_etts_h;
92 reg_etts_l = ®s->etts_regs->tmr_etts1_l;
93 reg_etts_h = ®s->etts_regs->tmr_etts1_h;
97 reg_etts_l = ®s->etts_regs->tmr_etts2_l;
98 reg_etts_h = ®s->etts_regs->tmr_etts2_h;
104 event.type = PTP_CLOCK_EXTTS;
107 if (ptp_qoriq->extts_fifo_support)
108 if (!(ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid))
112 lo = ptp_qoriq->read(reg_etts_l);
113 hi = ptp_qoriq->read(reg_etts_h);
116 event.timestamp = ((u64) hi) << 32;
117 event.timestamp |= lo;
118 ptp_clock_event(ptp_qoriq->clock, &event);
121 if (!ptp_qoriq->extts_fifo_support)
123 } while (ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid);
127 EXPORT_SYMBOL_GPL(extts_clean_up);
130 * Interrupt service routine
133 irqreturn_t ptp_qoriq_isr(int irq, void *priv)
135 struct ptp_qoriq *ptp_qoriq = priv;
136 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
137 struct ptp_clock_event event;
138 u32 ack = 0, mask, val, irqs;
140 spin_lock(&ptp_qoriq->lock);
142 val = ptp_qoriq->read(®s->ctrl_regs->tmr_tevent);
143 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
145 spin_unlock(&ptp_qoriq->lock);
151 extts_clean_up(ptp_qoriq, 0, true);
156 extts_clean_up(ptp_qoriq, 1, true);
161 event.type = PTP_CLOCK_PPS;
162 ptp_clock_event(ptp_qoriq->clock, &event);
166 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, ack);
171 EXPORT_SYMBOL_GPL(ptp_qoriq_isr);
174 * PTP clock operations
177 int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
182 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
183 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
185 if (scaled_ppm < 0) {
187 scaled_ppm = -scaled_ppm;
189 tmr_add = ptp_qoriq->tmr_add;
193 * Calculate diff and round() to the nearest integer
195 * diff = adj * (ppb / 1000000000)
196 * = adj * scaled_ppm / 65536000000
198 diff = mul_u64_u64_div_u64(adj, scaled_ppm, 32768000000);
199 diff = DIV64_U64_ROUND_UP(diff, 2);
201 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
202 ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
206 EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine);
208 int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
212 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
214 spin_lock_irqsave(&ptp_qoriq->lock, flags);
216 now = tmr_cnt_read(ptp_qoriq);
218 tmr_cnt_write(ptp_qoriq, now);
219 set_fipers(ptp_qoriq);
221 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
225 EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime);
227 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
231 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
233 spin_lock_irqsave(&ptp_qoriq->lock, flags);
235 ns = tmr_cnt_read(ptp_qoriq);
237 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
239 *ts = ns_to_timespec64(ns);
243 EXPORT_SYMBOL_GPL(ptp_qoriq_gettime);
245 int ptp_qoriq_settime(struct ptp_clock_info *ptp,
246 const struct timespec64 *ts)
250 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
252 ns = timespec64_to_ns(ts);
254 spin_lock_irqsave(&ptp_qoriq->lock, flags);
256 tmr_cnt_write(ptp_qoriq, ns);
257 set_fipers(ptp_qoriq);
259 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
263 EXPORT_SYMBOL_GPL(ptp_qoriq_settime);
265 int ptp_qoriq_enable(struct ptp_clock_info *ptp,
266 struct ptp_clock_request *rq, int on)
268 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
269 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
274 case PTP_CLK_REQ_EXTTS:
275 switch (rq->extts.index) {
287 extts_clean_up(ptp_qoriq, rq->extts.index, false);
290 case PTP_CLK_REQ_PPS:
297 spin_lock_irqsave(&ptp_qoriq->lock, flags);
299 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
302 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, bit);
307 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
309 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
312 EXPORT_SYMBOL_GPL(ptp_qoriq_enable);
314 static const struct ptp_clock_info ptp_qoriq_caps = {
315 .owner = THIS_MODULE,
316 .name = "qoriq ptp clock",
319 .n_ext_ts = N_EXT_TS,
323 .adjfine = ptp_qoriq_adjfine,
324 .adjtime = ptp_qoriq_adjtime,
325 .gettime64 = ptp_qoriq_gettime,
326 .settime64 = ptp_qoriq_settime,
327 .enable = ptp_qoriq_enable,
331 * ptp_qoriq_nominal_freq - calculate nominal frequency according to
332 * reference clock frequency
334 * @clk_src: reference clock frequency
336 * The nominal frequency is the desired clock frequency.
337 * It should be less than the reference clock frequency.
338 * It should be a factor of 1000MHz.
340 * Return the nominal frequency
342 static u32 ptp_qoriq_nominal_freq(u32 clk_src)
347 remainder = clk_src % 100;
349 clk_src -= remainder;
356 } while (1000 % clk_src);
358 return clk_src * 1000000;
362 * ptp_qoriq_auto_config - calculate a set of default configurations
364 * @ptp_qoriq: pointer to ptp_qoriq
365 * @node: pointer to device_node
367 * If below dts properties are not provided, this function will be
368 * called to calculate a set of default configurations for them.
374 * "fsl,tmr-fiper3" (required only for DPAA2 and ENETC hardware)
377 * Return 0 if success
379 static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq,
380 struct device_node *node)
389 ptp_qoriq->cksel = DEFAULT_CKSEL;
391 clk = of_clk_get(node, 0);
393 clk_src = clk_get_rate(clk);
397 if (clk_src <= 100000000UL) {
398 pr_err("error reference clock value, or lower than 100MHz\n");
402 nominal_freq = ptp_qoriq_nominal_freq(clk_src);
406 ptp_qoriq->tclk_period = 1000000000UL / nominal_freq;
407 ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC;
409 /* Calculate initial frequency compensation value for TMR_ADD register.
410 * freq_comp = ceil(2^32 / freq_ratio)
411 * freq_ratio = reference_clock_freq / nominal_freq
413 freq_comp = ((u64)1 << 32) * nominal_freq;
414 freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
418 ptp_qoriq->tmr_add = freq_comp;
419 ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period;
420 ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period;
421 ptp_qoriq->tmr_fiper3 = DEFAULT_FIPER3_PERIOD - ptp_qoriq->tclk_period;
423 /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
424 * freq_ratio = reference_clock_freq / nominal_freq
426 max_adj = 1000000000ULL * (clk_src - nominal_freq);
427 max_adj = div_u64(max_adj, nominal_freq) - 1;
428 ptp_qoriq->caps.max_adj = max_adj;
433 int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
434 const struct ptp_clock_info *caps)
436 struct device_node *node = ptp_qoriq->dev->of_node;
437 struct ptp_qoriq_registers *regs;
438 struct timespec64 now;
445 ptp_qoriq->base = base;
446 ptp_qoriq->caps = *caps;
448 if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel))
449 ptp_qoriq->cksel = DEFAULT_CKSEL;
451 if (of_property_read_bool(node, "fsl,extts-fifo"))
452 ptp_qoriq->extts_fifo_support = true;
454 ptp_qoriq->extts_fifo_support = false;
456 if (of_device_is_compatible(node, "fsl,dpaa2-ptp") ||
457 of_device_is_compatible(node, "fsl,enetc-ptp"))
458 ptp_qoriq->fiper3_support = true;
460 if (of_property_read_u32(node,
461 "fsl,tclk-period", &ptp_qoriq->tclk_period) ||
462 of_property_read_u32(node,
463 "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) ||
464 of_property_read_u32(node,
465 "fsl,tmr-add", &ptp_qoriq->tmr_add) ||
466 of_property_read_u32(node,
467 "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) ||
468 of_property_read_u32(node,
469 "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) ||
470 of_property_read_u32(node,
471 "fsl,max-adj", &ptp_qoriq->caps.max_adj) ||
472 (ptp_qoriq->fiper3_support &&
473 of_property_read_u32(node, "fsl,tmr-fiper3",
474 &ptp_qoriq->tmr_fiper3))) {
475 pr_warn("device tree node missing required elements, try automatic configuration\n");
477 if (ptp_qoriq_auto_config(ptp_qoriq, node))
481 if (of_property_read_bool(node, "little-endian")) {
482 ptp_qoriq->read = qoriq_read_le;
483 ptp_qoriq->write = qoriq_write_le;
485 ptp_qoriq->read = qoriq_read_be;
486 ptp_qoriq->write = qoriq_write_be;
489 /* The eTSEC uses differnt memory map with DPAA/ENETC */
490 if (of_device_is_compatible(node, "fsl,etsec-ptp")) {
491 ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET;
492 ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET;
493 ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET;
494 ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET;
496 ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
497 ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET;
498 ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET;
499 ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET;
502 spin_lock_init(&ptp_qoriq->lock);
504 ktime_get_real_ts64(&now);
505 ptp_qoriq_settime(&ptp_qoriq->caps, &now);
508 (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
509 (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT;
511 spin_lock_irqsave(&ptp_qoriq->lock, flags);
513 regs = &ptp_qoriq->regs;
514 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
515 ptp_qoriq->write(®s->ctrl_regs->tmr_add, ptp_qoriq->tmr_add);
516 ptp_qoriq->write(®s->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc);
517 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
518 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
520 if (ptp_qoriq->fiper3_support)
521 ptp_qoriq->write(®s->fiper_regs->tmr_fiper3,
522 ptp_qoriq->tmr_fiper3);
524 set_alarm(ptp_qoriq);
525 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl,
526 tmr_ctrl|FIPERST|RTPE|TE|FRD);
528 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
530 ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);
531 if (IS_ERR(ptp_qoriq->clock))
532 return PTR_ERR(ptp_qoriq->clock);
534 ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);
535 ptp_qoriq_create_debugfs(ptp_qoriq);
538 EXPORT_SYMBOL_GPL(ptp_qoriq_init);
540 void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq)
542 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
544 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, 0);
545 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 0);
547 ptp_qoriq_remove_debugfs(ptp_qoriq);
548 ptp_clock_unregister(ptp_qoriq->clock);
549 iounmap(ptp_qoriq->base);
550 free_irq(ptp_qoriq->irq, ptp_qoriq);
552 EXPORT_SYMBOL_GPL(ptp_qoriq_free);
554 static int ptp_qoriq_probe(struct platform_device *dev)
556 struct ptp_qoriq *ptp_qoriq;
560 ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL);
564 ptp_qoriq->dev = &dev->dev;
568 ptp_qoriq->irq = platform_get_irq(dev, 0);
569 if (ptp_qoriq->irq < 0) {
570 pr_err("irq not in device tree\n");
573 if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED,
574 DRIVER, ptp_qoriq)) {
575 pr_err("request_irq failed\n");
579 ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
580 if (!ptp_qoriq->rsrc) {
581 pr_err("no resource\n");
584 if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) {
585 pr_err("resource busy\n");
589 base = ioremap(ptp_qoriq->rsrc->start,
590 resource_size(ptp_qoriq->rsrc));
592 pr_err("ioremap ptp registers failed\n");
596 err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps);
600 platform_set_drvdata(dev, ptp_qoriq);
604 iounmap(ptp_qoriq->base);
606 release_resource(ptp_qoriq->rsrc);
608 free_irq(ptp_qoriq->irq, ptp_qoriq);
615 static int ptp_qoriq_remove(struct platform_device *dev)
617 struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev);
619 ptp_qoriq_free(ptp_qoriq);
620 release_resource(ptp_qoriq->rsrc);
625 static const struct of_device_id match_table[] = {
626 { .compatible = "fsl,etsec-ptp" },
627 { .compatible = "fsl,fman-ptp-timer" },
630 MODULE_DEVICE_TABLE(of, match_table);
632 static struct platform_driver ptp_qoriq_driver = {
635 .of_match_table = match_table,
637 .probe = ptp_qoriq_probe,
638 .remove = ptp_qoriq_remove,
641 module_platform_driver(ptp_qoriq_driver);
643 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
644 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
645 MODULE_LICENSE("GPL");