1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 * Author: Christophe Kerello <christophe.kerello@st.com>
10 #include <power/pmic.h>
11 #include <power/regulator.h>
12 #include <power/stpmic1.h>
14 struct stpmic1_range {
21 struct stpmic1_output {
22 const struct stpmic1_range *ranges;
26 #define STPMIC1_MODE(_id, _val, _name) { \
28 .register_value = _val, \
32 #define STPMIC1_RANGE(_min_uv, _min_sel, _max_sel, _step) { \
34 .min_sel = _min_sel, \
35 .max_sel = _max_sel, \
39 #define STPMIC1_OUTPUT(_ranges, _nbranges) { \
41 .nbranges = _nbranges, \
44 static int stpmic1_output_find_uv(int sel,
45 const struct stpmic1_output *output)
47 const struct stpmic1_range *range;
50 for (i = 0, range = output->ranges;
51 i < output->nbranges; i++, range++) {
52 if (sel >= range->min_sel && sel <= range->max_sel)
53 return range->min_uv +
54 (sel - range->min_sel) * range->step;
60 static int stpmic1_output_find_sel(int uv,
61 const struct stpmic1_output *output)
63 const struct stpmic1_range *range;
66 for (i = 0, range = output->ranges;
67 i < output->nbranges; i++, range++) {
68 if (uv == range->min_uv && !range->step)
69 return range->min_sel;
71 if (uv >= range->min_uv &&
73 (range->max_sel - range->min_sel) * range->step)
74 return range->min_sel +
75 (uv - range->min_uv) / range->step;
85 static const struct stpmic1_range buck1_ranges[] = {
86 STPMIC1_RANGE(725000, 0, 4, 0),
87 STPMIC1_RANGE(725000, 5, 36, 25000),
88 STPMIC1_RANGE(1500000, 37, 63, 0),
91 static const struct stpmic1_range buck2_ranges[] = {
92 STPMIC1_RANGE(1000000, 0, 17, 0),
93 STPMIC1_RANGE(1050000, 18, 19, 0),
94 STPMIC1_RANGE(1100000, 20, 21, 0),
95 STPMIC1_RANGE(1150000, 22, 23, 0),
96 STPMIC1_RANGE(1200000, 24, 25, 0),
97 STPMIC1_RANGE(1250000, 26, 27, 0),
98 STPMIC1_RANGE(1300000, 28, 29, 0),
99 STPMIC1_RANGE(1350000, 30, 31, 0),
100 STPMIC1_RANGE(1400000, 32, 33, 0),
101 STPMIC1_RANGE(1450000, 34, 35, 0),
102 STPMIC1_RANGE(1500000, 36, 63, 0),
105 static const struct stpmic1_range buck3_ranges[] = {
106 STPMIC1_RANGE(1000000, 0, 19, 0),
107 STPMIC1_RANGE(1100000, 20, 23, 0),
108 STPMIC1_RANGE(1200000, 24, 27, 0),
109 STPMIC1_RANGE(1300000, 28, 31, 0),
110 STPMIC1_RANGE(1400000, 32, 35, 0),
111 STPMIC1_RANGE(1500000, 36, 55, 100000),
112 STPMIC1_RANGE(3400000, 56, 63, 0),
115 static const struct stpmic1_range buck4_ranges[] = {
116 STPMIC1_RANGE(600000, 0, 27, 25000),
117 STPMIC1_RANGE(1300000, 28, 29, 0),
118 STPMIC1_RANGE(1350000, 30, 31, 0),
119 STPMIC1_RANGE(1400000, 32, 33, 0),
120 STPMIC1_RANGE(1450000, 34, 35, 0),
121 STPMIC1_RANGE(1500000, 36, 60, 100000),
122 STPMIC1_RANGE(3900000, 61, 63, 0),
125 /* BUCK: 1,2,3,4 - voltage ranges */
126 static const struct stpmic1_output buck_voltage_range[] = {
127 STPMIC1_OUTPUT(buck1_ranges, ARRAY_SIZE(buck1_ranges)),
128 STPMIC1_OUTPUT(buck2_ranges, ARRAY_SIZE(buck2_ranges)),
129 STPMIC1_OUTPUT(buck3_ranges, ARRAY_SIZE(buck3_ranges)),
130 STPMIC1_OUTPUT(buck4_ranges, ARRAY_SIZE(buck4_ranges)),
134 static const struct dm_regulator_mode buck_modes[] = {
135 STPMIC1_MODE(STPMIC1_PREG_MODE_HP, STPMIC1_PREG_MODE_HP, "HP"),
136 STPMIC1_MODE(STPMIC1_PREG_MODE_LP, STPMIC1_PREG_MODE_LP, "LP"),
139 static int stpmic1_buck_get_uv(struct udevice *dev, int buck)
143 sel = pmic_reg_read(dev, STPMIC1_BUCKX_MAIN_CR(buck));
147 sel &= STPMIC1_BUCK_VOUT_MASK;
148 sel >>= STPMIC1_BUCK_VOUT_SHIFT;
150 return stpmic1_output_find_uv(sel, &buck_voltage_range[buck]);
153 static int stpmic1_buck_get_value(struct udevice *dev)
155 return stpmic1_buck_get_uv(dev->parent, dev->driver_data - 1);
158 static int stpmic1_buck_set_value(struct udevice *dev, int uv)
160 int sel, buck = dev->driver_data - 1;
162 sel = stpmic1_output_find_sel(uv, &buck_voltage_range[buck]);
166 return pmic_clrsetbits(dev->parent,
167 STPMIC1_BUCKX_MAIN_CR(buck),
168 STPMIC1_BUCK_VOUT_MASK,
169 sel << STPMIC1_BUCK_VOUT_SHIFT);
172 static int stpmic1_buck_get_enable(struct udevice *dev)
176 ret = pmic_reg_read(dev->parent,
177 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1));
181 return ret & STPMIC1_BUCK_ENA ? true : false;
184 static int stpmic1_buck_set_enable(struct udevice *dev, bool enable)
186 struct dm_regulator_uclass_platdata *uc_pdata;
187 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
188 STPMIC1_DEFAULT_STOP_DELAY_MS;
191 /* if regulator is already in the wanted state, nothing to do */
192 if (stpmic1_buck_get_enable(dev) == enable)
196 uc_pdata = dev_get_uclass_platdata(dev);
197 uv = stpmic1_buck_get_value(dev);
198 if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV)
199 stpmic1_buck_set_value(dev, uc_pdata->min_uV);
202 ret = pmic_clrsetbits(dev->parent,
203 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1),
204 STPMIC1_BUCK_ENA, enable ? STPMIC1_BUCK_ENA : 0);
210 static int stpmic1_buck_get_mode(struct udevice *dev)
214 ret = pmic_reg_read(dev->parent,
215 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1));
219 return ret & STPMIC1_BUCK_PREG_MODE ? STPMIC1_PREG_MODE_LP :
220 STPMIC1_PREG_MODE_HP;
223 static int stpmic1_buck_set_mode(struct udevice *dev, int mode)
225 return pmic_clrsetbits(dev->parent,
226 STPMIC1_BUCKX_MAIN_CR(dev->driver_data - 1),
227 STPMIC1_BUCK_PREG_MODE,
228 mode ? STPMIC1_BUCK_PREG_MODE : 0);
231 static int stpmic1_buck_probe(struct udevice *dev)
233 struct dm_regulator_uclass_platdata *uc_pdata;
235 if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_BUCK)
238 uc_pdata = dev_get_uclass_platdata(dev);
240 uc_pdata->type = REGULATOR_TYPE_BUCK;
241 uc_pdata->mode = (struct dm_regulator_mode *)buck_modes;
242 uc_pdata->mode_count = ARRAY_SIZE(buck_modes);
247 static const struct dm_regulator_ops stpmic1_buck_ops = {
248 .get_value = stpmic1_buck_get_value,
249 .set_value = stpmic1_buck_set_value,
250 .get_enable = stpmic1_buck_get_enable,
251 .set_enable = stpmic1_buck_set_enable,
252 .get_mode = stpmic1_buck_get_mode,
253 .set_mode = stpmic1_buck_set_mode,
256 U_BOOT_DRIVER(stpmic1_buck) = {
257 .name = "stpmic1_buck",
258 .id = UCLASS_REGULATOR,
259 .ops = &stpmic1_buck_ops,
260 .probe = stpmic1_buck_probe,
267 static const struct stpmic1_range ldo12_ranges[] = {
268 STPMIC1_RANGE(1700000, 0, 7, 0),
269 STPMIC1_RANGE(1700000, 8, 24, 100000),
270 STPMIC1_RANGE(3300000, 25, 31, 0),
273 static const struct stpmic1_range ldo3_ranges[] = {
274 STPMIC1_RANGE(1700000, 0, 7, 0),
275 STPMIC1_RANGE(1700000, 8, 24, 100000),
276 STPMIC1_RANGE(3300000, 25, 30, 0),
277 /* Sel 31 is special case when LDO3 is in mode sync_source (BUCK2/2) */
280 static const struct stpmic1_range ldo5_ranges[] = {
281 STPMIC1_RANGE(1700000, 0, 7, 0),
282 STPMIC1_RANGE(1700000, 8, 30, 100000),
283 STPMIC1_RANGE(3900000, 31, 31, 0),
286 static const struct stpmic1_range ldo6_ranges[] = {
287 STPMIC1_RANGE(900000, 0, 24, 100000),
288 STPMIC1_RANGE(3300000, 25, 31, 0),
291 /* LDO: 1,2,3,4,5,6 - voltage ranges */
292 static const struct stpmic1_output ldo_voltage_range[] = {
293 STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)),
294 STPMIC1_OUTPUT(ldo12_ranges, ARRAY_SIZE(ldo12_ranges)),
295 STPMIC1_OUTPUT(ldo3_ranges, ARRAY_SIZE(ldo3_ranges)),
296 STPMIC1_OUTPUT(NULL, 0),
297 STPMIC1_OUTPUT(ldo5_ranges, ARRAY_SIZE(ldo5_ranges)),
298 STPMIC1_OUTPUT(ldo6_ranges, ARRAY_SIZE(ldo6_ranges)),
302 static const struct dm_regulator_mode ldo_modes[] = {
303 STPMIC1_MODE(STPMIC1_LDO_MODE_NORMAL,
304 STPMIC1_LDO_MODE_NORMAL, "NORMAL"),
305 STPMIC1_MODE(STPMIC1_LDO_MODE_BYPASS,
306 STPMIC1_LDO_MODE_BYPASS, "BYPASS"),
307 STPMIC1_MODE(STPMIC1_LDO_MODE_SINK_SOURCE,
308 STPMIC1_LDO_MODE_SINK_SOURCE, "SINK SOURCE"),
311 static int stpmic1_ldo_get_value(struct udevice *dev)
313 int sel, ldo = dev->driver_data - 1;
315 sel = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo));
320 if (ldo == STPMIC1_LDO4)
321 return STPMIC1_LDO4_UV;
323 sel &= STPMIC1_LDO12356_VOUT_MASK;
324 sel >>= STPMIC1_LDO12356_VOUT_SHIFT;
326 /* ldo3, sel = 31 => BUCK2/2 */
327 if (ldo == STPMIC1_LDO3 && sel == STPMIC1_LDO3_DDR_SEL)
328 return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2;
330 return stpmic1_output_find_uv(sel, &ldo_voltage_range[ldo]);
333 static int stpmic1_ldo_set_value(struct udevice *dev, int uv)
335 int sel, ldo = dev->driver_data - 1;
337 /* ldo4 => not possible */
338 if (ldo == STPMIC1_LDO4)
341 sel = stpmic1_output_find_sel(uv, &ldo_voltage_range[ldo]);
345 return pmic_clrsetbits(dev->parent,
346 STPMIC1_LDOX_MAIN_CR(ldo),
347 STPMIC1_LDO12356_VOUT_MASK,
348 sel << STPMIC1_LDO12356_VOUT_SHIFT);
351 static int stpmic1_ldo_get_enable(struct udevice *dev)
355 ret = pmic_reg_read(dev->parent,
356 STPMIC1_LDOX_MAIN_CR(dev->driver_data - 1));
360 return ret & STPMIC1_LDO_ENA ? true : false;
363 static int stpmic1_ldo_set_enable(struct udevice *dev, bool enable)
365 struct dm_regulator_uclass_platdata *uc_pdata;
366 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
367 STPMIC1_DEFAULT_STOP_DELAY_MS;
370 /* if regulator is already in the wanted state, nothing to do */
371 if (stpmic1_ldo_get_enable(dev) == enable)
375 uc_pdata = dev_get_uclass_platdata(dev);
376 uv = stpmic1_ldo_get_value(dev);
377 if (uv < uc_pdata->min_uV || uv > uc_pdata->max_uV)
378 stpmic1_ldo_set_value(dev, uc_pdata->min_uV);
381 ret = pmic_clrsetbits(dev->parent,
382 STPMIC1_LDOX_MAIN_CR(dev->driver_data - 1),
383 STPMIC1_LDO_ENA, enable ? STPMIC1_LDO_ENA : 0);
389 static int stpmic1_ldo_get_mode(struct udevice *dev)
391 int ret, ldo = dev->driver_data - 1;
393 if (ldo != STPMIC1_LDO3)
396 ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo));
400 if (ret & STPMIC1_LDO3_MODE)
401 return STPMIC1_LDO_MODE_BYPASS;
403 ret &= STPMIC1_LDO12356_VOUT_MASK;
404 ret >>= STPMIC1_LDO12356_VOUT_SHIFT;
406 return ret == STPMIC1_LDO3_DDR_SEL ? STPMIC1_LDO_MODE_SINK_SOURCE :
407 STPMIC1_LDO_MODE_NORMAL;
410 static int stpmic1_ldo_set_mode(struct udevice *dev, int mode)
412 int ret, ldo = dev->driver_data - 1;
414 if (ldo != STPMIC1_LDO3)
417 ret = pmic_reg_read(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo));
422 case STPMIC1_LDO_MODE_SINK_SOURCE:
423 ret &= ~STPMIC1_LDO12356_VOUT_MASK;
424 ret |= STPMIC1_LDO3_DDR_SEL << STPMIC1_LDO12356_VOUT_SHIFT;
426 case STPMIC1_LDO_MODE_NORMAL:
427 ret &= ~STPMIC1_LDO3_MODE;
429 case STPMIC1_LDO_MODE_BYPASS:
430 ret |= STPMIC1_LDO3_MODE;
434 return pmic_reg_write(dev->parent, STPMIC1_LDOX_MAIN_CR(ldo), ret);
437 static int stpmic1_ldo_probe(struct udevice *dev)
439 struct dm_regulator_uclass_platdata *uc_pdata;
441 if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_LDO)
444 uc_pdata = dev_get_uclass_platdata(dev);
446 uc_pdata->type = REGULATOR_TYPE_LDO;
447 if (dev->driver_data - 1 == STPMIC1_LDO3) {
448 uc_pdata->mode = (struct dm_regulator_mode *)ldo_modes;
449 uc_pdata->mode_count = ARRAY_SIZE(ldo_modes);
451 uc_pdata->mode_count = 0;
457 static const struct dm_regulator_ops stpmic1_ldo_ops = {
458 .get_value = stpmic1_ldo_get_value,
459 .set_value = stpmic1_ldo_set_value,
460 .get_enable = stpmic1_ldo_get_enable,
461 .set_enable = stpmic1_ldo_set_enable,
462 .get_mode = stpmic1_ldo_get_mode,
463 .set_mode = stpmic1_ldo_set_mode,
466 U_BOOT_DRIVER(stpmic1_ldo) = {
467 .name = "stpmic1_ldo",
468 .id = UCLASS_REGULATOR,
469 .ops = &stpmic1_ldo_ops,
470 .probe = stpmic1_ldo_probe,
477 static int stpmic1_vref_ddr_get_value(struct udevice *dev)
480 return stpmic1_buck_get_uv(dev->parent, STPMIC1_BUCK2) / 2;
483 static int stpmic1_vref_ddr_get_enable(struct udevice *dev)
487 ret = pmic_reg_read(dev->parent, STPMIC1_REFDDR_MAIN_CR);
491 return ret & STPMIC1_VREF_ENA ? true : false;
494 static int stpmic1_vref_ddr_set_enable(struct udevice *dev, bool enable)
496 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
497 STPMIC1_DEFAULT_STOP_DELAY_MS;
500 /* if regulator is already in the wanted state, nothing to do */
501 if (stpmic1_vref_ddr_get_enable(dev) == enable)
504 ret = pmic_clrsetbits(dev->parent, STPMIC1_REFDDR_MAIN_CR,
505 STPMIC1_VREF_ENA, enable ? STPMIC1_VREF_ENA : 0);
511 static int stpmic1_vref_ddr_probe(struct udevice *dev)
513 struct dm_regulator_uclass_platdata *uc_pdata;
515 uc_pdata = dev_get_uclass_platdata(dev);
517 uc_pdata->type = REGULATOR_TYPE_FIXED;
518 uc_pdata->mode_count = 0;
523 static const struct dm_regulator_ops stpmic1_vref_ddr_ops = {
524 .get_value = stpmic1_vref_ddr_get_value,
525 .get_enable = stpmic1_vref_ddr_get_enable,
526 .set_enable = stpmic1_vref_ddr_set_enable,
529 U_BOOT_DRIVER(stpmic1_vref_ddr) = {
530 .name = "stpmic1_vref_ddr",
531 .id = UCLASS_REGULATOR,
532 .ops = &stpmic1_vref_ddr_ops,
533 .probe = stpmic1_vref_ddr_probe,
540 static int stpmic1_boost_get_enable(struct udevice *dev)
544 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
548 return ret & STPMIC1_BST_ON ? true : false;
551 static int stpmic1_boost_set_enable(struct udevice *dev, bool enable)
555 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
559 if (!enable && ret & STPMIC1_PWR_SW_ON)
562 /* if regulator is already in the wanted state, nothing to do */
563 if (!!(ret & STPMIC1_BST_ON) == enable)
566 ret = pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
568 enable ? STPMIC1_BST_ON : 0);
570 mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);
575 static int stpmic1_boost_probe(struct udevice *dev)
577 struct dm_regulator_uclass_platdata *uc_pdata;
579 uc_pdata = dev_get_uclass_platdata(dev);
581 uc_pdata->type = REGULATOR_TYPE_FIXED;
582 uc_pdata->mode_count = 0;
587 static const struct dm_regulator_ops stpmic1_boost_ops = {
588 .get_enable = stpmic1_boost_get_enable,
589 .set_enable = stpmic1_boost_set_enable,
592 U_BOOT_DRIVER(stpmic1_boost) = {
593 .name = "stpmic1_boost",
594 .id = UCLASS_REGULATOR,
595 .ops = &stpmic1_boost_ops,
596 .probe = stpmic1_boost_probe,
603 static int stpmic1_pwr_sw_get_enable(struct udevice *dev)
605 uint mask = 1 << dev->driver_data;
608 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
612 return ret & mask ? true : false;
615 static int stpmic1_pwr_sw_set_enable(struct udevice *dev, bool enable)
617 uint mask = 1 << dev->driver_data;
618 int delay = enable ? STPMIC1_DEFAULT_START_UP_DELAY_MS :
619 STPMIC1_DEFAULT_STOP_DELAY_MS;
622 ret = pmic_reg_read(dev->parent, STPMIC1_BST_SW_CR);
626 /* if regulator is already in the wanted state, nothing to do */
627 if (!!(ret & mask) == enable)
630 /* Boost management */
631 if (enable && !(ret & STPMIC1_BST_ON)) {
632 pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
633 STPMIC1_BST_ON, STPMIC1_BST_ON);
634 mdelay(STPMIC1_USB_BOOST_START_UP_DELAY_MS);
635 } else if (!enable && ret & STPMIC1_BST_ON &&
636 (ret & STPMIC1_PWR_SW_ON) != STPMIC1_PWR_SW_ON) {
637 pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
641 ret = pmic_clrsetbits(dev->parent, STPMIC1_BST_SW_CR,
642 mask, enable ? mask : 0);
648 static int stpmic1_pwr_sw_probe(struct udevice *dev)
650 struct dm_regulator_uclass_platdata *uc_pdata;
652 if (!dev->driver_data || dev->driver_data > STPMIC1_MAX_PWR_SW)
655 uc_pdata = dev_get_uclass_platdata(dev);
657 uc_pdata->type = REGULATOR_TYPE_FIXED;
658 uc_pdata->mode_count = 0;
663 static const struct dm_regulator_ops stpmic1_pwr_sw_ops = {
664 .get_enable = stpmic1_pwr_sw_get_enable,
665 .set_enable = stpmic1_pwr_sw_set_enable,
668 U_BOOT_DRIVER(stpmic1_pwr_sw) = {
669 .name = "stpmic1_pwr_sw",
670 .id = UCLASS_REGULATOR,
671 .ops = &stpmic1_pwr_sw_ops,
672 .probe = stpmic1_pwr_sw_probe,