1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
6 * Based on Rockchip's drivers/power/pmic/pmic_rk808.c:
7 * Copyright (C) 2012 rockchips
8 * zyw <zyw@rock-chips.com>
14 #include <power/rk8xx_pmic.h>
15 #include <power/pmic.h>
16 #include <power/regulator.h>
18 #ifndef CONFIG_SPL_BUILD
22 /* Not used or exisit register and configure */
25 /* Field Definitions */
26 #define RK808_BUCK_VSEL_MASK 0x3f
27 #define RK808_BUCK4_VSEL_MASK 0xf
28 #define RK808_LDO_VSEL_MASK 0x1f
30 #define RK818_BUCK_VSEL_MASK 0x3f
31 #define RK818_BUCK4_VSEL_MASK 0x1f
32 #define RK818_LDO_VSEL_MASK 0x1f
33 #define RK818_LDO3_ON_VSEL_MASK 0xf
34 #define RK818_BOOST_ON_VSEL_MASK 0xe0
35 #define RK818_USB_ILIM_SEL_MASK 0x0f
36 #define RK818_USB_CHG_SD_VSEL_MASK 0x70
41 #define RK808_RAMP_RATE_OFFSET 3
42 #define RK808_RAMP_RATE_MASK (3 << RK808_RAMP_RATE_OFFSET)
43 #define RK808_RAMP_RATE_2MV_PER_US (0 << RK808_RAMP_RATE_OFFSET)
44 #define RK808_RAMP_RATE_4MV_PER_US (1 << RK808_RAMP_RATE_OFFSET)
45 #define RK808_RAMP_RATE_6MV_PER_US (2 << RK808_RAMP_RATE_OFFSET)
46 #define RK808_RAMP_RATE_10MV_PER_US (3 << RK808_RAMP_RATE_OFFSET)
48 struct rk8xx_reg_info {
58 static const struct rk8xx_reg_info rk808_buck[] = {
59 { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },
60 { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },
61 { 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
62 { 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
65 static const struct rk8xx_reg_info rk816_buck[] = {
67 { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
68 { 1800000, 200000, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
69 { 2300000, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
71 { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
72 { 1800000, 200000, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
73 { 2300000, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
75 { 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
77 { 800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
80 static const struct rk8xx_reg_info rk818_buck[] = {
81 { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL, REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, },
82 { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL, REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, },
83 { 712500, 12500, NA, NA, REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
84 { 1800000, 100000, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL, REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
88 static const struct rk8xx_reg_info rk808_ldo[] = {
89 { 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
90 { 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
91 { 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK808_BUCK4_VSEL_MASK, },
92 { 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
93 { 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
94 { 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
95 { 800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
96 { 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, NA, RK808_LDO_VSEL_MASK, },
99 static const struct rk8xx_reg_info rk816_ldo[] = {
100 { 800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
101 { 800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
102 { 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
103 { 800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
104 { 800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
105 { 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
108 static const struct rk8xx_reg_info rk818_ldo[] = {
109 { 1800000, 100000, REG_LDO1_ON_VSEL, REG_LDO1_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
110 { 1800000, 100000, REG_LDO2_ON_VSEL, REG_LDO2_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
111 { 800000, 100000, REG_LDO3_ON_VSEL, REG_LDO3_SLP_VSEL, NA, RK818_LDO3_ON_VSEL_MASK, },
112 { 1800000, 100000, REG_LDO4_ON_VSEL, REG_LDO4_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
113 { 1800000, 100000, REG_LDO5_ON_VSEL, REG_LDO5_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
114 { 800000, 100000, REG_LDO6_ON_VSEL, REG_LDO6_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
115 { 800000, 100000, REG_LDO7_ON_VSEL, REG_LDO7_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
116 { 1800000, 100000, REG_LDO8_ON_VSEL, REG_LDO8_SLP_VSEL, NA, RK818_LDO_VSEL_MASK, },
120 static const u16 rk818_chrg_cur_input_array[] = {
121 450, 800, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000
124 static const uint rk818_chrg_shutdown_vsel_array[] = {
125 2780000, 2850000, 2920000, 2990000, 3060000, 3130000, 3190000, 3260000
128 static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic,
131 struct rk8xx_priv *priv = dev_get_priv(pmic);
133 switch (priv->variant) {
138 if (uvolt <= 1450000)
139 return &rk816_buck[num * 3 + 0];
140 else if (uvolt <= 2200000)
141 return &rk816_buck[num * 3 + 1];
143 return &rk816_buck[num * 3 + 2];
145 return &rk816_buck[num + 4];
148 return &rk818_buck[num];
150 return &rk808_buck[num];
154 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt)
156 const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
157 struct rk8xx_priv *priv = dev_get_priv(pmic);
158 int mask = info->vsel_mask;
161 if (info->vsel_reg == NA)
164 if (info->step_uv == 0) /* Fixed voltage */
167 val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
169 debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
170 __func__, uvolt, buck + 1, info->vsel_reg, mask, val);
172 if (priv->variant == RK816_ID) {
173 pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
174 return pmic_clrsetbits(pmic, RK816_REG_DCDC_EN2,
177 return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);
181 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable)
183 uint mask, value, en_reg;
185 struct rk8xx_priv *priv = dev_get_priv(pmic);
187 switch (priv->variant) {
191 en_reg = RK816_REG_DCDC_EN2;
193 en_reg = RK816_REG_DCDC_EN1;
196 value = ((1 << buck) | (1 << (buck + 4)));
198 value = ((0 << buck) | (1 << (buck + 4)));
199 ret = pmic_reg_write(pmic, en_reg, value);
206 ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX,
211 ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,
222 static int _buck_set_suspend_value(struct udevice *pmic, int buck, int uvolt)
224 const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt);
225 int mask = info->vsel_mask;
228 if (info->vsel_sleep_reg == NA)
231 if (info->step_uv == 0)
234 val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
236 debug("%s: volt=%d, buck=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
237 __func__, uvolt, buck + 1, info->vsel_sleep_reg, mask, val);
239 return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);
242 static int _buck_get_enable(struct udevice *pmic, int buck)
244 struct rk8xx_priv *priv = dev_get_priv(pmic);
248 switch (priv->variant) {
251 mask = 1 << (buck - 4);
252 ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2);
255 ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1);
261 ret = pmic_reg_read(pmic, REG_DCDC_EN);
270 return ret & mask ? true : false;
273 static int _buck_set_suspend_enable(struct udevice *pmic, int buck, bool enable)
277 struct rk8xx_priv *priv = dev_get_priv(pmic);
279 switch (priv->variant) {
282 ret = pmic_clrsetbits(pmic, RK816_REG_DCDC_SLP_EN, mask,
288 ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,
298 static int _buck_get_suspend_enable(struct udevice *pmic, int buck)
300 struct rk8xx_priv *priv = dev_get_priv(pmic);
304 switch (priv->variant) {
307 val = pmic_reg_read(pmic, RK816_REG_DCDC_SLP_EN);
310 ret = val & mask ? 1 : 0;
315 val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF1);
318 ret = val & mask ? 0 : 1;
327 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic,
330 struct rk8xx_priv *priv = dev_get_priv(pmic);
332 switch (priv->variant) {
334 return &rk816_ldo[num];
336 return &rk818_ldo[num];
338 return &rk808_ldo[num];
342 static int _ldo_get_enable(struct udevice *pmic, int ldo)
344 struct rk8xx_priv *priv = dev_get_priv(pmic);
348 switch (priv->variant) {
351 mask = 1 << (ldo - 4);
352 ret = pmic_reg_read(pmic, RK816_REG_LDO_EN2);
355 ret = pmic_reg_read(pmic, RK816_REG_LDO_EN1);
361 ret = pmic_reg_read(pmic, REG_LDO_EN);
370 return ret & mask ? true : false;
373 static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable)
375 struct rk8xx_priv *priv = dev_get_priv(pmic);
376 uint mask, value, en_reg;
379 switch (priv->variant) {
383 en_reg = RK816_REG_LDO_EN2;
385 en_reg = RK816_REG_LDO_EN1;
388 value = ((1 << ldo) | (1 << (ldo + 4)));
390 value = ((0 << ldo) | (1 << (ldo + 4)));
392 ret = pmic_reg_write(pmic, en_reg, value);
397 ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,
405 static int _ldo_set_suspend_enable(struct udevice *pmic, int ldo, bool enable)
407 struct rk8xx_priv *priv = dev_get_priv(pmic);
411 switch (priv->variant) {
414 ret = pmic_clrsetbits(pmic, RK816_REG_LDO_SLP_EN, mask,
420 ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,
428 static int _ldo_get_suspend_enable(struct udevice *pmic, int ldo)
430 struct rk8xx_priv *priv = dev_get_priv(pmic);
434 switch (priv->variant) {
437 val = pmic_reg_read(pmic, RK816_REG_LDO_SLP_EN);
440 ret = val & mask ? 1 : 0;
445 val = pmic_reg_read(pmic, REG_SLEEP_SET_OFF2);
448 ret = val & mask ? 0 : 1;
455 static int buck_get_value(struct udevice *dev)
457 int buck = dev->driver_data - 1;
458 /* We assume level-1 voltage is enough for usage in U-Boot */
459 const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
460 int mask = info->vsel_mask;
463 if (info->vsel_reg == NA)
466 ret = pmic_reg_read(dev->parent, info->vsel_reg);
471 return info->min_uv + val * info->step_uv;
474 static int buck_set_value(struct udevice *dev, int uvolt)
476 int buck = dev->driver_data - 1;
478 return _buck_set_value(dev->parent, buck, uvolt);
481 static int buck_get_suspend_value(struct udevice *dev)
483 int buck = dev->driver_data - 1;
484 /* We assume level-1 voltage is enough for usage in U-Boot */
485 const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0);
486 int mask = info->vsel_mask;
489 if (info->vsel_sleep_reg == NA)
492 ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
498 return info->min_uv + val * info->step_uv;
501 static int buck_set_suspend_value(struct udevice *dev, int uvolt)
503 int buck = dev->driver_data - 1;
505 return _buck_set_suspend_value(dev->parent, buck, uvolt);
508 static int buck_set_enable(struct udevice *dev, bool enable)
510 int buck = dev->driver_data - 1;
512 return _buck_set_enable(dev->parent, buck, enable);
515 static int buck_set_suspend_enable(struct udevice *dev, bool enable)
517 int buck = dev->driver_data - 1;
519 return _buck_set_suspend_enable(dev->parent, buck, enable);
522 static int buck_get_suspend_enable(struct udevice *dev)
524 int buck = dev->driver_data - 1;
526 return _buck_get_suspend_enable(dev->parent, buck);
529 static int buck_get_enable(struct udevice *dev)
531 int buck = dev->driver_data - 1;
533 return _buck_get_enable(dev->parent, buck);
536 static int ldo_get_value(struct udevice *dev)
538 int ldo = dev->driver_data - 1;
539 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
540 int mask = info->vsel_mask;
543 if (info->vsel_reg == NA)
545 ret = pmic_reg_read(dev->parent, info->vsel_reg);
550 return info->min_uv + val * info->step_uv;
553 static int ldo_set_value(struct udevice *dev, int uvolt)
555 int ldo = dev->driver_data - 1;
556 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
557 int mask = info->vsel_mask;
560 if (info->vsel_reg == NA)
563 if (info->step_uv == 0)
566 val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
568 debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
569 __func__, uvolt, ldo + 1, info->vsel_reg, mask, val);
571 return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);
574 static int ldo_set_suspend_value(struct udevice *dev, int uvolt)
576 int ldo = dev->driver_data - 1;
577 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, uvolt);
578 int mask = info->vsel_mask;
581 if (info->vsel_sleep_reg == NA)
584 if (info->step_uv == 0)
587 val = ((uvolt - info->min_uv) / info->step_uv) + info->min_sel;
589 debug("%s: volt=%d, ldo=%d, reg=0x%x, mask=0x%x, val=0x%x\n",
590 __func__, uvolt, ldo + 1, info->vsel_sleep_reg, mask, val);
592 return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);
595 static int ldo_get_suspend_value(struct udevice *dev)
597 int ldo = dev->driver_data - 1;
598 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo, 0);
599 int mask = info->vsel_mask;
602 if (info->vsel_sleep_reg == NA)
605 ret = pmic_reg_read(dev->parent, info->vsel_sleep_reg);
611 return info->min_uv + val * info->step_uv;
614 static int ldo_set_enable(struct udevice *dev, bool enable)
616 int ldo = dev->driver_data - 1;
618 return _ldo_set_enable(dev->parent, ldo, enable);
621 static int ldo_set_suspend_enable(struct udevice *dev, bool enable)
623 int ldo = dev->driver_data - 1;
625 return _ldo_set_suspend_enable(dev->parent, ldo, enable);
628 static int ldo_get_suspend_enable(struct udevice *dev)
630 int ldo = dev->driver_data - 1;
632 return _ldo_get_suspend_enable(dev->parent, ldo);
635 static int ldo_get_enable(struct udevice *dev)
637 int ldo = dev->driver_data - 1;
639 return _ldo_get_enable(dev->parent, ldo);
642 static int switch_set_enable(struct udevice *dev, bool enable)
644 struct rk8xx_priv *priv = dev_get_priv(dev->parent);
645 int ret = 0, sw = dev->driver_data - 1;
648 switch (priv->variant) {
650 mask = 1 << (sw + 5);
651 ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
656 ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,
661 debug("%s: switch%d, enable=%d, mask=0x%x\n",
662 __func__, sw + 1, enable, mask);
667 static int switch_get_enable(struct udevice *dev)
669 struct rk8xx_priv *priv = dev_get_priv(dev->parent);
670 int ret = 0, sw = dev->driver_data - 1;
673 switch (priv->variant) {
675 mask = 1 << (sw + 5);
676 ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
680 ret = pmic_reg_read(dev->parent, REG_DCDC_EN);
687 return ret & mask ? true : false;
690 static int switch_set_suspend_value(struct udevice *dev, int uvolt)
695 static int switch_get_suspend_value(struct udevice *dev)
700 static int switch_set_suspend_enable(struct udevice *dev, bool enable)
702 struct rk8xx_priv *priv = dev_get_priv(dev->parent);
703 int ret = 0, sw = dev->driver_data - 1;
706 switch (priv->variant) {
708 mask = 1 << (sw + 5);
709 ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,
714 ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,
719 debug("%s: switch%d, enable=%d, mask=0x%x\n",
720 __func__, sw + 1, enable, mask);
725 static int switch_get_suspend_enable(struct udevice *dev)
727 struct rk8xx_priv *priv = dev_get_priv(dev->parent);
728 int val, ret = 0, sw = dev->driver_data - 1;
731 switch (priv->variant) {
733 mask = 1 << (sw + 5);
734 val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
737 ret = val & mask ? 0 : 1;
741 val = pmic_reg_read(dev->parent, REG_SLEEP_SET_OFF1);
744 ret = val & mask ? 0 : 1;
752 * RK8xx switch does not need to set the voltage,
753 * but if dts set regulator-min-microvolt/regulator-max-microvolt,
754 * will cause regulator set value fail and not to enable this switch.
755 * So add an empty function to return success.
757 static int switch_get_value(struct udevice *dev)
762 static int switch_set_value(struct udevice *dev, int uvolt)
767 static int rk8xx_buck_probe(struct udevice *dev)
769 struct dm_regulator_uclass_platdata *uc_pdata;
771 uc_pdata = dev_get_uclass_platdata(dev);
773 uc_pdata->type = REGULATOR_TYPE_BUCK;
774 uc_pdata->mode_count = 0;
779 static int rk8xx_ldo_probe(struct udevice *dev)
781 struct dm_regulator_uclass_platdata *uc_pdata;
783 uc_pdata = dev_get_uclass_platdata(dev);
785 uc_pdata->type = REGULATOR_TYPE_LDO;
786 uc_pdata->mode_count = 0;
791 static int rk8xx_switch_probe(struct udevice *dev)
793 struct dm_regulator_uclass_platdata *uc_pdata;
795 uc_pdata = dev_get_uclass_platdata(dev);
797 uc_pdata->type = REGULATOR_TYPE_FIXED;
798 uc_pdata->mode_count = 0;
803 static const struct dm_regulator_ops rk8xx_buck_ops = {
804 .get_value = buck_get_value,
805 .set_value = buck_set_value,
806 .set_suspend_value = buck_set_suspend_value,
807 .get_suspend_value = buck_get_suspend_value,
808 .get_enable = buck_get_enable,
809 .set_enable = buck_set_enable,
810 .set_suspend_enable = buck_set_suspend_enable,
811 .get_suspend_enable = buck_get_suspend_enable,
814 static const struct dm_regulator_ops rk8xx_ldo_ops = {
815 .get_value = ldo_get_value,
816 .set_value = ldo_set_value,
817 .set_suspend_value = ldo_set_suspend_value,
818 .get_suspend_value = ldo_get_suspend_value,
819 .get_enable = ldo_get_enable,
820 .set_enable = ldo_set_enable,
821 .set_suspend_enable = ldo_set_suspend_enable,
822 .get_suspend_enable = ldo_get_suspend_enable,
825 static const struct dm_regulator_ops rk8xx_switch_ops = {
826 .get_value = switch_get_value,
827 .set_value = switch_set_value,
828 .get_enable = switch_get_enable,
829 .set_enable = switch_set_enable,
830 .set_suspend_enable = switch_set_suspend_enable,
831 .get_suspend_enable = switch_get_suspend_enable,
832 .set_suspend_value = switch_set_suspend_value,
833 .get_suspend_value = switch_get_suspend_value,
836 U_BOOT_DRIVER(rk8xx_buck) = {
837 .name = "rk8xx_buck",
838 .id = UCLASS_REGULATOR,
839 .ops = &rk8xx_buck_ops,
840 .probe = rk8xx_buck_probe,
843 U_BOOT_DRIVER(rk8xx_ldo) = {
845 .id = UCLASS_REGULATOR,
846 .ops = &rk8xx_ldo_ops,
847 .probe = rk8xx_ldo_probe,
850 U_BOOT_DRIVER(rk8xx_switch) = {
851 .name = "rk8xx_switch",
852 .id = UCLASS_REGULATOR,
853 .ops = &rk8xx_switch_ops,
854 .probe = rk8xx_switch_probe,
858 int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt)
862 ret = _buck_set_value(pmic, buck, uvolt);
866 return _buck_set_enable(pmic, buck, true);
869 int rk818_spl_configure_usb_input_current(struct udevice *pmic, int current_ma)
873 for (i = 0; i < ARRAY_SIZE(rk818_chrg_cur_input_array); i++)
874 if (current_ma <= rk818_chrg_cur_input_array[i])
877 return pmic_clrsetbits(pmic, REG_USB_CTRL, RK818_USB_ILIM_SEL_MASK, i);
880 int rk818_spl_configure_usb_chrg_shutdown(struct udevice *pmic, int uvolt)
884 for (i = 0; i < ARRAY_SIZE(rk818_chrg_shutdown_vsel_array); i++)
885 if (uvolt <= rk818_chrg_shutdown_vsel_array[i])
888 return pmic_clrsetbits(pmic, REG_USB_CTRL, RK818_USB_CHG_SD_VSEL_MASK,