drivers/power/regulator/pbias_regulator.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2016 Texas Instruments Incorporated, <www.ti.com>
   4  * Jean-Jacques Hiblot <jjhiblot@ti.com>
   5  */
   6
   7 #include <common.h>
   8 #include <errno.h>
   9 #include <dm.h>
  10 #include <log.h>
  11 #include <linux/delay.h>
  12 #include <linux/err.h>
  13 #include <power/pmic.h>
  14 #include <power/regulator.h>
  15 #include <regmap.h>
  16 #include <syscon.h>
  17 #include <linux/bitops.h>
  18 #include <linux/ioport.h>
  19 #include <dm/device-internal.h>
  20 #include <dm/read.h>
  21 #ifdef CONFIG_MMC_OMAP36XX_PINS
  22 #include <asm/arch/sys_proto.h>
  23 #include <asm/io.h>
  24 #include <asm/arch/mux.h>
  25 #endif
  26
  27 struct pbias_reg_info {
  28         u32 enable;
  29         u32 enable_mask;
  30         u32 disable_val;
  31         u32 vmode;
  32         unsigned int enable_time;
  33         char *name;
  34 };
  35
  36 struct pbias_priv {
  37         struct regmap *regmap;
  38         int offset;
  39 };
  40
  41 static const struct pmic_child_info pmic_children_info[] = {
  42         { .prefix = "pbias", .driver = "pbias_regulator"},
  43         { },
  44 };
  45
  46 static int pbias_write(struct udevice *dev, uint reg, const uint8_t *buff,
  47                        int len)
  48 {
  49         struct pbias_priv *priv = dev_get_priv(dev);
  50         u32 val = *(u32 *)buff;
  51
  52         if (len != 4)
  53                 return -EINVAL;
  54
  55         return regmap_write(priv->regmap, priv->offset, val);
  56 }
  57
  58 static int pbias_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
  59 {
  60         struct pbias_priv *priv = dev_get_priv(dev);
  61
  62         if (len != 4)
  63                 return -EINVAL;
  64
  65         return regmap_read(priv->regmap, priv->offset, (u32 *)buff);
  66 }
  67
  68 static int pbias_of_to_plat(struct udevice *dev)
  69 {
  70         struct pbias_priv *priv = dev_get_priv(dev);
  71         struct udevice *syscon;
  72         struct regmap *regmap;
  73         struct resource res;
  74         int err;
  75
  76         err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
  77                                            "syscon", &syscon);
  78         if (err) {
  79                 pr_err("%s: unable to find syscon device (%d)\n", __func__,
  80                       err);
  81                 return err;
  82         }
  83
  84         regmap = syscon_get_regmap(syscon);
  85         if (IS_ERR(regmap)) {
  86                 pr_err("%s: unable to find regmap (%ld)\n", __func__,
  87                       PTR_ERR(regmap));
  88                 return PTR_ERR(regmap);
  89         }
  90         priv->regmap = regmap;
  91
  92         err = dev_read_resource(dev, 0, &res);
  93         if (err) {
  94                 pr_err("%s: unable to find offset (%d)\n", __func__, err);
  95                 return err;
  96         }
  97         priv->offset = res.start;
  98
  99         return 0;
 100 }
 101
 102 static int pbias_bind(struct udevice *dev)
 103 {
 104         int children;
 105
 106         children = pmic_bind_children(dev, dev->node, pmic_children_info);
 107         if (!children)
 108                 debug("%s: %s - no child found\n", __func__, dev->name);
 109
 110         return 0;
 111 }
 112
 113 static struct dm_pmic_ops pbias_ops = {
 114         .read = pbias_read,
 115         .write = pbias_write,
 116 };
 117
 118 static const struct udevice_id pbias_ids[] = {
 119         { .compatible = "ti,pbias-dra7" },
 120         { .compatible = "ti,pbias-omap2" },
 121         { .compatible = "ti,pbias-omap3" },
 122         { .compatible = "ti,pbias-omap4" },
 123         { .compatible = "ti,pbias-omap5" },
 124         { }
 125 };
 126
 127 U_BOOT_DRIVER(pbias_pmic) = {
 128         .name = "pbias_pmic",
 129         .id = UCLASS_PMIC,
 130         .of_match = pbias_ids,
 131         .bind = pbias_bind,
 132         .ops = &pbias_ops,
 133         .of_to_plat = pbias_of_to_plat,
 134         .priv_auto      = sizeof(struct pbias_priv),
 135 };
 136
 137 static const struct pbias_reg_info pbias_mmc_omap2430 = {
 138         .enable = BIT(1),
 139         .enable_mask = BIT(1),
 140         .vmode = BIT(0),
 141         .disable_val = 0,
 142         .enable_time = 100,
 143         .name = "pbias_mmc_omap2430"
 144 };
 145
 146 static const struct pbias_reg_info pbias_sim_omap3 = {
 147         .enable = BIT(9),
 148         .enable_mask = BIT(9),
 149         .vmode = BIT(8),
 150         .enable_time = 100,
 151         .name = "pbias_sim_omap3"
 152 };
 153
 154 static const struct pbias_reg_info pbias_mmc_omap4 = {
 155         .enable = BIT(26) | BIT(22),
 156         .enable_mask = BIT(26) | BIT(25) | BIT(22),
 157         .disable_val = BIT(25),
 158         .vmode = BIT(21),
 159         .enable_time = 100,
 160         .name = "pbias_mmc_omap4"
 161 };
 162
 163 static const struct pbias_reg_info pbias_mmc_omap5 = {
 164         .enable = BIT(27) | BIT(26),
 165         .enable_mask = BIT(27) | BIT(25) | BIT(26),
 166         .disable_val = BIT(25),
 167         .vmode = BIT(21),
 168         .enable_time = 100,
 169         .name = "pbias_mmc_omap5"
 170 };
 171
 172 static const struct pbias_reg_info *pbias_reg_infos[] = {
 173         &pbias_mmc_omap5,
 174         &pbias_mmc_omap4,
 175         &pbias_sim_omap3,
 176         &pbias_mmc_omap2430,
 177         NULL
 178 };
 179
 180 static int pbias_regulator_probe(struct udevice *dev)
 181 {
 182         const struct pbias_reg_info **p = pbias_reg_infos;
 183         struct dm_regulator_uclass_plat *uc_pdata;
 184
 185         uc_pdata = dev_get_uclass_plat(dev);
 186
 187         while (*p) {
 188                 int rc;
 189
 190                 rc = dev_read_stringlist_search(dev, "regulator-name",
 191                                                 (*p)->name);
 192                 if (rc >= 0) {
 193                         debug("found regulator %s\n", (*p)->name);
 194                         break;
 195                 } else if (rc != -ENODATA) {
 196                         return rc;
 197                 }
 198                 p++;
 199         }
 200         if (!*p) {
 201                 int i = 0;
 202                 const char *s;
 203
 204                 debug("regulator ");
 205                 while (dev_read_string_index(dev, "regulator-name", i++, &s) >= 0)
 206                         debug("%s'%s' ", (i > 1) ? ", " : "", s);
 207                 debug("%s not supported\n", (i > 2) ? "are" : "is");
 208                 return -EINVAL;
 209         }
 210
 211         uc_pdata->type = REGULATOR_TYPE_OTHER;
 212         dev_set_priv(dev, (void *)*p);
 213
 214         return 0;
 215 }
 216
 217 static int pbias_regulator_get_value(struct udevice *dev)
 218 {
 219         const struct pbias_reg_info *p = dev_get_priv(dev);
 220         int rc;
 221         u32 reg;
 222
 223         rc = pmic_read(dev->parent, 0, (uint8_t *)&reg, sizeof(reg));
 224         if (rc)
 225                 return rc;
 226
 227         debug("%s voltage id %s\n", p->name,
 228               (reg & p->vmode) ? "3.0v" : "1.8v");
 229         return (reg & p->vmode) ? 3000000 : 1800000;
 230 }
 231
 232 static int pbias_regulator_set_value(struct udevice *dev, int uV)
 233 {
 234         const struct pbias_reg_info *p = dev_get_priv(dev);
 235         int rc, ret;
 236         u32 reg;
 237 #ifdef CONFIG_MMC_OMAP36XX_PINS
 238         u32 wkup_ctrl = readl(OMAP34XX_CTRL_WKUP_CTRL);
 239 #endif
 240
 241         rc = pmic_read(dev->parent, 0, (uint8_t *)&reg, sizeof(reg));
 242         if (rc)
 243                 return rc;
 244
 245         if (uV == 3300000)
 246                 reg |= p->vmode;
 247         else if (uV == 1800000)
 248                 reg &= ~p->vmode;
 249         else
 250                 return -EINVAL;
 251
 252         debug("Setting %s voltage to %s\n", p->name,
 253               (reg & p->vmode) ? "3.0v" : "1.8v");
 254
 255 #ifdef CONFIG_MMC_OMAP36XX_PINS
 256         if (get_cpu_family() == CPU_OMAP36XX) {
 257                 /* Disable extended drain IO before changing PBIAS */
 258                 wkup_ctrl &= ~OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ;
 259                 writel(wkup_ctrl, OMAP34XX_CTRL_WKUP_CTRL);
 260         }
 261 #endif
 262         ret = pmic_write(dev->parent, 0, (uint8_t *)&reg, sizeof(reg));
 263 #ifdef CONFIG_MMC_OMAP36XX_PINS
 264         if (get_cpu_family() == CPU_OMAP36XX) {
 265                 /* Enable extended drain IO after changing PBIAS */
 266                 writel(wkup_ctrl |
 267                                 OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
 268                                 OMAP34XX_CTRL_WKUP_CTRL);
 269         }
 270 #endif
 271         return ret;
 272 }
 273
 274 static int pbias_regulator_get_enable(struct udevice *dev)
 275 {
 276         const struct pbias_reg_info *p = dev_get_priv(dev);
 277         int rc;
 278         u32 reg;
 279
 280         rc = pmic_read(dev->parent, 0, (uint8_t *)&reg, sizeof(reg));
 281         if (rc)
 282                 return rc;
 283
 284         debug("%s id %s\n", p->name,
 285               (reg & p->enable_mask) == (p->disable_val) ? "on" : "off");
 286
 287         return (reg & p->enable_mask) == (p->disable_val);
 288 }
 289
 290 static int pbias_regulator_set_enable(struct udevice *dev, bool enable)
 291 {
 292         const struct pbias_reg_info *p = dev_get_priv(dev);
 293         int rc;
 294         u32 reg;
 295 #ifdef CONFIG_MMC_OMAP36XX_PINS
 296         u32 wkup_ctrl = readl(OMAP34XX_CTRL_WKUP_CTRL);
 297 #endif
 298
 299         debug("Turning %s %s\n", enable ? "on" : "off", p->name);
 300
 301 #ifdef CONFIG_MMC_OMAP36XX_PINS
 302         if (get_cpu_family() == CPU_OMAP36XX) {
 303                 /* Disable extended drain IO before changing PBIAS */
 304                 wkup_ctrl &= ~OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ;
 305                 writel(wkup_ctrl, OMAP34XX_CTRL_WKUP_CTRL);
 306         }
 307 #endif
 308
 309         rc = pmic_read(dev->parent, 0, (uint8_t *)&reg, sizeof(reg));
 310         if (rc)
 311                 return rc;
 312
 313         reg &= ~p->enable_mask;
 314         if (enable)
 315                 reg |= p->enable;
 316         else
 317                 reg |= p->disable_val;
 318
 319         rc = pmic_write(dev->parent, 0, (uint8_t *)&reg, sizeof(reg));
 320
 321 #ifdef CONFIG_MMC_OMAP36XX_PINS
 322         if (get_cpu_family() == CPU_OMAP36XX) {
 323                 /* Enable extended drain IO after changing PBIAS */
 324                 writel(wkup_ctrl |
 325                                 OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
 326                                 OMAP34XX_CTRL_WKUP_CTRL);
 327         }
 328 #endif
 329
 330         if (rc)
 331                 return rc;
 332
 333         if (enable)
 334                 udelay(p->enable_time);
 335
 336         return 0;
 337 }
 338
 339 static const struct dm_regulator_ops pbias_regulator_ops = {
 340         .get_value  = pbias_regulator_get_value,
 341         .set_value  = pbias_regulator_set_value,
 342         .get_enable = pbias_regulator_get_enable,
 343         .set_enable = pbias_regulator_set_enable,
 344 };
 345
 346 U_BOOT_DRIVER(pbias_regulator) = {
 347         .name = "pbias_regulator",
 348         .id = UCLASS_REGULATOR,
 349         .ops = &pbias_regulator_ops,
 350         .probe = pbias_regulator_probe,
 351 };