drivers/power/regulator/bd71837.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2019 ROHM Semiconductors
   4  *
   5  * ROHM BD71837 regulator driver
   6  */
   7
   8 #include <common.h>
   9 #include <dm.h>
  10 #include <log.h>
  11 #include <power/bd71837.h>
  12 #include <power/pmic.h>
  13 #include <power/regulator.h>
  14
  15 #define HW_STATE_CONTROL 0
  16 #define DEBUG
  17
  18 /**
  19  * struct bd71837_vrange - describe linear range of voltages
  20  *
  21  * @min_volt:   smallest voltage in range
  22  * @step:       how much voltage changes at each selector step
  23  * @min_sel:    smallest selector in the range
  24  * @max_sel:    maximum selector in the range
  25  * @rangeval:   register value used to select this range if selectible
  26  *              ranges are supported
  27  */
  28 struct bd71837_vrange {
  29         unsigned int    min_volt;
  30         unsigned int    step;
  31         u8              min_sel;
  32         u8              max_sel;
  33         u8              rangeval;
  34 };
  35
  36 /**
  37  * struct bd71837_platdata - describe regulator control registers
  38  *
  39  * @name:       name of the regulator. Used for matching the dt-entry
  40  * @enable_reg: register address used to enable/disable regulator
  41  * @enablemask: register mask used to enable/disable regulator
  42  * @volt_reg:   register address used to configure regulator voltage
  43  * @volt_mask:  register mask used to configure regulator voltage
  44  * @ranges:     pointer to ranges of regulator voltages and matching register
  45  *              values
  46  * @numranges:  number of voltage ranges pointed by ranges
  47  * @rangemask:  mask for selecting used ranges if multiple ranges are supported
  48  * @sel_mask:   bit to toggle in order to transfer the register control to SW
  49  * @dvs:        whether the voltage can be changed when regulator is enabled
  50  */
  51 struct bd71837_platdata {
  52         const char              *name;
  53         u8                      enable_reg;
  54         u8                      enablemask;
  55         u8                      volt_reg;
  56         u8                      volt_mask;
  57         struct bd71837_vrange   *ranges;
  58         unsigned int            numranges;
  59         u8                      rangemask;
  60         u8                      sel_mask;
  61         bool                    dvs;
  62 };
  63
  64 #define BD_RANGE(_min, _vstep, _sel_low, _sel_hi, _range_sel) \
  65 { \
  66         .min_volt = (_min), .step = (_vstep), .min_sel = (_sel_low), \
  67         .max_sel = (_sel_hi), .rangeval = (_range_sel) \
  68 }
  69
  70 #define BD_DATA(_name, enreg, enmask, vreg, vmask, _range, rmask, _dvs, sel) \
  71 { \
  72         .name = (_name), .enable_reg = (enreg), .enablemask = (enmask), \
  73         .volt_reg = (vreg), .volt_mask = (vmask), .ranges = (_range), \
  74         .numranges = ARRAY_SIZE(_range), .rangemask = (rmask), .dvs = (_dvs), \
  75         .sel_mask = (sel) \
  76 }
  77
  78 static struct bd71837_vrange dvs_buck_vranges[] = {
  79         BD_RANGE(700000, 10000, 0, 0x3c, 0),
  80         BD_RANGE(1300000, 0, 0x3d, 0x3f, 0),
  81 };
  82
  83 static struct bd71837_vrange bd71847_buck3_vranges[] = {
  84         BD_RANGE(700000, 100000, 0x00, 0x03, 0),
  85         BD_RANGE(1050000, 50000, 0x04, 0x05, 0),
  86         BD_RANGE(1200000, 150000, 0x06, 0x07, 0),
  87         BD_RANGE(550000, 50000, 0x0, 0x7, 0x40),
  88         BD_RANGE(675000, 100000, 0x0, 0x3, 0x80),
  89         BD_RANGE(1025000, 50000, 0x4, 0x5, 0x80),
  90         BD_RANGE(1175000, 150000, 0x6, 0x7, 0x80),
  91 };
  92
  93 static struct bd71837_vrange bd71847_buck4_vranges[] = {
  94         BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
  95         BD_RANGE(2600000, 100000, 0x00, 0x03, 40),
  96 };
  97
  98 static struct bd71837_vrange bd71837_buck5_vranges[] = {
  99         BD_RANGE(700000, 100000, 0, 0x3, 0),
 100         BD_RANGE(1050000, 50000, 0x04, 0x05, 0),
 101         BD_RANGE(1200000, 150000, 0x06, 0x07, 0),
 102         BD_RANGE(675000, 100000, 0x0, 0x3, 0x80),
 103         BD_RANGE(1025000, 50000, 0x04, 0x05, 0x80),
 104         BD_RANGE(1175000, 150000, 0x06, 0x07, 0x80),
 105 };
 106
 107 static struct bd71837_vrange bd71837_buck6_vranges[] = {
 108         BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
 109 };
 110
 111 static struct bd71837_vrange nodvs_buck3_vranges[] = {
 112         BD_RANGE(1605000, 90000, 0, 1, 0),
 113         BD_RANGE(1755000, 45000, 2, 4, 0),
 114         BD_RANGE(1905000, 45000, 5, 7, 0),
 115 };
 116
 117 static struct bd71837_vrange nodvs_buck4_vranges[] = {
 118         BD_RANGE(800000, 10000, 0x00, 0x3C, 0),
 119 };
 120
 121 static struct bd71837_vrange ldo1_vranges[] = {
 122         BD_RANGE(3000000, 100000, 0x00, 0x03, 0),
 123         BD_RANGE(1600000, 100000, 0x00, 0x03, 0x20),
 124 };
 125
 126 static struct bd71837_vrange ldo2_vranges[] = {
 127         BD_RANGE(900000, 0, 0, 0, 0),
 128         BD_RANGE(800000, 0, 1, 1, 0),
 129 };
 130
 131 static struct bd71837_vrange ldo3_vranges[] = {
 132         BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
 133 };
 134
 135 static struct bd71837_vrange ldo4_vranges[] = {
 136         BD_RANGE(900000, 100000, 0x00, 0x09, 0),
 137 };
 138
 139 static struct bd71837_vrange bd71837_ldo5_vranges[] = {
 140         BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
 141 };
 142
 143 static struct bd71837_vrange bd71847_ldo5_vranges[] = {
 144         BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
 145         BD_RANGE(800000, 100000, 0x00, 0x0f, 0x20),
 146 };
 147
 148 static struct bd71837_vrange ldo6_vranges[] = {
 149         BD_RANGE(900000, 100000, 0x00, 0x09, 0),
 150 };
 151
 152 static struct bd71837_vrange ldo7_vranges[] = {
 153         BD_RANGE(1800000, 100000, 0x00, 0x0f, 0),
 154 };
 155
 156 /*
 157  * We use enable mask 'HW_STATE_CONTROL' to indicate that this regulator
 158  * must not be enabled or disabled by SW. The typical use-case for BD71837
 159  * is powering NXP i.MX8. In this use-case we (for now) only allow control
 160  * for BUCK3 and BUCK4 which are not boot critical.
 161  */
 162 static struct bd71837_platdata bd71837_reg_data[] = {
 163 /* Bucks 1-4 which support dynamic voltage scaling */
 164         BD_DATA("BUCK1", BD718XX_BUCK1_CTRL, HW_STATE_CONTROL,
 165                 BD718XX_BUCK1_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
 166                 true, BD718XX_BUCK_SEL),
 167         BD_DATA("BUCK2", BD718XX_BUCK2_CTRL, HW_STATE_CONTROL,
 168                 BD718XX_BUCK2_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
 169                 true, BD718XX_BUCK_SEL),
 170         BD_DATA("BUCK3", BD71837_BUCK3_CTRL, BD718XX_BUCK_EN,
 171                 BD71837_BUCK3_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
 172                 true, BD718XX_BUCK_SEL),
 173         BD_DATA("BUCK4", BD71837_BUCK4_CTRL, BD718XX_BUCK_EN,
 174                 BD71837_BUCK4_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
 175                 true, BD718XX_BUCK_SEL),
 176 /* Bucks 5-8 which do not support dynamic voltage scaling */
 177         BD_DATA("BUCK5", BD718XX_1ST_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 178                 BD718XX_1ST_NODVS_BUCK_VOLT, BD718XX_1ST_NODVS_BUCK_MASK,
 179                 bd71837_buck5_vranges, 0x80, false, BD718XX_BUCK_SEL),
 180         BD_DATA("BUCK6", BD718XX_2ND_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 181                 BD718XX_2ND_NODVS_BUCK_VOLT, BD71837_BUCK6_MASK,
 182                 bd71837_buck6_vranges, 0, false, BD718XX_BUCK_SEL),
 183         BD_DATA("BUCK7", BD718XX_3RD_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 184                 BD718XX_3RD_NODVS_BUCK_VOLT, BD718XX_3RD_NODVS_BUCK_MASK,
 185                 nodvs_buck3_vranges, 0, false, BD718XX_BUCK_SEL),
 186         BD_DATA("BUCK8", BD718XX_4TH_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 187                 BD718XX_4TH_NODVS_BUCK_VOLT, BD718XX_4TH_NODVS_BUCK_MASK,
 188                 nodvs_buck4_vranges, 0, false, BD718XX_BUCK_SEL),
 189 /* LDOs */
 190         BD_DATA("LDO1", BD718XX_LDO1_VOLT, HW_STATE_CONTROL, BD718XX_LDO1_VOLT,
 191                 BD718XX_LDO1_MASK, ldo1_vranges, 0x20, false, BD718XX_LDO_SEL),
 192         BD_DATA("LDO2", BD718XX_LDO2_VOLT, HW_STATE_CONTROL, BD718XX_LDO2_VOLT,
 193                 BD718XX_LDO2_MASK, ldo2_vranges, 0, false, BD718XX_LDO_SEL),
 194         BD_DATA("LDO3", BD718XX_LDO3_VOLT, HW_STATE_CONTROL, BD718XX_LDO3_VOLT,
 195                 BD718XX_LDO3_MASK, ldo3_vranges, 0, false, BD718XX_LDO_SEL),
 196         BD_DATA("LDO4", BD718XX_LDO4_VOLT, HW_STATE_CONTROL, BD718XX_LDO4_VOLT,
 197                 BD718XX_LDO4_MASK, ldo4_vranges, 0, false, BD718XX_LDO_SEL),
 198         BD_DATA("LDO5", BD718XX_LDO5_VOLT, HW_STATE_CONTROL, BD718XX_LDO5_VOLT,
 199                 BD71837_LDO5_MASK, bd71837_ldo5_vranges, 0, false,
 200                 BD718XX_LDO_SEL),
 201         BD_DATA("LDO6", BD718XX_LDO6_VOLT, HW_STATE_CONTROL, BD718XX_LDO6_VOLT,
 202                 BD718XX_LDO6_MASK, ldo6_vranges, 0, false, BD718XX_LDO_SEL),
 203         BD_DATA("LDO7", BD71837_LDO7_VOLT, HW_STATE_CONTROL, BD71837_LDO7_VOLT,
 204                 BD71837_LDO7_MASK, ldo7_vranges, 0, false, BD718XX_LDO_SEL),
 205 };
 206
 207 static struct bd71837_platdata bd71847_reg_data[] = {
 208 /* Bucks 1 and 2 which support dynamic voltage scaling */
 209         BD_DATA("BUCK1", BD718XX_BUCK1_CTRL, HW_STATE_CONTROL,
 210                 BD718XX_BUCK1_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
 211                 true, BD718XX_BUCK_SEL),
 212         BD_DATA("BUCK2", BD718XX_BUCK2_CTRL, HW_STATE_CONTROL,
 213                 BD718XX_BUCK2_VOLT_RUN, DVS_BUCK_RUN_MASK, dvs_buck_vranges, 0,
 214                 true, BD718XX_BUCK_SEL),
 215 /* Bucks 3-6 which do not support dynamic voltage scaling */
 216         BD_DATA("BUCK3", BD718XX_1ST_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 217                 BD718XX_1ST_NODVS_BUCK_VOLT, BD718XX_1ST_NODVS_BUCK_MASK,
 218                 bd71847_buck3_vranges, 0xc0, false, BD718XX_BUCK_SEL),
 219         BD_DATA("BUCK4", BD718XX_2ND_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 220                 BD718XX_2ND_NODVS_BUCK_VOLT, BD71837_BUCK6_MASK,
 221                 bd71847_buck4_vranges, 0x40, false, BD718XX_BUCK_SEL),
 222         BD_DATA("BUCK5", BD718XX_3RD_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 223                 BD718XX_3RD_NODVS_BUCK_VOLT, BD718XX_3RD_NODVS_BUCK_MASK,
 224                 nodvs_buck3_vranges, 0, false, BD718XX_BUCK_SEL),
 225         BD_DATA("BUCK6", BD718XX_4TH_NODVS_BUCK_CTRL, HW_STATE_CONTROL,
 226                 BD718XX_4TH_NODVS_BUCK_VOLT, BD718XX_4TH_NODVS_BUCK_MASK,
 227                 nodvs_buck4_vranges, 0, false, BD718XX_BUCK_SEL),
 228 /* LDOs */
 229         BD_DATA("LDO1", BD718XX_LDO1_VOLT, HW_STATE_CONTROL, BD718XX_LDO1_VOLT,
 230                 BD718XX_LDO1_MASK, ldo1_vranges, 0x20, false, BD718XX_LDO_SEL),
 231         BD_DATA("LDO2", BD718XX_LDO2_VOLT, HW_STATE_CONTROL, BD718XX_LDO2_VOLT,
 232                 BD718XX_LDO2_MASK, ldo2_vranges, 0, false, BD718XX_LDO_SEL),
 233         BD_DATA("LDO3", BD718XX_LDO3_VOLT, HW_STATE_CONTROL, BD718XX_LDO3_VOLT,
 234                 BD718XX_LDO3_MASK, ldo3_vranges, 0, false, BD718XX_LDO_SEL),
 235         BD_DATA("LDO4", BD718XX_LDO4_VOLT, HW_STATE_CONTROL, BD718XX_LDO4_VOLT,
 236                 BD718XX_LDO4_MASK, ldo4_vranges, 0, false, BD718XX_LDO_SEL),
 237         BD_DATA("LDO5", BD718XX_LDO5_VOLT, HW_STATE_CONTROL, BD718XX_LDO5_VOLT,
 238                 BD71847_LDO5_MASK, bd71847_ldo5_vranges, 0x20, false,
 239                 BD718XX_LDO_SEL),
 240         BD_DATA("LDO6", BD718XX_LDO6_VOLT, HW_STATE_CONTROL, BD718XX_LDO6_VOLT,
 241                 BD718XX_LDO6_MASK, ldo6_vranges, 0, false, BD718XX_LDO_SEL),
 242 };
 243
 244 static int vrange_find_value(struct bd71837_vrange *r, unsigned int sel,
 245                              unsigned int *val)
 246 {
 247         if (!val || sel < r->min_sel || sel > r->max_sel)
 248                 return -EINVAL;
 249
 250         *val = r->min_volt + r->step * (sel - r->min_sel);
 251         return 0;
 252 }
 253
 254 static int vrange_find_selector(struct bd71837_vrange *r, int val,
 255                                 unsigned int *sel)
 256 {
 257         int ret = -EINVAL;
 258         int num_vals = r->max_sel - r->min_sel + 1;
 259
 260         if (val >= r->min_volt &&
 261             val <= r->min_volt + r->step * (num_vals - 1)) {
 262                 if (r->step) {
 263                         *sel = r->min_sel + ((val - r->min_volt) / r->step);
 264                         ret = 0;
 265                 } else {
 266                         *sel = r->min_sel;
 267                         ret = 0;
 268                 }
 269         }
 270         return ret;
 271 }
 272
 273 static int bd71837_get_enable(struct udevice *dev)
 274 {
 275         int val;
 276         struct bd71837_platdata *plat = dev_get_platdata(dev);
 277
 278         /*
 279          * boot critical regulators on bd71837 must not be controlled by sw
 280          * due to the 'feature' which leaves power rails down if bd71837 is
 281          * reseted to snvs state. hence we can't get the state here.
 282          *
 283          * if we are alive it means we probably are on run state and
 284          * if the regulator can't be controlled we can assume it is
 285          * enabled.
 286          */
 287         if (plat->enablemask == HW_STATE_CONTROL)
 288                 return 1;
 289
 290         val = pmic_reg_read(dev->parent, plat->enable_reg);
 291         if (val < 0)
 292                 return val;
 293
 294         return (val & plat->enablemask);
 295 }
 296
 297 static int bd71837_set_enable(struct udevice *dev, bool enable)
 298 {
 299         int val = 0;
 300         struct bd71837_platdata *plat = dev_get_platdata(dev);
 301
 302         /*
 303          * boot critical regulators on bd71837 must not be controlled by sw
 304          * due to the 'feature' which leaves power rails down if bd71837 is
 305          * reseted to snvs state. Hence we can't set the state here.
 306          */
 307         if (plat->enablemask == HW_STATE_CONTROL)
 308                 return -EINVAL;
 309
 310         if (enable)
 311                 val = plat->enablemask;
 312
 313         return pmic_clrsetbits(dev->parent, plat->enable_reg, plat->enablemask,
 314                                val);
 315 }
 316
 317 static int bd71837_set_value(struct udevice *dev, int uvolt)
 318 {
 319         unsigned int sel;
 320         unsigned int range;
 321         int i;
 322         int found = 0;
 323         struct bd71837_platdata *plat = dev_get_platdata(dev);
 324
 325         /*
 326          * An under/overshooting may occur if voltage is changed for other
 327          * regulators but buck 1,2,3 or 4 when regulator is enabled. Prevent
 328          * change to protect the HW
 329          */
 330         if (!plat->dvs)
 331                 if (bd71837_get_enable(dev)) {
 332                         pr_err("Only DVS bucks can be changed when enabled\n");
 333                         return -EINVAL;
 334                 }
 335
 336         for (i = 0; i < plat->numranges; i++) {
 337                 struct bd71837_vrange *r = &plat->ranges[i];
 338
 339                 found = !vrange_find_selector(r, uvolt, &sel);
 340                 if (found) {
 341                         unsigned int tmp;
 342
 343                         /*
 344                          * We require exactly the requested value to be
 345                          * supported - this can be changed later if needed
 346                          */
 347                         range = r->rangeval;
 348                         found = !vrange_find_value(r, sel, &tmp);
 349                         if (found && tmp == uvolt)
 350                                 break;
 351                         found = 0;
 352                 }
 353         }
 354
 355         if (!found)
 356                 return -EINVAL;
 357
 358         sel <<= ffs(plat->volt_mask) - 1;
 359
 360         if (plat->rangemask)
 361                 sel |= range;
 362
 363         return pmic_clrsetbits(dev->parent, plat->volt_reg, plat->volt_mask |
 364                                plat->rangemask, sel);
 365 }
 366
 367 static int bd71837_get_value(struct udevice *dev)
 368 {
 369         unsigned int reg, range;
 370         unsigned int tmp;
 371         struct bd71837_platdata *plat = dev_get_platdata(dev);
 372         int i;
 373
 374         reg = pmic_reg_read(dev->parent, plat->volt_reg);
 375         if (((int)reg) < 0)
 376                 return reg;
 377
 378         range = reg & plat->rangemask;
 379
 380         reg &= plat->volt_mask;
 381         reg >>= ffs(plat->volt_mask) - 1;
 382
 383         for (i = 0; i < plat->numranges; i++) {
 384                 struct bd71837_vrange *r = &plat->ranges[i];
 385
 386                 if (plat->rangemask && ((plat->rangemask & range) !=
 387                     r->rangeval))
 388                         continue;
 389
 390                 if (!vrange_find_value(r, reg, &tmp))
 391                         return tmp;
 392         }
 393
 394         pr_err("Unknown voltage value read from pmic\n");
 395
 396         return -EINVAL;
 397 }
 398
 399 static int bd71837_regulator_probe(struct udevice *dev)
 400 {
 401         struct bd71837_platdata *plat = dev_get_platdata(dev);
 402         int i, ret;
 403         struct dm_regulator_uclass_platdata *uc_pdata;
 404         int type;
 405         struct bd71837_platdata *init_data;
 406         int data_amnt;
 407
 408         type = dev_get_driver_data(dev_get_parent(dev));
 409
 410         switch (type) {
 411         case ROHM_CHIP_TYPE_BD71837:
 412                 init_data = bd71837_reg_data;
 413                 data_amnt = ARRAY_SIZE(bd71837_reg_data);
 414                 break;
 415         case ROHM_CHIP_TYPE_BD71847:
 416                 init_data = bd71847_reg_data;
 417                 data_amnt = ARRAY_SIZE(bd71847_reg_data);
 418                 break;
 419         default:
 420                 debug("Unknown PMIC type\n");
 421                 init_data = NULL;
 422                 data_amnt = 0;
 423                 break;
 424         }
 425
 426         for (i = 0; i < data_amnt; i++) {
 427                 if (!strcmp(dev->name, init_data[i].name)) {
 428                         *plat = init_data[i];
 429                         if (plat->enablemask != HW_STATE_CONTROL) {
 430                                 /*
 431                                  * Take the regulator under SW control. Ensure
 432                                  * the initial state matches dt flags and then
 433                                  * write the SEL bit
 434                                  */
 435                                 uc_pdata = dev_get_uclass_platdata(dev);
 436                                 ret = bd71837_set_enable(dev,
 437                                                          !!(uc_pdata->boot_on ||
 438                                                          uc_pdata->always_on));
 439                                 if (ret)
 440                                         return ret;
 441
 442                                 return pmic_clrsetbits(dev->parent,
 443                                                       plat->enable_reg,
 444                                                       plat->sel_mask,
 445                                                       plat->sel_mask);
 446                         }
 447                         return 0;
 448                 }
 449         }
 450
 451         pr_err("Unknown regulator '%s'\n", dev->name);
 452
 453         return -ENOENT;
 454 }
 455
 456 static const struct dm_regulator_ops bd71837_regulator_ops = {
 457         .get_value  = bd71837_get_value,
 458         .set_value  = bd71837_set_value,
 459         .get_enable = bd71837_get_enable,
 460         .set_enable = bd71837_set_enable,
 461 };
 462
 463 U_BOOT_DRIVER(bd71837_regulator) = {
 464         .name = BD718XX_REGULATOR_DRIVER,
 465         .id = UCLASS_REGULATOR,
 466         .ops = &bd71837_regulator_ops,
 467         .probe = bd71837_regulator_probe,
 468         .platdata_auto_alloc_size = sizeof(struct bd71837_platdata),
 469 };