1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
12 #include <linux/bitfield.h>
13 #include <power/rk8xx_pmic.h>
14 #include <power/pmic.h>
18 static int rk8xx_sysreset_request(struct udevice *dev, enum sysreset_t type)
20 struct rk8xx_priv *priv = dev_get_priv(dev->parent);
22 if (type != SYSRESET_POWER_OFF)
23 return -EPROTONOSUPPORT;
25 switch (priv->variant) {
30 pmic_clrsetbits(dev->parent, REG_DEVCTRL, 0, BIT(0));
34 pmic_clrsetbits(dev->parent, RK817_REG_SYS_CFG3, 0,
38 pmic_clrsetbits(dev->parent, RK806_REG_SYS_CFG3, 0,
42 printf("Unknown PMIC RK%x: Cannot shutdown\n",
44 return -EPROTONOSUPPORT;
50 static struct sysreset_ops rk8xx_sysreset_ops = {
51 .request = rk8xx_sysreset_request,
54 U_BOOT_DRIVER(rk8xx_sysreset) = {
55 .name = "rk8xx_sysreset",
56 .id = UCLASS_SYSRESET,
57 .ops = &rk8xx_sysreset_ops,
60 /* In the event of a plug-in and the appropriate option has been
61 * selected, we simply shutdown instead of continue the normal boot
62 * process. Please note the rk808 is not supported as it doesn't
63 * have the appropriate register.
65 void rk8xx_off_for_plugin(struct udevice *dev)
67 struct rk8xx_priv *priv = dev_get_priv(dev);
69 switch (priv->variant) {
73 if (pmic_reg_read(dev, RK8XX_ON_SOURCE) & RK8XX_ON_PLUG_IN) {
74 printf("Power Off due to plug-in event\n");
75 pmic_clrsetbits(dev, REG_DEVCTRL, 0, BIT(0));
80 if (pmic_reg_read(dev, RK817_ON_SOURCE) & RK8XX_ON_PLUG_IN) {
81 printf("Power Off due to plug-in event\n");
82 pmic_clrsetbits(dev, RK817_REG_SYS_CFG3, 0,
87 printf("PMIC RK%x: Cannot read boot reason.\n",
92 static struct reg_data rk806_init_reg[] = {
94 { RK806_REG_SYS_CFG3, GENMASK(7, 6), BIT(7)},
97 static struct reg_data rk817_init_reg[] = {
98 /* enable the under-voltage protection,
99 * the under-voltage protection will shutdown the LDO3 and reset the PMIC
101 { RK817_BUCK4_CMIN, 0x60, 0x60},
104 static const struct pmic_child_info pmic_children_info[] = {
105 { .prefix = "DCDC_REG", .driver = "rk8xx_buck"},
106 { .prefix = "dcdc-reg", .driver = "rk8xx_buck"},
107 { .prefix = "LDO_REG", .driver = "rk8xx_ldo"},
108 { .prefix = "nldo-reg", .driver = "rk8xx_nldo"},
109 { .prefix = "pldo-reg", .driver = "rk8xx_pldo"},
110 { .prefix = "SWITCH_REG", .driver = "rk8xx_switch"},
114 static int rk8xx_reg_count(struct udevice *dev)
116 return RK808_NUM_OF_REGS;
119 #if CONFIG_IS_ENABLED(SPI) && CONFIG_IS_ENABLED(DM_SPI)
121 uint8_t len: 4; /* Payload size in bytes - 1 */
124 uint8_t op: 1; /* READ=0; WRITE=1; */
126 #define REG_L_MASK GENMASK(7, 0)
128 #define REG_H_MASK GENMASK(15, 8)
132 static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff,
137 #if CONFIG_IS_ENABLED(SPI) && CONFIG_IS_ENABLED(DM_SPI)
138 if (device_get_uclass_id(dev->parent) == UCLASS_SPI) {
139 struct spi_slave *spi = dev_get_parent_priv(dev);
140 struct rk806_cmd cmd = {
143 .reg_l = FIELD_GET(REG_L_MASK, reg),
144 .reg_h = FIELD_GET(REG_H_MASK, reg),
147 ret = dm_spi_claim_bus(dev);
149 debug("Couldn't claim bus for device: %p!\n", dev);
153 ret = spi_write_then_read(spi, (u8 *)&cmd, sizeof(cmd), buff, NULL, len);
155 debug("write error to device: %p register: %#x!\n",
158 dm_spi_release_bus(dev);
164 ret = dm_i2c_write(dev, reg, buff, len);
166 debug("write error to device: %p register: %#x!\n", dev, reg);
173 static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
177 #if CONFIG_IS_ENABLED(SPI) && CONFIG_IS_ENABLED(DM_SPI)
178 if (device_get_uclass_id(dev->parent) == UCLASS_SPI) {
179 struct spi_slave *spi = dev_get_parent_priv(dev);
180 struct rk806_cmd cmd = {
183 .reg_l = FIELD_GET(REG_L_MASK, reg),
184 .reg_h = FIELD_GET(REG_H_MASK, reg),
187 ret = dm_spi_claim_bus(dev);
189 debug("Couldn't claim bus for device: %p!\n", dev);
193 ret = spi_write_then_read(spi, (u8 *)&cmd, sizeof(cmd), NULL, buff, len);
195 debug("read error to device: %p register: %#x!\n",
198 dm_spi_release_bus(dev);
204 ret = dm_i2c_read(dev, reg, buff, len);
206 debug("read error from device: %p register: %#x!\n", dev, reg);
213 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
214 static int rk8xx_bind(struct udevice *dev)
216 ofnode regulators_node;
219 regulators_node = dev_read_subnode(dev, "regulators");
220 if (!ofnode_valid(regulators_node)) {
221 debug("%s: %s regulators subnode not found!\n", __func__,
226 debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
228 if (CONFIG_IS_ENABLED(SYSRESET)) {
229 ret = device_bind_driver_to_node(dev, "rk8xx_sysreset",
231 dev_ofnode(dev), NULL);
236 children = pmic_bind_children(dev, regulators_node, pmic_children_info);
238 debug("%s: %s - no child found\n", __func__, dev->name);
240 if (IS_ENABLED(CONFIG_SPL_BUILD) &&
241 IS_ENABLED(CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON))
242 dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
244 /* Always return success for this device */
249 static int rk8xx_probe(struct udevice *dev)
251 struct rk8xx_priv *priv = dev_get_priv(dev);
252 struct reg_data *init_data = NULL;
253 int init_data_num = 0;
254 int ret = 0, i, show_variant;
255 u8 msb, lsb, id_msb, id_lsb;
256 u8 on_source = 0, off_source = 0;
257 u8 power_en0, power_en1, power_en2, power_en3;
260 /* read Chip variant */
261 if (device_is_compatible(dev, "rockchip,rk817") ||
262 device_is_compatible(dev, "rockchip,rk809")) {
263 id_msb = RK817_ID_MSB;
264 id_lsb = RK817_ID_LSB;
265 } else if (device_is_compatible(dev, "rockchip,rk806")) {
266 id_msb = RK806_ID_MSB;
267 id_lsb = RK806_ID_LSB;
273 ret = rk8xx_read(dev, id_msb, &msb, 1);
276 ret = rk8xx_read(dev, id_lsb, &lsb, 1);
280 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
281 show_variant = bitfield_extract_by_mask(priv->variant, RK8XX_ID_MSK);
282 switch (priv->variant) {
284 /* RK808 ID is 0x0000, so fix show_variant for that PMIC */
285 show_variant = 0x808;
290 on_source = RK8XX_ON_SOURCE;
291 off_source = RK8XX_OFF_SOURCE;
295 on_source = RK817_ON_SOURCE;
296 off_source = RK817_OFF_SOURCE;
297 init_data = rk817_init_reg;
298 init_data_num = ARRAY_SIZE(rk817_init_reg);
299 power_en0 = pmic_reg_read(dev, RK817_POWER_EN0);
300 power_en1 = pmic_reg_read(dev, RK817_POWER_EN1);
301 power_en2 = pmic_reg_read(dev, RK817_POWER_EN2);
302 power_en3 = pmic_reg_read(dev, RK817_POWER_EN3);
304 value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4);
305 pmic_reg_write(dev, RK817_POWER_EN_SAVE0, value);
306 value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4);
307 pmic_reg_write(dev, RK817_POWER_EN_SAVE1, value);
310 on_source = RK806_ON_SOURCE;
311 off_source = RK806_OFF_SOURCE;
312 init_data = rk806_init_reg;
313 init_data_num = ARRAY_SIZE(rk806_init_reg);
316 printf("Unknown PMIC: RK%x!!\n", show_variant);
320 for (i = 0; i < init_data_num; i++) {
321 ret = pmic_clrsetbits(dev,
326 printf("%s: i2c set reg 0x%x failed, ret=%d\n",
327 __func__, init_data[i].reg, ret);
330 debug("%s: reg[0x%x] = 0x%x\n", __func__, init_data[i].reg,
331 pmic_reg_read(dev, init_data[i].reg));
334 if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
335 printf("PMIC: RK%x ", show_variant);
336 if (on_source && off_source)
337 printf("(on=0x%02x, off=0x%02x)",
338 pmic_reg_read(dev, on_source),
339 pmic_reg_read(dev, off_source));
343 if (IS_ENABLED(CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON))
344 rk8xx_off_for_plugin(dev);
349 static struct dm_pmic_ops rk8xx_ops = {
350 .reg_count = rk8xx_reg_count,
352 .write = rk8xx_write,
355 static const struct udevice_id rk8xx_ids[] = {
356 { .compatible = "rockchip,rk805" },
357 { .compatible = "rockchip,rk806" },
358 { .compatible = "rockchip,rk808" },
359 { .compatible = "rockchip,rk809" },
360 { .compatible = "rockchip,rk816" },
361 { .compatible = "rockchip,rk817" },
362 { .compatible = "rockchip,rk818" },
366 U_BOOT_DRIVER(rockchip_rk805) = {
367 .name = "rockchip_rk805",
369 .of_match = rk8xx_ids,
370 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
373 .priv_auto = sizeof(struct rk8xx_priv),
374 .probe = rk8xx_probe,
378 DM_DRIVER_ALIAS(rockchip_rk805, rockchip_rk808)