drivers/platform/x86/amd/pmf/core.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * AMD Platform Management Framework Driver
   4  *
   5  * Copyright (c) 2022, Advanced Micro Devices, Inc.
   6  * All Rights Reserved.
   7  *
   8  * Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
   9  */
  10
  11 #include <asm/amd_nb.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/iopoll.h>
  14 #include <linux/module.h>
  15 #include <linux/pci.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/power_supply.h>
  18 #include "pmf.h"
  19
  20 /* PMF-SMU communication registers */
  21 #define AMD_PMF_REGISTER_MESSAGE        0xA18
  22 #define AMD_PMF_REGISTER_RESPONSE       0xA78
  23 #define AMD_PMF_REGISTER_ARGUMENT       0xA58
  24
  25 /* Base address of SMU for mapping physical address to virtual address */
  26 #define AMD_PMF_MAPPING_SIZE            0x01000
  27 #define AMD_PMF_BASE_ADDR_OFFSET        0x10000
  28 #define AMD_PMF_BASE_ADDR_LO            0x13B102E8
  29 #define AMD_PMF_BASE_ADDR_HI            0x13B102EC
  30 #define AMD_PMF_BASE_ADDR_LO_MASK       GENMASK(15, 0)
  31 #define AMD_PMF_BASE_ADDR_HI_MASK       GENMASK(31, 20)
  32
  33 /* SMU Response Codes */
  34 #define AMD_PMF_RESULT_OK                    0x01
  35 #define AMD_PMF_RESULT_CMD_REJECT_BUSY       0xFC
  36 #define AMD_PMF_RESULT_CMD_REJECT_PREREQ     0xFD
  37 #define AMD_PMF_RESULT_CMD_UNKNOWN           0xFE
  38 #define AMD_PMF_RESULT_FAILED                0xFF
  39
  40 /* List of supported CPU ids */
  41 #define AMD_CPU_ID_RMB                  0x14b5
  42 #define AMD_CPU_ID_PS                   0x14e8
  43 #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
  44
  45 #define PMF_MSG_DELAY_MIN_US            50
  46 #define RESPONSE_REGISTER_LOOP_MAX      20000
  47
  48 #define DELAY_MIN_US    2000
  49 #define DELAY_MAX_US    3000
  50
  51 /* override Metrics Table sample size time (in ms) */
  52 static int metrics_table_loop_ms = 1000;
  53 module_param(metrics_table_loop_ms, int, 0644);
  54 MODULE_PARM_DESC(metrics_table_loop_ms, "Metrics Table sample size time (default = 1000ms)");
  55
  56 /* Force load on supported older platforms */
  57 static bool force_load;
  58 module_param(force_load, bool, 0444);
  59 MODULE_PARM_DESC(force_load, "Force load this driver on supported older platforms (experimental)");
  60
  61 static int amd_pmf_pwr_src_notify_call(struct notifier_block *nb, unsigned long event, void *data)
  62 {
  63         struct amd_pmf_dev *pmf = container_of(nb, struct amd_pmf_dev, pwr_src_notifier);
  64
  65         if (event != PSY_EVENT_PROP_CHANGED)
  66                 return NOTIFY_OK;
  67
  68         if (is_apmf_func_supported(pmf, APMF_FUNC_AUTO_MODE) ||
  69             is_apmf_func_supported(pmf, APMF_FUNC_DYN_SLIDER_DC) ||
  70             is_apmf_func_supported(pmf, APMF_FUNC_DYN_SLIDER_AC)) {
  71                 if ((pmf->amt_enabled || pmf->cnqf_enabled) && is_pprof_balanced(pmf))
  72                         return NOTIFY_DONE;
  73         }
  74
  75         amd_pmf_set_sps_power_limits(pmf);
  76
  77         return NOTIFY_OK;
  78 }
  79
  80 static int current_power_limits_show(struct seq_file *seq, void *unused)
  81 {
  82         struct amd_pmf_dev *dev = seq->private;
  83         struct amd_pmf_static_slider_granular table;
  84         int mode, src = 0;
  85
  86         mode = amd_pmf_get_pprof_modes(dev);
  87         if (mode < 0)
  88                 return mode;
  89
  90         src = amd_pmf_get_power_source();
  91         amd_pmf_update_slider(dev, SLIDER_OP_GET, mode, &table);
  92         seq_printf(seq, "spl:%u fppt:%u sppt:%u sppt_apu_only:%u stt_min:%u stt[APU]:%u stt[HS2]: %u\n",
  93                    table.prop[src][mode].spl,
  94                    table.prop[src][mode].fppt,
  95                    table.prop[src][mode].sppt,
  96                    table.prop[src][mode].sppt_apu_only,
  97                    table.prop[src][mode].stt_min,
  98                    table.prop[src][mode].stt_skin_temp[STT_TEMP_APU],
  99                    table.prop[src][mode].stt_skin_temp[STT_TEMP_HS2]);
 100         return 0;
 101 }
 102 DEFINE_SHOW_ATTRIBUTE(current_power_limits);
 103
 104 static void amd_pmf_dbgfs_unregister(struct amd_pmf_dev *dev)
 105 {
 106         debugfs_remove_recursive(dev->dbgfs_dir);
 107 }
 108
 109 static void amd_pmf_dbgfs_register(struct amd_pmf_dev *dev)
 110 {
 111         dev->dbgfs_dir = debugfs_create_dir("amd_pmf", NULL);
 112         debugfs_create_file("current_power_limits", 0644, dev->dbgfs_dir, dev,
 113                             &current_power_limits_fops);
 114 }
 115
 116 int amd_pmf_get_power_source(void)
 117 {
 118         if (power_supply_is_system_supplied() > 0)
 119                 return POWER_SOURCE_AC;
 120         else
 121                 return POWER_SOURCE_DC;
 122 }
 123
 124 static void amd_pmf_get_metrics(struct work_struct *work)
 125 {
 126         struct amd_pmf_dev *dev = container_of(work, struct amd_pmf_dev, work_buffer.work);
 127         ktime_t time_elapsed_ms;
 128         int socket_power;
 129
 130         mutex_lock(&dev->update_mutex);
 131         /* Transfer table contents */
 132         memset(dev->buf, 0, sizeof(dev->m_table));
 133         amd_pmf_send_cmd(dev, SET_TRANSFER_TABLE, 0, 7, NULL);
 134         memcpy(&dev->m_table, dev->buf, sizeof(dev->m_table));
 135
 136         time_elapsed_ms = ktime_to_ms(ktime_get()) - dev->start_time;
 137         /* Calculate the avg SoC power consumption */
 138         socket_power = dev->m_table.apu_power + dev->m_table.dgpu_power;
 139
 140         if (dev->amt_enabled) {
 141                 /* Apply the Auto Mode transition */
 142                 amd_pmf_trans_automode(dev, socket_power, time_elapsed_ms);
 143         }
 144
 145         if (dev->cnqf_enabled) {
 146                 /* Apply the CnQF transition */
 147                 amd_pmf_trans_cnqf(dev, socket_power, time_elapsed_ms);
 148         }
 149
 150         dev->start_time = ktime_to_ms(ktime_get());
 151         schedule_delayed_work(&dev->work_buffer, msecs_to_jiffies(metrics_table_loop_ms));
 152         mutex_unlock(&dev->update_mutex);
 153 }
 154
 155 static inline u32 amd_pmf_reg_read(struct amd_pmf_dev *dev, int reg_offset)
 156 {
 157         return ioread32(dev->regbase + reg_offset);
 158 }
 159
 160 static inline void amd_pmf_reg_write(struct amd_pmf_dev *dev, int reg_offset, u32 val)
 161 {
 162         iowrite32(val, dev->regbase + reg_offset);
 163 }
 164
 165 static void __maybe_unused amd_pmf_dump_registers(struct amd_pmf_dev *dev)
 166 {
 167         u32 value;
 168
 169         value = amd_pmf_reg_read(dev, AMD_PMF_REGISTER_RESPONSE);
 170         dev_dbg(dev->dev, "AMD_PMF_REGISTER_RESPONSE:%x\n", value);
 171
 172         value = amd_pmf_reg_read(dev, AMD_PMF_REGISTER_ARGUMENT);
 173         dev_dbg(dev->dev, "AMD_PMF_REGISTER_ARGUMENT:%d\n", value);
 174
 175         value = amd_pmf_reg_read(dev, AMD_PMF_REGISTER_MESSAGE);
 176         dev_dbg(dev->dev, "AMD_PMF_REGISTER_MESSAGE:%x\n", value);
 177 }
 178
 179 int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 *data)
 180 {
 181         int rc;
 182         u32 val;
 183
 184         mutex_lock(&dev->lock);
 185
 186         /* Wait until we get a valid response */
 187         rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMF_REGISTER_RESPONSE,
 188                                 val, val != 0, PMF_MSG_DELAY_MIN_US,
 189                                 PMF_MSG_DELAY_MIN_US * RESPONSE_REGISTER_LOOP_MAX);
 190         if (rc) {
 191                 dev_err(dev->dev, "failed to talk to SMU\n");
 192                 goto out_unlock;
 193         }
 194
 195         /* Write zero to response register */
 196         amd_pmf_reg_write(dev, AMD_PMF_REGISTER_RESPONSE, 0);
 197
 198         /* Write argument into argument register */
 199         amd_pmf_reg_write(dev, AMD_PMF_REGISTER_ARGUMENT, arg);
 200
 201         /* Write message ID to message ID register */
 202         amd_pmf_reg_write(dev, AMD_PMF_REGISTER_MESSAGE, message);
 203
 204         /* Wait until we get a valid response */
 205         rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMF_REGISTER_RESPONSE,
 206                                 val, val != 0, PMF_MSG_DELAY_MIN_US,
 207                                 PMF_MSG_DELAY_MIN_US * RESPONSE_REGISTER_LOOP_MAX);
 208         if (rc) {
 209                 dev_err(dev->dev, "SMU response timed out\n");
 210                 goto out_unlock;
 211         }
 212
 213         switch (val) {
 214         case AMD_PMF_RESULT_OK:
 215                 if (get) {
 216                         /* PMFW may take longer time to return back the data */
 217                         usleep_range(DELAY_MIN_US, 10 * DELAY_MAX_US);
 218                         *data = amd_pmf_reg_read(dev, AMD_PMF_REGISTER_ARGUMENT);
 219                 }
 220                 break;
 221         case AMD_PMF_RESULT_CMD_REJECT_BUSY:
 222                 dev_err(dev->dev, "SMU not ready. err: 0x%x\n", val);
 223                 rc = -EBUSY;
 224                 goto out_unlock;
 225         case AMD_PMF_RESULT_CMD_UNKNOWN:
 226                 dev_err(dev->dev, "SMU cmd unknown. err: 0x%x\n", val);
 227                 rc = -EINVAL;
 228                 goto out_unlock;
 229         case AMD_PMF_RESULT_CMD_REJECT_PREREQ:
 230         case AMD_PMF_RESULT_FAILED:
 231         default:
 232                 dev_err(dev->dev, "SMU cmd failed. err: 0x%x\n", val);
 233                 rc = -EIO;
 234                 goto out_unlock;
 235         }
 236
 237 out_unlock:
 238         mutex_unlock(&dev->lock);
 239         amd_pmf_dump_registers(dev);
 240         return rc;
 241 }
 242
 243 static const struct pci_device_id pmf_pci_ids[] = {
 244         { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_RMB) },
 245         { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_PS) },
 246         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_ROOT) },
 247         { }
 248 };
 249
 250 static void amd_pmf_set_dram_addr(struct amd_pmf_dev *dev)
 251 {
 252         u64 phys_addr;
 253         u32 hi, low;
 254
 255         phys_addr = virt_to_phys(dev->buf);
 256         hi = phys_addr >> 32;
 257         low = phys_addr & GENMASK(31, 0);
 258
 259         amd_pmf_send_cmd(dev, SET_DRAM_ADDR_HIGH, 0, hi, NULL);
 260         amd_pmf_send_cmd(dev, SET_DRAM_ADDR_LOW, 0, low, NULL);
 261 }
 262
 263 int amd_pmf_init_metrics_table(struct amd_pmf_dev *dev)
 264 {
 265         /* Get Metrics Table Address */
 266         dev->buf = kzalloc(sizeof(dev->m_table), GFP_KERNEL);
 267         if (!dev->buf)
 268                 return -ENOMEM;
 269
 270         INIT_DELAYED_WORK(&dev->work_buffer, amd_pmf_get_metrics);
 271
 272         amd_pmf_set_dram_addr(dev);
 273
 274         /*
 275          * Start collecting the metrics data after a small delay
 276          * or else, we might end up getting stale values from PMFW.
 277          */
 278         schedule_delayed_work(&dev->work_buffer, msecs_to_jiffies(metrics_table_loop_ms * 3));
 279
 280         return 0;
 281 }
 282
 283 static int amd_pmf_resume_handler(struct device *dev)
 284 {
 285         struct amd_pmf_dev *pdev = dev_get_drvdata(dev);
 286
 287         if (pdev->buf)
 288                 amd_pmf_set_dram_addr(pdev);
 289
 290         return 0;
 291 }
 292
 293 static DEFINE_SIMPLE_DEV_PM_OPS(amd_pmf_pm, NULL, amd_pmf_resume_handler);
 294
 295 static void amd_pmf_init_features(struct amd_pmf_dev *dev)
 296 {
 297         int ret;
 298
 299         /* Enable Static Slider */
 300         if (is_apmf_func_supported(dev, APMF_FUNC_STATIC_SLIDER_GRANULAR)) {
 301                 amd_pmf_init_sps(dev);
 302                 dev->pwr_src_notifier.notifier_call = amd_pmf_pwr_src_notify_call;
 303                 power_supply_reg_notifier(&dev->pwr_src_notifier);
 304                 dev_dbg(dev->dev, "SPS enabled and Platform Profiles registered\n");
 305         }
 306
 307         /* Enable Auto Mode */
 308         if (is_apmf_func_supported(dev, APMF_FUNC_AUTO_MODE)) {
 309                 amd_pmf_init_auto_mode(dev);
 310                 dev_dbg(dev->dev, "Auto Mode Init done\n");
 311         } else if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_AC) ||
 312                           is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_DC)) {
 313                 /* Enable Cool n Quiet Framework (CnQF) */
 314                 ret = amd_pmf_init_cnqf(dev);
 315                 if (ret)
 316                         dev_warn(dev->dev, "CnQF Init failed\n");
 317         }
 318 }
 319
 320 static void amd_pmf_deinit_features(struct amd_pmf_dev *dev)
 321 {
 322         if (is_apmf_func_supported(dev, APMF_FUNC_STATIC_SLIDER_GRANULAR)) {
 323                 power_supply_unreg_notifier(&dev->pwr_src_notifier);
 324                 amd_pmf_deinit_sps(dev);
 325         }
 326
 327         if (is_apmf_func_supported(dev, APMF_FUNC_AUTO_MODE)) {
 328                 amd_pmf_deinit_auto_mode(dev);
 329         } else if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_AC) ||
 330                           is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_DC)) {
 331                 amd_pmf_deinit_cnqf(dev);
 332         }
 333 }
 334
 335 static const struct acpi_device_id amd_pmf_acpi_ids[] = {
 336         {"AMDI0100", 0x100},
 337         {"AMDI0102", 0},
 338         {"AMDI0103", 0},
 339         { }
 340 };
 341 MODULE_DEVICE_TABLE(acpi, amd_pmf_acpi_ids);
 342
 343 static int amd_pmf_probe(struct platform_device *pdev)
 344 {
 345         const struct acpi_device_id *id;
 346         struct amd_pmf_dev *dev;
 347         struct pci_dev *rdev;
 348         u32 base_addr_lo;
 349         u32 base_addr_hi;
 350         u64 base_addr;
 351         u32 val;
 352         int err;
 353
 354         id = acpi_match_device(amd_pmf_acpi_ids, &pdev->dev);
 355         if (!id)
 356                 return -ENODEV;
 357
 358         if (id->driver_data == 0x100 && !force_load)
 359                 return -ENODEV;
 360
 361         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 362         if (!dev)
 363                 return -ENOMEM;
 364
 365         dev->dev = &pdev->dev;
 366
 367         rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
 368         if (!rdev || !pci_match_id(pmf_pci_ids, rdev)) {
 369                 pci_dev_put(rdev);
 370                 return -ENODEV;
 371         }
 372
 373         dev->cpu_id = rdev->device;
 374
 375         err = amd_smn_read(0, AMD_PMF_BASE_ADDR_LO, &val);
 376         if (err) {
 377                 dev_err(dev->dev, "error in reading from 0x%x\n", AMD_PMF_BASE_ADDR_LO);
 378                 pci_dev_put(rdev);
 379                 return pcibios_err_to_errno(err);
 380         }
 381
 382         base_addr_lo = val & AMD_PMF_BASE_ADDR_HI_MASK;
 383
 384         err = amd_smn_read(0, AMD_PMF_BASE_ADDR_HI, &val);
 385         if (err) {
 386                 dev_err(dev->dev, "error in reading from 0x%x\n", AMD_PMF_BASE_ADDR_HI);
 387                 pci_dev_put(rdev);
 388                 return pcibios_err_to_errno(err);
 389         }
 390
 391         base_addr_hi = val & AMD_PMF_BASE_ADDR_LO_MASK;
 392         pci_dev_put(rdev);
 393         base_addr = ((u64)base_addr_hi << 32 | base_addr_lo);
 394
 395         dev->regbase = devm_ioremap(dev->dev, base_addr + AMD_PMF_BASE_ADDR_OFFSET,
 396                                     AMD_PMF_MAPPING_SIZE);
 397         if (!dev->regbase)
 398                 return -ENOMEM;
 399
 400         mutex_init(&dev->lock);
 401         mutex_init(&dev->update_mutex);
 402
 403         apmf_acpi_init(dev);
 404         platform_set_drvdata(pdev, dev);
 405         amd_pmf_init_features(dev);
 406         apmf_install_handler(dev);
 407         amd_pmf_dbgfs_register(dev);
 408
 409         dev_info(dev->dev, "registered PMF device successfully\n");
 410
 411         return 0;
 412 }
 413
 414 static void amd_pmf_remove(struct platform_device *pdev)
 415 {
 416         struct amd_pmf_dev *dev = platform_get_drvdata(pdev);
 417
 418         amd_pmf_deinit_features(dev);
 419         apmf_acpi_deinit(dev);
 420         amd_pmf_dbgfs_unregister(dev);
 421         mutex_destroy(&dev->lock);
 422         mutex_destroy(&dev->update_mutex);
 423         kfree(dev->buf);
 424 }
 425
 426 static const struct attribute_group *amd_pmf_driver_groups[] = {
 427         &cnqf_feature_attribute_group,
 428         NULL,
 429 };
 430
 431 static struct platform_driver amd_pmf_driver = {
 432         .driver = {
 433                 .name = "amd-pmf",
 434                 .acpi_match_table = amd_pmf_acpi_ids,
 435                 .dev_groups = amd_pmf_driver_groups,
 436                 .pm = pm_sleep_ptr(&amd_pmf_pm),
 437         },
 438         .probe = amd_pmf_probe,
 439         .remove_new = amd_pmf_remove,
 440 };
 441 module_platform_driver(amd_pmf_driver);
 442
 443 MODULE_LICENSE("GPL");
 444 MODULE_DESCRIPTION("AMD Platform Management Framework Driver");