drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015-2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <dm/device_compat.h>
  10 #include <linux/bug.h>
  11 #include <linux/io.h>
  12 #include <linux/err.h>
  13 #include <linux/kernel.h>
  14 #include <linux/sizes.h>
  15 #include <dm/pinctrl.h>
  16
  17 #include "pinctrl-uniphier.h"
  18
  19 #define UNIPHIER_PINCTRL_PINMUX_BASE    0x1000
  20 #define UNIPHIER_PINCTRL_LOAD_PINMUX    0x1700
  21 #define UNIPHIER_PINCTRL_DRVCTRL_BASE   0x1800
  22 #define UNIPHIER_PINCTRL_DRV2CTRL_BASE  0x1900
  23 #define UNIPHIER_PINCTRL_DRV3CTRL_BASE  0x1980
  24 #define UNIPHIER_PINCTRL_PUPDCTRL_BASE  0x1a00
  25 #define UNIPHIER_PINCTRL_IECTRL         0x1d00
  26
  27 static const char *uniphier_pinctrl_dummy_name = "_dummy";
  28
  29 static int uniphier_pinctrl_get_pins_count(struct udevice *dev)
  30 {
  31         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  32         const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
  33         int pins_count = priv->socdata->pins_count;
  34
  35         /*
  36          * We do not list all pins in the pin table to save memory footprint.
  37          * Report the max pin number + 1 to fake the framework.
  38          */
  39         return pins[pins_count - 1].number + 1;
  40 }
  41
  42 static const char *uniphier_pinctrl_get_pin_name(struct udevice *dev,
  43                                                  unsigned int selector)
  44 {
  45         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  46         const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
  47         int pins_count = priv->socdata->pins_count;
  48         int i;
  49
  50         for (i = 0; i < pins_count; i++)
  51                 if (pins[i].number == selector)
  52                         return pins[i].name;
  53
  54         return uniphier_pinctrl_dummy_name;
  55 }
  56
  57 static int uniphier_pinctrl_get_groups_count(struct udevice *dev)
  58 {
  59         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  60
  61         return priv->socdata->groups_count;
  62 }
  63
  64 static const char *uniphier_pinctrl_get_group_name(struct udevice *dev,
  65                                                    unsigned selector)
  66 {
  67         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  68
  69         if (!priv->socdata->groups[selector].name)
  70                 return uniphier_pinctrl_dummy_name;
  71
  72         return priv->socdata->groups[selector].name;
  73 }
  74
  75 static int uniphier_pinmux_get_functions_count(struct udevice *dev)
  76 {
  77         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  78
  79         return priv->socdata->functions_count;
  80 }
  81
  82 static const char *uniphier_pinmux_get_function_name(struct udevice *dev,
  83                                                      unsigned selector)
  84 {
  85         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  86
  87         if (!priv->socdata->functions[selector])
  88                 return uniphier_pinctrl_dummy_name;
  89
  90         return priv->socdata->functions[selector];
  91 }
  92
  93 static int uniphier_pinconf_input_enable_perpin(struct udevice *dev,
  94                                                 unsigned int pin, int enable)
  95 {
  96         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  97         unsigned reg;
  98         u32 mask, tmp;
  99
 100         reg = UNIPHIER_PINCTRL_IECTRL + pin / 32 * 4;
 101         mask = BIT(pin % 32);
 102
 103         tmp = readl(priv->base + reg);
 104         if (enable)
 105                 tmp |= mask;
 106         else
 107                 tmp &= ~mask;
 108         writel(tmp, priv->base + reg);
 109
 110         return 0;
 111 }
 112
 113 static int uniphier_pinconf_input_enable_legacy(struct udevice *dev,
 114                                                 unsigned int pin, int enable)
 115 {
 116         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 117
 118         /*
 119          * Multiple pins share one input enable, per-pin disabling is
 120          * impossible.
 121          */
 122         if (!enable)
 123                 return -EINVAL;
 124
 125         /* Set all bits instead of having a bunch of pin data */
 126         writel(U32_MAX, priv->base + UNIPHIER_PINCTRL_IECTRL);
 127
 128         return 0;
 129 }
 130
 131 static int uniphier_pinconf_input_enable(struct udevice *dev,
 132                                          unsigned int pin, int enable)
 133 {
 134         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 135
 136         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL)
 137                 return uniphier_pinconf_input_enable_perpin(dev, pin, enable);
 138         else
 139                 return uniphier_pinconf_input_enable_legacy(dev, pin, enable);
 140 }
 141
 142 #if CONFIG_IS_ENABLED(PINCONF)
 143
 144 static const struct pinconf_param uniphier_pinconf_params[] = {
 145         { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
 146         { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
 147         { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
 148         { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
 149         { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
 150         { "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
 151         { "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
 152 };
 153
 154 static const struct uniphier_pinctrl_pin *
 155 uniphier_pinctrl_pin_get(struct uniphier_pinctrl_priv *priv, unsigned int pin)
 156 {
 157         const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
 158         int pins_count = priv->socdata->pins_count;
 159         int i;
 160
 161         for (i = 0; i < pins_count; i++)
 162                 if (pins[i].number == pin)
 163                         return &pins[i];
 164
 165         return NULL;
 166 }
 167
 168 static int uniphier_pinconf_bias_set(struct udevice *dev, unsigned int pin,
 169                                      unsigned int param, unsigned int arg)
 170 {
 171         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 172         unsigned int enable = 1;
 173         unsigned int reg;
 174         u32 mask, tmp;
 175
 176         if (!(priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PUPD_SIMPLE))
 177                 return -ENOTSUPP;
 178
 179         switch (param) {
 180         case PIN_CONFIG_BIAS_DISABLE:
 181                 enable = 0;
 182                 break;
 183         case PIN_CONFIG_BIAS_PULL_UP:
 184         case PIN_CONFIG_BIAS_PULL_DOWN:
 185                 if (arg == 0)   /* total bias is not supported */
 186                         return -EINVAL;
 187                 break;
 188         case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 189                 if (arg == 0)   /* configuration ignored */
 190                         return 0;
 191         default:
 192                 BUG();
 193         }
 194
 195         reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pin / 32 * 4;
 196         mask = BIT(pin % 32);
 197
 198         tmp = readl(priv->base + reg);
 199         if (enable)
 200                 tmp |= mask;
 201         else
 202                 tmp &= ~mask;
 203         writel(tmp, priv->base + reg);
 204
 205         return 0;
 206 }
 207
 208 static const unsigned int uniphier_pinconf_drv_strengths_1bit[] = {
 209         4, 8,
 210 };
 211
 212 static const unsigned int uniphier_pinconf_drv_strengths_2bit[] = {
 213         8, 12, 16, 20,
 214 };
 215
 216 static const unsigned int uniphier_pinconf_drv_strengths_3bit[] = {
 217         4, 5, 7, 9, 11, 12, 14, 16,
 218 };
 219
 220 static int uniphier_pinconf_drive_set(struct udevice *dev, unsigned int pin,
 221                                       unsigned int strength)
 222 {
 223         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 224         const struct uniphier_pinctrl_pin *desc;
 225         const unsigned int *strengths;
 226         unsigned int base, stride, width, drvctrl, reg, shift;
 227         u32 val, mask, tmp;
 228
 229         desc = uniphier_pinctrl_pin_get(priv, pin);
 230         if (WARN_ON(!desc))
 231                 return -EINVAL;
 232
 233         switch (uniphier_pin_get_drv_type(desc->data)) {
 234         case UNIPHIER_PIN_DRV_1BIT:
 235                 strengths = uniphier_pinconf_drv_strengths_1bit;
 236                 base = UNIPHIER_PINCTRL_DRVCTRL_BASE;
 237                 stride = 1;
 238                 width = 1;
 239                 break;
 240         case UNIPHIER_PIN_DRV_2BIT:
 241                 strengths = uniphier_pinconf_drv_strengths_2bit;
 242                 base = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
 243                 stride = 2;
 244                 width = 2;
 245                 break;
 246         case UNIPHIER_PIN_DRV_3BIT:
 247                 strengths = uniphier_pinconf_drv_strengths_3bit;
 248                 base = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
 249                 stride = 4;
 250                 width = 3;
 251                 break;
 252         default:
 253                 /* drive strength control is not supported for this pin */
 254                 return -EINVAL;
 255         }
 256
 257         drvctrl = uniphier_pin_get_drvctrl(desc->data);
 258         drvctrl *= stride;
 259
 260         reg = base + drvctrl / 32 * 4;
 261         shift = drvctrl % 32;
 262         mask = (1U << width) - 1;
 263
 264         for (val = 0; val <= mask; val++) {
 265                 if (strengths[val] > strength)
 266                         break;
 267         }
 268
 269         if (val == 0) {
 270                 dev_err(dev, "unsupported drive strength %u mA for pin %s\n",
 271                         strength, desc->name);
 272                 return -EINVAL;
 273         }
 274
 275         if (!mask)
 276                 return 0;
 277
 278         val--;
 279
 280         tmp = readl(priv->base + reg);
 281         tmp &= ~(mask << shift);
 282         tmp |= (mask & val) << shift;
 283         writel(tmp, priv->base + reg);
 284
 285         return 0;
 286 }
 287
 288 static int uniphier_pinconf_set(struct udevice *dev, unsigned int pin,
 289                                 unsigned int param, unsigned int arg)
 290 {
 291         int ret;
 292
 293         switch (param) {
 294         case PIN_CONFIG_BIAS_DISABLE:
 295         case PIN_CONFIG_BIAS_PULL_UP:
 296         case PIN_CONFIG_BIAS_PULL_DOWN:
 297         case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 298                 ret = uniphier_pinconf_bias_set(dev, pin, param, arg);
 299                 break;
 300         case PIN_CONFIG_DRIVE_STRENGTH:
 301                 ret = uniphier_pinconf_drive_set(dev, pin, arg);
 302                 break;
 303         case PIN_CONFIG_INPUT_ENABLE:
 304                 ret = uniphier_pinconf_input_enable(dev, pin, arg);
 305                 break;
 306         default:
 307                 dev_err(dev, "unsupported configuration parameter %u\n", param);
 308                 return -EINVAL;
 309         }
 310
 311         return ret;
 312 }
 313
 314 static int uniphier_pinconf_group_set(struct udevice *dev,
 315                                       unsigned int group_selector,
 316                                       unsigned int param, unsigned int arg)
 317 {
 318         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 319         const struct uniphier_pinctrl_group *grp =
 320                                         &priv->socdata->groups[group_selector];
 321         int i, ret;
 322
 323         for (i = 0; i < grp->num_pins; i++) {
 324                 ret = uniphier_pinconf_set(dev, grp->pins[i], param, arg);
 325                 if (ret)
 326                         return ret;
 327         }
 328
 329         return 0;
 330 }
 331
 332 #endif /* CONFIG_IS_ENABLED(PINCONF) */
 333
 334 static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
 335                                     int muxval)
 336 {
 337         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 338         unsigned reg, reg_end, shift, mask;
 339         unsigned mux_bits = 8;
 340         unsigned reg_stride = 4;
 341         bool load_pinctrl = false;
 342         u32 tmp;
 343
 344         /* some pins need input-enabling */
 345         uniphier_pinconf_input_enable(dev, pin, 1);
 346
 347         if (muxval < 0)
 348                 return;         /* dedicated pin; nothing to do for pin-mux */
 349
 350         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_MUX_4BIT)
 351                 mux_bits = 4;
 352
 353         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
 354                 /*
 355                  *  Mode       offset        bit
 356                  *  Normal     4 * n     shift+3:shift
 357                  *  Debug      4 * n     shift+7:shift+4
 358                  */
 359                 mux_bits /= 2;
 360                 reg_stride = 8;
 361                 load_pinctrl = true;
 362         }
 363
 364         reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
 365         reg_end = reg + reg_stride;
 366         shift = pin * mux_bits % 32;
 367         mask = (1U << mux_bits) - 1;
 368
 369         /*
 370          * If reg_stride is greater than 4, the MSB of each pinsel shall be
 371          * stored in the offset+4.
 372          */
 373         for (; reg < reg_end; reg += 4) {
 374                 tmp = readl(priv->base + reg);
 375                 tmp &= ~(mask << shift);
 376                 tmp |= (mask & muxval) << shift;
 377                 writel(tmp, priv->base + reg);
 378
 379                 muxval >>= mux_bits;
 380         }
 381
 382         if (load_pinctrl)
 383                 writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX);
 384 }
 385
 386 static int uniphier_pinmux_group_set(struct udevice *dev,
 387                                      unsigned group_selector,
 388                                      unsigned func_selector)
 389 {
 390         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 391         const struct uniphier_pinctrl_group *grp =
 392                                         &priv->socdata->groups[group_selector];
 393         int i;
 394
 395         for (i = 0; i < grp->num_pins; i++)
 396                 uniphier_pinmux_set_one(dev, grp->pins[i], grp->muxvals[i]);
 397
 398         return 0;
 399 }
 400
 401 const struct pinctrl_ops uniphier_pinctrl_ops = {
 402         .get_pins_count = uniphier_pinctrl_get_pins_count,
 403         .get_pin_name = uniphier_pinctrl_get_pin_name,
 404         .get_groups_count = uniphier_pinctrl_get_groups_count,
 405         .get_group_name = uniphier_pinctrl_get_group_name,
 406         .get_functions_count = uniphier_pinmux_get_functions_count,
 407         .get_function_name = uniphier_pinmux_get_function_name,
 408         .pinmux_group_set = uniphier_pinmux_group_set,
 409 #if CONFIG_IS_ENABLED(PINCONF)
 410         .pinconf_num_params = ARRAY_SIZE(uniphier_pinconf_params),
 411         .pinconf_params = uniphier_pinconf_params,
 412         .pinconf_set = uniphier_pinconf_set,
 413         .pinconf_group_set = uniphier_pinconf_group_set,
 414 #endif
 415         .set_state = pinctrl_generic_set_state,
 416 };
 417
 418 int uniphier_pinctrl_probe(struct udevice *dev,
 419                            struct uniphier_pinctrl_socdata *socdata)
 420 {
 421         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 422         fdt_addr_t addr;
 423
 424         addr = devfdt_get_addr(dev->parent);
 425         if (addr == FDT_ADDR_T_NONE)
 426                 return -EINVAL;
 427
 428         priv->base = devm_ioremap(dev, addr, SZ_4K);
 429         if (!priv->base)
 430                 return -ENOMEM;
 431
 432         priv->socdata = socdata;
 433
 434         return 0;
 435 }