drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

   1 /*
   2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <mapmem.h>
   9 #include <linux/io.h>
  10 #include <linux/err.h>
  11 #include <linux/sizes.h>
  12 #include <dm/device.h>
  13 #include <dm/pinctrl.h>
  14
  15 #include "pinctrl-uniphier.h"
  16
  17 static int uniphier_pinctrl_get_groups_count(struct udevice *dev)
  18 {
  19         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  20
  21         return priv->socdata->groups_count;
  22 }
  23
  24 static const char *uniphier_pinctrl_get_group_name(struct udevice *dev,
  25                                                    unsigned selector)
  26 {
  27         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  28
  29         return priv->socdata->groups[selector].name;
  30 }
  31
  32 static int uniphier_pinmux_get_functions_count(struct udevice *dev)
  33 {
  34         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  35
  36         return priv->socdata->functions_count;
  37 }
  38
  39 static const char *uniphier_pinmux_get_function_name(struct udevice *dev,
  40                                                      unsigned selector)
  41 {
  42         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  43
  44         return priv->socdata->functions[selector];
  45 }
  46
  47 static void uniphier_pinconf_input_enable_perpin(struct udevice *dev,
  48                                                  unsigned pin)
  49 {
  50         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  51         unsigned reg;
  52         u32 mask, tmp;
  53
  54         reg = UNIPHIER_PINCTRL_IECTRL + pin / 32 * 4;
  55         mask = BIT(pin % 32);
  56
  57         tmp = readl(priv->base + reg);
  58         tmp |= mask;
  59         writel(tmp, priv->base + reg);
  60 }
  61
  62 static void uniphier_pinconf_input_enable_legacy(struct udevice *dev,
  63                                                  unsigned pin)
  64 {
  65         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  66         int pins_count = priv->socdata->pins_count;
  67         const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
  68         int i;
  69
  70         for (i = 0; i < pins_count; i++) {
  71                 if (pins[i].number == pin) {
  72                         unsigned int iectrl;
  73                         u32 tmp;
  74
  75                         iectrl = uniphier_pin_get_iectrl(pins[i].data);
  76                         tmp = readl(priv->base + UNIPHIER_PINCTRL_IECTRL);
  77                         tmp |= 1 << iectrl;
  78                         writel(tmp, priv->base + UNIPHIER_PINCTRL_IECTRL);
  79                 }
  80         }
  81 }
  82
  83 static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin)
  84 {
  85         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  86
  87         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL)
  88                 uniphier_pinconf_input_enable_perpin(dev, pin);
  89         else
  90                 uniphier_pinconf_input_enable_legacy(dev, pin);
  91 }
  92
  93 static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
  94                                     int muxval)
  95 {
  96         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
  97         unsigned mux_bits, reg_stride, reg, reg_end, shift, mask;
  98         bool load_pinctrl;
  99         u32 tmp;
 100
 101         /* some pins need input-enabling */
 102         uniphier_pinconf_input_enable(dev, pin);
 103
 104         if (muxval < 0)
 105                 return;         /* dedicated pin; nothing to do for pin-mux */
 106
 107         if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
 108                 /*
 109                  *  Mode       offset        bit
 110                  *  Normal     4 * n     shift+3:shift
 111                  *  Debug      4 * n     shift+7:shift+4
 112                  */
 113                 mux_bits = 4;
 114                 reg_stride = 8;
 115                 load_pinctrl = true;
 116         } else {
 117                 /*
 118                  *  Mode       offset           bit
 119                  *  Normal     8 * n        shift+3:shift
 120                  *  Debug      8 * n + 4    shift+3:shift
 121                  */
 122                 mux_bits = 8;
 123                 reg_stride = 4;
 124                 load_pinctrl = false;
 125         }
 126
 127         reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
 128         reg_end = reg + reg_stride;
 129         shift = pin * mux_bits % 32;
 130         mask = (1U << mux_bits) - 1;
 131
 132         /*
 133          * If reg_stride is greater than 4, the MSB of each pinsel shall be
 134          * stored in the offset+4.
 135          */
 136         for (; reg < reg_end; reg += 4) {
 137                 tmp = readl(priv->base + reg);
 138                 tmp &= ~(mask << shift);
 139                 tmp |= (mask & muxval) << shift;
 140                 writel(tmp, priv->base + reg);
 141
 142                 muxval >>= mux_bits;
 143         }
 144
 145         if (load_pinctrl)
 146                 writel(1, priv->base + UNIPHIER_PINCTRL_LOAD_PINMUX);
 147 }
 148
 149 static int uniphier_pinmux_group_set(struct udevice *dev,
 150                                      unsigned group_selector,
 151                                      unsigned func_selector)
 152 {
 153         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 154         const struct uniphier_pinctrl_group *grp =
 155                                         &priv->socdata->groups[group_selector];
 156         int i;
 157
 158         for (i = 0; i < grp->num_pins; i++)
 159                 uniphier_pinmux_set_one(dev, grp->pins[i], grp->muxvals[i]);
 160
 161         return 0;
 162 }
 163
 164 const struct pinctrl_ops uniphier_pinctrl_ops = {
 165         .get_groups_count = uniphier_pinctrl_get_groups_count,
 166         .get_group_name = uniphier_pinctrl_get_group_name,
 167         .get_functions_count = uniphier_pinmux_get_functions_count,
 168         .get_function_name = uniphier_pinmux_get_function_name,
 169         .pinmux_group_set = uniphier_pinmux_group_set,
 170         .set_state = pinctrl_generic_set_state,
 171 };
 172
 173 int uniphier_pinctrl_probe(struct udevice *dev,
 174                            struct uniphier_pinctrl_socdata *socdata)
 175 {
 176         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 177         fdt_addr_t addr;
 178
 179         addr = dev_get_addr(dev->parent);
 180         if (addr == FDT_ADDR_T_NONE)
 181                 return -EINVAL;
 182
 183         priv->base = map_sysmem(addr, SZ_4K);
 184         if (!priv->base)
 185                 return -ENOMEM;
 186
 187         priv->socdata = socdata;
 188
 189         return 0;
 190 }
 191
 192 int uniphier_pinctrl_remove(struct udevice *dev)
 193 {
 194         struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
 195
 196         unmap_sysmem(priv->base);
 197
 198         return 0;
 199 }