drivers/pinctrl/starfive/pinctrl-starfive.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Pinctrl / GPIO driver for StarFive JH7110 SoC
   4  *
   5  * Copyright (C) 2022 Shanghai StarFive Technology Co., Ltd.
   6  */
   7
   8 #ifndef __DRIVERS_PINCTRL_STARFIVE_H
   9 #define __DRIVERS_PINCTRL_STARFIVE_H
  10
  11 #include <linux/pinctrl/pinconf-generic.h>
  12 #include <linux/pinctrl/pinmux.h>
  13
  14 #define MAX_GPIO                                64
  15
  16 #define STARFIVE_PINS_SIZE                      4
  17
  18 #define STARFIVE_USE_SCU                        BIT(0)
  19
  20 #define SYS_IRQ_REG_SUSPENDED_NUM               11
  21 #define AON_IRQ_REG_SUSPENDED_NUM               6
  22
  23 struct platform_device;
  24
  25 extern const struct pinmux_ops starfive_pmx_ops;
  26
  27 struct starfive_pin_config {
  28         unsigned long io_config;
  29         u32 pinmux_func;
  30         u32 gpio_num;
  31         u32 gpio_dout;
  32         u32 gpio_doen;
  33         u32 gpio_din_num;
  34         s32 *gpio_din_reg;
  35         s32 syscon;
  36         s32 padmux_func;
  37 };
  38
  39 struct starfive_pin {
  40         unsigned int pin;
  41         struct starfive_pin_config pin_config;
  42 };
  43
  44 struct starfive_pin_reg {
  45         s32 io_conf_reg;
  46         s32 gpo_dout_reg;
  47         s32 gpo_doen_reg;
  48         s32 func_sel_reg;
  49         s32 func_sel_shift;
  50         s32 func_sel_mask;
  51         s32 syscon_reg;
  52         s32 pad_sel_reg;
  53         s32 pad_sel_shift;
  54         s32 pad_sel_mask;
  55 };
  56
  57 struct starfive_iopad_sel_func_inf {
  58         unsigned int padctl_gpio_base;
  59         unsigned int padctl_gpio0;
  60 };
  61
  62 struct starfive_pinctrl {
  63         struct device *dev;
  64         struct pinctrl_dev *pctl_dev;
  65         void __iomem *padctl_base;
  66         void __iomem *gpio_base;
  67         unsigned int padctl_gpio_base;
  68         unsigned int padctl_gpio0;
  69         const struct starfive_pinctrl_soc_info *info;
  70         struct starfive_pin_reg *pin_regs;
  71         unsigned int group_index;
  72
  73         struct mutex mutex;
  74         raw_spinlock_t lock;
  75
  76         struct gpio_chip gc;
  77         struct pinctrl_gpio_range gpios;
  78         unsigned long enabled;
  79         unsigned int trigger[MAX_GPIO];
  80
  81         u32 sys_irq_reg_suspended[SYS_IRQ_REG_SUSPENDED_NUM];
  82         u32 aon_irq_reg_suspended[AON_IRQ_REG_SUSPENDED_NUM];
  83 };
  84
  85 struct starfive_pinctrl_soc_info {
  86         const struct pinctrl_pin_desc *pins;
  87         unsigned int npins;
  88         unsigned int flags;
  89
  90         /*gpio dout/doen/din register*/
  91         unsigned int dout_reg_base;
  92         unsigned int dout_reg_offset;
  93         unsigned int doen_reg_base;
  94         unsigned int doen_reg_offset;
  95         unsigned int din_reg_base;
  96         unsigned int din_reg_offset;
  97
  98         /* sel-function */
  99         int (*starfive_iopad_sel_func)(struct platform_device *pdev,
 100                                         struct starfive_pinctrl *ipctl,
 101                                         unsigned int func_id);
 102         /* generic pinconf */
 103         int (*starfive_pinconf_get)(struct pinctrl_dev *pctldev, unsigned int pin_id,
 104                                unsigned long *config);
 105         int (*starfive_pinconf_set)(struct pinctrl_dev *pctldev,
 106                                 unsigned int pin_id, unsigned long *configs,
 107                                 unsigned int num_configs);
 108
 109         /* generic pinmux */
 110         int (*starfive_pmx_set_one_pin_mux)(struct starfive_pinctrl *ipctl,
 111                                 struct starfive_pin *pin);
 112         /* gpio chip */
 113         int (*starfive_gpio_register)(struct platform_device *pdev,
 114                                 struct starfive_pinctrl *ipctl);
 115         void (*starfive_pinctrl_parse_pin)(struct starfive_pinctrl *ipctl,
 116                                         unsigned int *pins_id, struct starfive_pin *pin_data,
 117                                         const __be32 *list_p,
 118                                         struct device_node *np);
 119 };
 120
 121 #define STARFIVE_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
 122
 123 int starfive_pinctrl_probe(struct platform_device *pdev,
 124                         const struct starfive_pinctrl_soc_info *info);
 125
 126 #endif /* __DRIVERS_PINCTRL_STARFIVE_H */