2 * Driver header file for the ST Microelectronics SPEAr pinmux
4 * Copyright (C) 2012 ST Microelectronics
5 * Viresh Kumar <viresh.kumar@st.com>
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #ifndef __PINMUX_SPEAR_H__
13 #define __PINMUX_SPEAR_H__
15 #include <linux/pinctrl/pinctrl.h>
16 #include <linux/types.h>
18 struct platform_device;
22 * struct spear_pmx_mode - SPEAr pmx mode
23 * @name: name of pmx mode
25 * @reg: register for configuring this mode
26 * @mask: mask of this mode in reg
27 * @val: val to be configured at reg after doing (val & mask)
29 struct spear_pmx_mode {
30 const char *const name;
38 * struct spear_muxreg - SPEAr mux reg configuration
39 * @reg: register offset
41 * @val: val to be written on mask bits
50 * struct spear_modemux - SPEAr mode mux configuration
51 * @modes: mode ids supported by this group of muxregs
52 * @nmuxregs: number of muxreg configurations to be done for modes
53 * @muxregs: array of muxreg configurations to be done for modes
55 struct spear_modemux {
58 struct spear_muxreg *muxregs;
62 * struct spear_pingroup - SPEAr pin group configurations
63 * @name: name of pin group
64 * @pins: array containing pin numbers
65 * @npins: size of pins array
66 * @modemuxs: array of modemux configurations for this pin group
67 * @nmodemuxs: size of array modemuxs
69 * A representation of a group of pins in the SPEAr pin controller. Each group
70 * allows some parameter or parameters to be configured.
72 struct spear_pingroup {
76 struct spear_modemux *modemuxs;
81 * struct spear_function - SPEAr pinctrl mux function
82 * @name: The name of the function, exported to pinctrl core.
83 * @groups: An array of pin groups that may select this function.
84 * @ngroups: The number of entries in @groups.
86 struct spear_function {
88 const char *const *groups;
93 * struct spear_pinctrl_machdata - SPEAr pin controller machine driver
95 * @pins: An array describing all pins the pin controller affects.
96 * All pins which are also GPIOs must be listed first within the *array,
97 * and be numbered identically to the GPIO controller's *numbering.
98 * @npins: The numbmer of entries in @pins.
99 * @functions: An array describing all mux functions the SoC supports.
100 * @nfunctions: The numbmer of entries in @functions.
101 * @groups: An array describing all pin groups the pin SoC supports.
102 * @ngroups: The numbmer of entries in @groups.
104 * @modes_supported: Does SoC support modes
105 * @mode: mode configured from probe
106 * @pmx_modes: array of modes supported by SoC
107 * @npmx_modes: number of entries in pmx_modes.
109 struct spear_pinctrl_machdata {
110 const struct pinctrl_pin_desc *pins;
112 struct spear_function **functions;
114 struct spear_pingroup **groups;
117 bool modes_supported;
119 struct spear_pmx_mode **pmx_modes;
124 * struct spear_pmx - SPEAr pinctrl mux
125 * @dev: pointer to struct dev of platform_device registered
126 * @pctl: pointer to struct pinctrl_dev
127 * @machdata: pointer to SoC or machine specific structure
128 * @vbase: virtual base address of pinmux controller
132 struct pinctrl_dev *pctl;
133 struct spear_pinctrl_machdata *machdata;
137 /* exported routines */
138 void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg);
139 int __devinit spear_pinctrl_probe(struct platform_device *pdev,
140 struct spear_pinctrl_machdata *machdata);
141 int __devexit spear_pinctrl_remove(struct platform_device *pdev);
142 #endif /* __PINMUX_SPEAR_H__ */