2 * SuperH Pin Function Controller pinmux support.
4 * Copyright (C) 2012 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #define DRV_NAME "sh-pfc"
13 #include <linux/device.h>
14 #include <linux/err.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/pinctrl/machine.h>
20 #include <linux/pinctrl/pinconf.h>
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include <linux/pinctrl/pinctrl.h>
23 #include <linux/pinctrl/pinmux.h>
24 #include <linux/slab.h>
25 #include <linux/spinlock.h>
29 #include "../pinconf.h"
31 struct sh_pfc_pin_config {
35 struct sh_pfc_pinctrl {
36 struct pinctrl_dev *pctl;
37 struct pinctrl_desc pctl_desc;
41 struct pinctrl_pin_desc *pins;
42 struct sh_pfc_pin_config *configs;
45 static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
47 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
49 return pmx->pfc->info->nr_groups;
52 static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
55 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
57 return pmx->pfc->info->groups[selector].name;
60 static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
61 const unsigned **pins, unsigned *num_pins)
63 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
65 *pins = pmx->pfc->info->groups[selector].pins;
66 *num_pins = pmx->pfc->info->groups[selector].nr_pins;
71 static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
74 seq_printf(s, "%s", DRV_NAME);
78 static int sh_pfc_map_add_config(struct pinctrl_map *map,
79 const char *group_or_pin,
80 enum pinctrl_map_type type,
81 unsigned long *configs,
82 unsigned int num_configs)
86 cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
92 map->data.configs.group_or_pin = group_or_pin;
93 map->data.configs.configs = cfgs;
94 map->data.configs.num_configs = num_configs;
99 static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
100 struct pinctrl_map **map,
101 unsigned int *num_maps, unsigned int *index)
103 struct pinctrl_map *maps = *map;
104 unsigned int nmaps = *num_maps;
105 unsigned int idx = *index;
106 unsigned int num_configs;
107 const char *function = NULL;
108 unsigned long *configs;
109 struct property *prop;
110 unsigned int num_groups;
111 unsigned int num_pins;
116 /* Parse the function and configuration properties. At least a function
117 * or one configuration must be specified.
119 ret = of_property_read_string(np, "renesas,function", &function);
120 if (ret < 0 && ret != -EINVAL) {
121 dev_err(dev, "Invalid function in DT\n");
125 ret = pinconf_generic_parse_dt_config(np, &configs, &num_configs);
129 if (!function && num_configs == 0) {
131 "DT node must contain at least a function or config\n");
135 /* Count the number of pins and groups and reallocate mappings. */
136 ret = of_property_count_strings(np, "renesas,pins");
137 if (ret == -EINVAL) {
139 } else if (ret < 0) {
140 dev_err(dev, "Invalid pins list in DT\n");
146 ret = of_property_count_strings(np, "renesas,groups");
147 if (ret == -EINVAL) {
149 } else if (ret < 0) {
150 dev_err(dev, "Invalid pin groups list in DT\n");
156 if (!num_pins && !num_groups) {
157 dev_err(dev, "No pin or group provided in DT node\n");
165 nmaps += num_pins + num_groups;
167 maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
176 /* Iterate over pins and groups and create the mappings. */
177 of_property_for_each_string(np, "renesas,groups", prop, group) {
179 maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
180 maps[idx].data.mux.group = group;
181 maps[idx].data.mux.function = function;
186 ret = sh_pfc_map_add_config(&maps[idx], group,
187 PIN_MAP_TYPE_CONFIGS_GROUP,
188 configs, num_configs);
201 of_property_for_each_string(np, "renesas,pins", prop, pin) {
202 ret = sh_pfc_map_add_config(&maps[idx], pin,
203 PIN_MAP_TYPE_CONFIGS_PIN,
204 configs, num_configs);
217 static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
218 struct pinctrl_map *map, unsigned num_maps)
225 for (i = 0; i < num_maps; ++i) {
226 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP ||
227 map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
228 kfree(map[i].data.configs.configs);
234 static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
235 struct device_node *np,
236 struct pinctrl_map **map, unsigned *num_maps)
238 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
239 struct device *dev = pmx->pfc->dev;
240 struct device_node *child;
248 for_each_child_of_node(np, child) {
249 ret = sh_pfc_dt_subnode_to_map(dev, child, map, num_maps,
255 /* If no mapping has been found in child nodes try the config node. */
256 if (*num_maps == 0) {
257 ret = sh_pfc_dt_subnode_to_map(dev, np, map, num_maps, &index);
265 dev_err(dev, "no mapping found in node %s\n", np->full_name);
270 sh_pfc_dt_free_map(pctldev, *map, *num_maps);
274 #endif /* CONFIG_OF */
276 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
277 .get_groups_count = sh_pfc_get_groups_count,
278 .get_group_name = sh_pfc_get_group_name,
279 .get_group_pins = sh_pfc_get_group_pins,
280 .pin_dbg_show = sh_pfc_pin_dbg_show,
282 .dt_node_to_map = sh_pfc_dt_node_to_map,
283 .dt_free_map = sh_pfc_dt_free_map,
287 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
289 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
291 return pmx->pfc->info->nr_functions;
294 static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
297 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
299 return pmx->pfc->info->functions[selector].name;
302 static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev,
304 const char * const **groups,
305 unsigned * const num_groups)
307 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
309 *groups = pmx->pfc->info->functions[selector].groups;
310 *num_groups = pmx->pfc->info->functions[selector].nr_groups;
315 static int sh_pfc_func_enable(struct pinctrl_dev *pctldev, unsigned selector,
318 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
319 struct sh_pfc *pfc = pmx->pfc;
320 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
325 spin_lock_irqsave(&pfc->lock, flags);
327 for (i = 0; i < grp->nr_pins; ++i) {
328 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
329 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
331 if (cfg->type != PINMUX_TYPE_NONE) {
337 for (i = 0; i < grp->nr_pins; ++i) {
338 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);
344 spin_unlock_irqrestore(&pfc->lock, flags);
348 static void sh_pfc_func_disable(struct pinctrl_dev *pctldev, unsigned selector,
351 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
352 struct sh_pfc *pfc = pmx->pfc;
353 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
357 spin_lock_irqsave(&pfc->lock, flags);
359 for (i = 0; i < grp->nr_pins; ++i) {
360 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
361 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
363 cfg->type = PINMUX_TYPE_NONE;
366 spin_unlock_irqrestore(&pfc->lock, flags);
369 static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
370 struct pinctrl_gpio_range *range,
373 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
374 struct sh_pfc *pfc = pmx->pfc;
375 int idx = sh_pfc_get_pin_index(pfc, offset);
376 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
380 spin_lock_irqsave(&pfc->lock, flags);
382 if (cfg->type != PINMUX_TYPE_NONE) {
384 "Pin %u is busy, can't configure it as GPIO.\n",
391 /* If GPIOs are handled externally the pin mux type need to be
394 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
396 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
401 cfg->type = PINMUX_TYPE_GPIO;
406 spin_unlock_irqrestore(&pfc->lock, flags);
411 static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
412 struct pinctrl_gpio_range *range,
415 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
416 struct sh_pfc *pfc = pmx->pfc;
417 int idx = sh_pfc_get_pin_index(pfc, offset);
418 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
421 spin_lock_irqsave(&pfc->lock, flags);
422 cfg->type = PINMUX_TYPE_NONE;
423 spin_unlock_irqrestore(&pfc->lock, flags);
426 static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
427 struct pinctrl_gpio_range *range,
428 unsigned offset, bool input)
430 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
431 struct sh_pfc *pfc = pmx->pfc;
432 int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
433 int idx = sh_pfc_get_pin_index(pfc, offset);
434 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
435 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
440 /* Check if the requested direction is supported by the pin. Not all SoC
441 * provide pin config data, so perform the check conditionally.
444 dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT;
445 if (!(pin->configs & dir))
449 spin_lock_irqsave(&pfc->lock, flags);
451 ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
455 cfg->type = new_type;
458 spin_unlock_irqrestore(&pfc->lock, flags);
462 static const struct pinmux_ops sh_pfc_pinmux_ops = {
463 .get_functions_count = sh_pfc_get_functions_count,
464 .get_function_name = sh_pfc_get_function_name,
465 .get_function_groups = sh_pfc_get_function_groups,
466 .enable = sh_pfc_func_enable,
467 .disable = sh_pfc_func_disable,
468 .gpio_request_enable = sh_pfc_gpio_request_enable,
469 .gpio_disable_free = sh_pfc_gpio_disable_free,
470 .gpio_set_direction = sh_pfc_gpio_set_direction,
473 /* Check whether the requested parameter is supported for a pin. */
474 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,
475 enum pin_config_param param)
477 int idx = sh_pfc_get_pin_index(pfc, _pin);
478 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
481 case PIN_CONFIG_BIAS_DISABLE:
484 case PIN_CONFIG_BIAS_PULL_UP:
485 return pin->configs & SH_PFC_PIN_CFG_PULL_UP;
487 case PIN_CONFIG_BIAS_PULL_DOWN:
488 return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN;
495 static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
496 unsigned long *config)
498 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
499 struct sh_pfc *pfc = pmx->pfc;
500 enum pin_config_param param = pinconf_to_config_param(*config);
504 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
508 case PIN_CONFIG_BIAS_DISABLE:
509 case PIN_CONFIG_BIAS_PULL_UP:
510 case PIN_CONFIG_BIAS_PULL_DOWN:
511 if (!pfc->info->ops || !pfc->info->ops->get_bias)
514 spin_lock_irqsave(&pfc->lock, flags);
515 bias = pfc->info->ops->get_bias(pfc, _pin);
516 spin_unlock_irqrestore(&pfc->lock, flags);
531 static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
532 unsigned long config)
534 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
535 struct sh_pfc *pfc = pmx->pfc;
536 enum pin_config_param param = pinconf_to_config_param(config);
539 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
543 case PIN_CONFIG_BIAS_PULL_UP:
544 case PIN_CONFIG_BIAS_PULL_DOWN:
545 case PIN_CONFIG_BIAS_DISABLE:
546 if (!pfc->info->ops || !pfc->info->ops->set_bias)
549 spin_lock_irqsave(&pfc->lock, flags);
550 pfc->info->ops->set_bias(pfc, _pin, param);
551 spin_unlock_irqrestore(&pfc->lock, flags);
562 static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
563 unsigned long config)
565 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
566 const unsigned int *pins;
567 unsigned int num_pins;
570 pins = pmx->pfc->info->groups[group].pins;
571 num_pins = pmx->pfc->info->groups[group].nr_pins;
573 for (i = 0; i < num_pins; ++i)
574 sh_pfc_pinconf_set(pctldev, pins[i], config);
579 static const struct pinconf_ops sh_pfc_pinconf_ops = {
581 .pin_config_get = sh_pfc_pinconf_get,
582 .pin_config_set = sh_pfc_pinconf_set,
583 .pin_config_group_set = sh_pfc_pinconf_group_set,
584 .pin_config_config_dbg_show = pinconf_generic_dump_config,
587 /* PFC ranges -> pinctrl pin descs */
588 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
590 const struct pinmux_range *ranges;
591 struct pinmux_range def_range;
592 unsigned int nr_ranges;
593 unsigned int nr_pins;
596 if (pfc->info->ranges == NULL) {
598 def_range.end = pfc->info->nr_pins - 1;
602 ranges = pfc->info->ranges;
603 nr_ranges = pfc->info->nr_ranges;
606 pmx->pins = devm_kzalloc(pfc->dev,
607 sizeof(*pmx->pins) * pfc->info->nr_pins,
609 if (unlikely(!pmx->pins))
612 pmx->configs = devm_kzalloc(pfc->dev,
613 sizeof(*pmx->configs) * pfc->info->nr_pins,
615 if (unlikely(!pmx->configs))
618 for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
619 const struct pinmux_range *range = &ranges[i];
622 for (number = range->begin; number <= range->end;
623 number++, nr_pins++) {
624 struct sh_pfc_pin_config *cfg = &pmx->configs[nr_pins];
625 struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins];
626 const struct sh_pfc_pin *info =
627 &pfc->info->pins[nr_pins];
629 pin->number = number;
630 pin->name = info->name;
631 cfg->type = PINMUX_TYPE_NONE;
635 pfc->nr_pins = ranges[nr_ranges-1].end + 1;
640 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
642 struct sh_pfc_pinctrl *pmx;
645 pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
652 nr_ranges = sh_pfc_map_pins(pfc, pmx);
653 if (unlikely(nr_ranges < 0))
656 pmx->pctl_desc.name = DRV_NAME;
657 pmx->pctl_desc.owner = THIS_MODULE;
658 pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
659 pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
660 pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
661 pmx->pctl_desc.pins = pmx->pins;
662 pmx->pctl_desc.npins = pfc->info->nr_pins;
664 pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
665 if (pmx->pctl == NULL)
671 int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
673 struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
675 pinctrl_unregister(pmx->pctl);