1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2021, Linaro Ltd.
7 #include <linux/module.h>
9 #include <linux/platform_device.h>
10 #include <linux/pinctrl/pinctrl.h>
12 #include "pinctrl-msm.h"
14 static const char * const sc8180x_tiles[] = {
27 * ACPI DSDT has one single memory resource for TLMM. The offsets below are
28 * used to locate different tiles for ACPI probe.
35 static const struct tile_info sc8180x_tile_info[] = {
36 { 0x00d00000, 0x00300000, },
37 { 0x00500000, 0x00700000, },
38 { 0x00100000, 0x00300000, },
41 #define FUNCTION(fname) \
42 [msm_mux_##fname] = { \
44 .groups = fname##_groups, \
45 .ngroups = ARRAY_SIZE(fname##_groups), \
48 #define REG_SIZE 0x1000
49 #define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
52 .pins = gpio##id##_pins, \
53 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
55 msm_mux_gpio, /* gpio mode */ \
67 .ctl_reg = REG_SIZE * id + offset, \
68 .io_reg = REG_SIZE * id + 0x4 + offset, \
69 .intr_cfg_reg = REG_SIZE * id + 0x8 + offset, \
70 .intr_status_reg = REG_SIZE * id + 0xc + offset,\
71 .intr_target_reg = REG_SIZE * id + 0x8 + offset,\
79 .intr_enable_bit = 0, \
80 .intr_status_bit = 0, \
81 .intr_target_bit = 5, \
82 .intr_target_kpss_val = 3, \
83 .intr_raw_status_bit = 4, \
84 .intr_polarity_bit = 1, \
85 .intr_detection_bit = 2, \
86 .intr_detection_width = 2, \
89 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
90 PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9)
92 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
95 .pins = pg_name##_pins, \
96 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
100 .intr_status_reg = 0, \
101 .intr_target_reg = 0, \
109 .intr_enable_bit = -1, \
110 .intr_status_bit = -1, \
111 .intr_target_bit = -1, \
112 .intr_raw_status_bit = -1, \
113 .intr_polarity_bit = -1, \
114 .intr_detection_bit = -1, \
115 .intr_detection_width = -1, \
118 #define UFS_RESET(pg_name) \
121 .pins = pg_name##_pins, \
122 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
123 .ctl_reg = 0xb6000, \
126 .intr_status_reg = 0, \
127 .intr_target_reg = 0, \
135 .intr_enable_bit = -1, \
136 .intr_status_bit = -1, \
137 .intr_target_bit = -1, \
138 .intr_raw_status_bit = -1, \
139 .intr_polarity_bit = -1, \
140 .intr_detection_bit = -1, \
141 .intr_detection_width = -1, \
143 static const struct pinctrl_pin_desc sc8180x_pins[] = {
144 PINCTRL_PIN(0, "GPIO_0"),
145 PINCTRL_PIN(1, "GPIO_1"),
146 PINCTRL_PIN(2, "GPIO_2"),
147 PINCTRL_PIN(3, "GPIO_3"),
148 PINCTRL_PIN(4, "GPIO_4"),
149 PINCTRL_PIN(5, "GPIO_5"),
150 PINCTRL_PIN(6, "GPIO_6"),
151 PINCTRL_PIN(7, "GPIO_7"),
152 PINCTRL_PIN(8, "GPIO_8"),
153 PINCTRL_PIN(9, "GPIO_9"),
154 PINCTRL_PIN(10, "GPIO_10"),
155 PINCTRL_PIN(11, "GPIO_11"),
156 PINCTRL_PIN(12, "GPIO_12"),
157 PINCTRL_PIN(13, "GPIO_13"),
158 PINCTRL_PIN(14, "GPIO_14"),
159 PINCTRL_PIN(15, "GPIO_15"),
160 PINCTRL_PIN(16, "GPIO_16"),
161 PINCTRL_PIN(17, "GPIO_17"),
162 PINCTRL_PIN(18, "GPIO_18"),
163 PINCTRL_PIN(19, "GPIO_19"),
164 PINCTRL_PIN(20, "GPIO_20"),
165 PINCTRL_PIN(21, "GPIO_21"),
166 PINCTRL_PIN(22, "GPIO_22"),
167 PINCTRL_PIN(23, "GPIO_23"),
168 PINCTRL_PIN(24, "GPIO_24"),
169 PINCTRL_PIN(25, "GPIO_25"),
170 PINCTRL_PIN(26, "GPIO_26"),
171 PINCTRL_PIN(27, "GPIO_27"),
172 PINCTRL_PIN(28, "GPIO_28"),
173 PINCTRL_PIN(29, "GPIO_29"),
174 PINCTRL_PIN(30, "GPIO_30"),
175 PINCTRL_PIN(31, "GPIO_31"),
176 PINCTRL_PIN(32, "GPIO_32"),
177 PINCTRL_PIN(33, "GPIO_33"),
178 PINCTRL_PIN(34, "GPIO_34"),
179 PINCTRL_PIN(35, "GPIO_35"),
180 PINCTRL_PIN(36, "GPIO_36"),
181 PINCTRL_PIN(37, "GPIO_37"),
182 PINCTRL_PIN(38, "GPIO_38"),
183 PINCTRL_PIN(39, "GPIO_39"),
184 PINCTRL_PIN(40, "GPIO_40"),
185 PINCTRL_PIN(41, "GPIO_41"),
186 PINCTRL_PIN(42, "GPIO_42"),
187 PINCTRL_PIN(43, "GPIO_43"),
188 PINCTRL_PIN(44, "GPIO_44"),
189 PINCTRL_PIN(45, "GPIO_45"),
190 PINCTRL_PIN(46, "GPIO_46"),
191 PINCTRL_PIN(47, "GPIO_47"),
192 PINCTRL_PIN(48, "GPIO_48"),
193 PINCTRL_PIN(49, "GPIO_49"),
194 PINCTRL_PIN(50, "GPIO_50"),
195 PINCTRL_PIN(51, "GPIO_51"),
196 PINCTRL_PIN(52, "GPIO_52"),
197 PINCTRL_PIN(53, "GPIO_53"),
198 PINCTRL_PIN(54, "GPIO_54"),
199 PINCTRL_PIN(55, "GPIO_55"),
200 PINCTRL_PIN(56, "GPIO_56"),
201 PINCTRL_PIN(57, "GPIO_57"),
202 PINCTRL_PIN(58, "GPIO_58"),
203 PINCTRL_PIN(59, "GPIO_59"),
204 PINCTRL_PIN(60, "GPIO_60"),
205 PINCTRL_PIN(61, "GPIO_61"),
206 PINCTRL_PIN(62, "GPIO_62"),
207 PINCTRL_PIN(63, "GPIO_63"),
208 PINCTRL_PIN(64, "GPIO_64"),
209 PINCTRL_PIN(65, "GPIO_65"),
210 PINCTRL_PIN(66, "GPIO_66"),
211 PINCTRL_PIN(67, "GPIO_67"),
212 PINCTRL_PIN(68, "GPIO_68"),
213 PINCTRL_PIN(69, "GPIO_69"),
214 PINCTRL_PIN(70, "GPIO_70"),
215 PINCTRL_PIN(71, "GPIO_71"),
216 PINCTRL_PIN(72, "GPIO_72"),
217 PINCTRL_PIN(73, "GPIO_73"),
218 PINCTRL_PIN(74, "GPIO_74"),
219 PINCTRL_PIN(75, "GPIO_75"),
220 PINCTRL_PIN(76, "GPIO_76"),
221 PINCTRL_PIN(77, "GPIO_77"),
222 PINCTRL_PIN(78, "GPIO_78"),
223 PINCTRL_PIN(79, "GPIO_79"),
224 PINCTRL_PIN(80, "GPIO_80"),
225 PINCTRL_PIN(81, "GPIO_81"),
226 PINCTRL_PIN(82, "GPIO_82"),
227 PINCTRL_PIN(83, "GPIO_83"),
228 PINCTRL_PIN(84, "GPIO_84"),
229 PINCTRL_PIN(85, "GPIO_85"),
230 PINCTRL_PIN(86, "GPIO_86"),
231 PINCTRL_PIN(87, "GPIO_87"),
232 PINCTRL_PIN(88, "GPIO_88"),
233 PINCTRL_PIN(89, "GPIO_89"),
234 PINCTRL_PIN(90, "GPIO_90"),
235 PINCTRL_PIN(91, "GPIO_91"),
236 PINCTRL_PIN(92, "GPIO_92"),
237 PINCTRL_PIN(93, "GPIO_93"),
238 PINCTRL_PIN(94, "GPIO_94"),
239 PINCTRL_PIN(95, "GPIO_95"),
240 PINCTRL_PIN(96, "GPIO_96"),
241 PINCTRL_PIN(97, "GPIO_97"),
242 PINCTRL_PIN(98, "GPIO_98"),
243 PINCTRL_PIN(99, "GPIO_99"),
244 PINCTRL_PIN(100, "GPIO_100"),
245 PINCTRL_PIN(101, "GPIO_101"),
246 PINCTRL_PIN(102, "GPIO_102"),
247 PINCTRL_PIN(103, "GPIO_103"),
248 PINCTRL_PIN(104, "GPIO_104"),
249 PINCTRL_PIN(105, "GPIO_105"),
250 PINCTRL_PIN(106, "GPIO_106"),
251 PINCTRL_PIN(107, "GPIO_107"),
252 PINCTRL_PIN(108, "GPIO_108"),
253 PINCTRL_PIN(109, "GPIO_109"),
254 PINCTRL_PIN(110, "GPIO_110"),
255 PINCTRL_PIN(111, "GPIO_111"),
256 PINCTRL_PIN(112, "GPIO_112"),
257 PINCTRL_PIN(113, "GPIO_113"),
258 PINCTRL_PIN(114, "GPIO_114"),
259 PINCTRL_PIN(115, "GPIO_115"),
260 PINCTRL_PIN(116, "GPIO_116"),
261 PINCTRL_PIN(117, "GPIO_117"),
262 PINCTRL_PIN(118, "GPIO_118"),
263 PINCTRL_PIN(119, "GPIO_119"),
264 PINCTRL_PIN(120, "GPIO_120"),
265 PINCTRL_PIN(121, "GPIO_121"),
266 PINCTRL_PIN(122, "GPIO_122"),
267 PINCTRL_PIN(123, "GPIO_123"),
268 PINCTRL_PIN(124, "GPIO_124"),
269 PINCTRL_PIN(125, "GPIO_125"),
270 PINCTRL_PIN(126, "GPIO_126"),
271 PINCTRL_PIN(127, "GPIO_127"),
272 PINCTRL_PIN(128, "GPIO_128"),
273 PINCTRL_PIN(129, "GPIO_129"),
274 PINCTRL_PIN(130, "GPIO_130"),
275 PINCTRL_PIN(131, "GPIO_131"),
276 PINCTRL_PIN(132, "GPIO_132"),
277 PINCTRL_PIN(133, "GPIO_133"),
278 PINCTRL_PIN(134, "GPIO_134"),
279 PINCTRL_PIN(135, "GPIO_135"),
280 PINCTRL_PIN(136, "GPIO_136"),
281 PINCTRL_PIN(137, "GPIO_137"),
282 PINCTRL_PIN(138, "GPIO_138"),
283 PINCTRL_PIN(139, "GPIO_139"),
284 PINCTRL_PIN(140, "GPIO_140"),
285 PINCTRL_PIN(141, "GPIO_141"),
286 PINCTRL_PIN(142, "GPIO_142"),
287 PINCTRL_PIN(143, "GPIO_143"),
288 PINCTRL_PIN(144, "GPIO_144"),
289 PINCTRL_PIN(145, "GPIO_145"),
290 PINCTRL_PIN(146, "GPIO_146"),
291 PINCTRL_PIN(147, "GPIO_147"),
292 PINCTRL_PIN(148, "GPIO_148"),
293 PINCTRL_PIN(149, "GPIO_149"),
294 PINCTRL_PIN(150, "GPIO_150"),
295 PINCTRL_PIN(151, "GPIO_151"),
296 PINCTRL_PIN(152, "GPIO_152"),
297 PINCTRL_PIN(153, "GPIO_153"),
298 PINCTRL_PIN(154, "GPIO_154"),
299 PINCTRL_PIN(155, "GPIO_155"),
300 PINCTRL_PIN(156, "GPIO_156"),
301 PINCTRL_PIN(157, "GPIO_157"),
302 PINCTRL_PIN(158, "GPIO_158"),
303 PINCTRL_PIN(159, "GPIO_159"),
304 PINCTRL_PIN(160, "GPIO_160"),
305 PINCTRL_PIN(161, "GPIO_161"),
306 PINCTRL_PIN(162, "GPIO_162"),
307 PINCTRL_PIN(163, "GPIO_163"),
308 PINCTRL_PIN(164, "GPIO_164"),
309 PINCTRL_PIN(165, "GPIO_165"),
310 PINCTRL_PIN(166, "GPIO_166"),
311 PINCTRL_PIN(167, "GPIO_167"),
312 PINCTRL_PIN(168, "GPIO_168"),
313 PINCTRL_PIN(169, "GPIO_169"),
314 PINCTRL_PIN(170, "GPIO_170"),
315 PINCTRL_PIN(171, "GPIO_171"),
316 PINCTRL_PIN(172, "GPIO_172"),
317 PINCTRL_PIN(173, "GPIO_173"),
318 PINCTRL_PIN(174, "GPIO_174"),
319 PINCTRL_PIN(175, "GPIO_175"),
320 PINCTRL_PIN(176, "GPIO_176"),
321 PINCTRL_PIN(177, "GPIO_177"),
322 PINCTRL_PIN(178, "GPIO_178"),
323 PINCTRL_PIN(179, "GPIO_179"),
324 PINCTRL_PIN(180, "GPIO_180"),
325 PINCTRL_PIN(181, "GPIO_181"),
326 PINCTRL_PIN(182, "GPIO_182"),
327 PINCTRL_PIN(183, "GPIO_183"),
328 PINCTRL_PIN(184, "GPIO_184"),
329 PINCTRL_PIN(185, "GPIO_185"),
330 PINCTRL_PIN(186, "GPIO_186"),
331 PINCTRL_PIN(187, "GPIO_187"),
332 PINCTRL_PIN(188, "GPIO_188"),
333 PINCTRL_PIN(189, "GPIO_189"),
334 PINCTRL_PIN(190, "UFS_RESET"),
335 PINCTRL_PIN(191, "SDC2_CLK"),
336 PINCTRL_PIN(192, "SDC2_CMD"),
337 PINCTRL_PIN(193, "SDC2_DATA"),
340 #define DECLARE_MSM_GPIO_PINS(pin) \
341 static const unsigned int gpio##pin##_pins[] = { pin }
342 DECLARE_MSM_GPIO_PINS(0);
343 DECLARE_MSM_GPIO_PINS(1);
344 DECLARE_MSM_GPIO_PINS(2);
345 DECLARE_MSM_GPIO_PINS(3);
346 DECLARE_MSM_GPIO_PINS(4);
347 DECLARE_MSM_GPIO_PINS(5);
348 DECLARE_MSM_GPIO_PINS(6);
349 DECLARE_MSM_GPIO_PINS(7);
350 DECLARE_MSM_GPIO_PINS(8);
351 DECLARE_MSM_GPIO_PINS(9);
352 DECLARE_MSM_GPIO_PINS(10);
353 DECLARE_MSM_GPIO_PINS(11);
354 DECLARE_MSM_GPIO_PINS(12);
355 DECLARE_MSM_GPIO_PINS(13);
356 DECLARE_MSM_GPIO_PINS(14);
357 DECLARE_MSM_GPIO_PINS(15);
358 DECLARE_MSM_GPIO_PINS(16);
359 DECLARE_MSM_GPIO_PINS(17);
360 DECLARE_MSM_GPIO_PINS(18);
361 DECLARE_MSM_GPIO_PINS(19);
362 DECLARE_MSM_GPIO_PINS(20);
363 DECLARE_MSM_GPIO_PINS(21);
364 DECLARE_MSM_GPIO_PINS(22);
365 DECLARE_MSM_GPIO_PINS(23);
366 DECLARE_MSM_GPIO_PINS(24);
367 DECLARE_MSM_GPIO_PINS(25);
368 DECLARE_MSM_GPIO_PINS(26);
369 DECLARE_MSM_GPIO_PINS(27);
370 DECLARE_MSM_GPIO_PINS(28);
371 DECLARE_MSM_GPIO_PINS(29);
372 DECLARE_MSM_GPIO_PINS(30);
373 DECLARE_MSM_GPIO_PINS(31);
374 DECLARE_MSM_GPIO_PINS(32);
375 DECLARE_MSM_GPIO_PINS(33);
376 DECLARE_MSM_GPIO_PINS(34);
377 DECLARE_MSM_GPIO_PINS(35);
378 DECLARE_MSM_GPIO_PINS(36);
379 DECLARE_MSM_GPIO_PINS(37);
380 DECLARE_MSM_GPIO_PINS(38);
381 DECLARE_MSM_GPIO_PINS(39);
382 DECLARE_MSM_GPIO_PINS(40);
383 DECLARE_MSM_GPIO_PINS(41);
384 DECLARE_MSM_GPIO_PINS(42);
385 DECLARE_MSM_GPIO_PINS(43);
386 DECLARE_MSM_GPIO_PINS(44);
387 DECLARE_MSM_GPIO_PINS(45);
388 DECLARE_MSM_GPIO_PINS(46);
389 DECLARE_MSM_GPIO_PINS(47);
390 DECLARE_MSM_GPIO_PINS(48);
391 DECLARE_MSM_GPIO_PINS(49);
392 DECLARE_MSM_GPIO_PINS(50);
393 DECLARE_MSM_GPIO_PINS(51);
394 DECLARE_MSM_GPIO_PINS(52);
395 DECLARE_MSM_GPIO_PINS(53);
396 DECLARE_MSM_GPIO_PINS(54);
397 DECLARE_MSM_GPIO_PINS(55);
398 DECLARE_MSM_GPIO_PINS(56);
399 DECLARE_MSM_GPIO_PINS(57);
400 DECLARE_MSM_GPIO_PINS(58);
401 DECLARE_MSM_GPIO_PINS(59);
402 DECLARE_MSM_GPIO_PINS(60);
403 DECLARE_MSM_GPIO_PINS(61);
404 DECLARE_MSM_GPIO_PINS(62);
405 DECLARE_MSM_GPIO_PINS(63);
406 DECLARE_MSM_GPIO_PINS(64);
407 DECLARE_MSM_GPIO_PINS(65);
408 DECLARE_MSM_GPIO_PINS(66);
409 DECLARE_MSM_GPIO_PINS(67);
410 DECLARE_MSM_GPIO_PINS(68);
411 DECLARE_MSM_GPIO_PINS(69);
412 DECLARE_MSM_GPIO_PINS(70);
413 DECLARE_MSM_GPIO_PINS(71);
414 DECLARE_MSM_GPIO_PINS(72);
415 DECLARE_MSM_GPIO_PINS(73);
416 DECLARE_MSM_GPIO_PINS(74);
417 DECLARE_MSM_GPIO_PINS(75);
418 DECLARE_MSM_GPIO_PINS(76);
419 DECLARE_MSM_GPIO_PINS(77);
420 DECLARE_MSM_GPIO_PINS(78);
421 DECLARE_MSM_GPIO_PINS(79);
422 DECLARE_MSM_GPIO_PINS(80);
423 DECLARE_MSM_GPIO_PINS(81);
424 DECLARE_MSM_GPIO_PINS(82);
425 DECLARE_MSM_GPIO_PINS(83);
426 DECLARE_MSM_GPIO_PINS(84);
427 DECLARE_MSM_GPIO_PINS(85);
428 DECLARE_MSM_GPIO_PINS(86);
429 DECLARE_MSM_GPIO_PINS(87);
430 DECLARE_MSM_GPIO_PINS(88);
431 DECLARE_MSM_GPIO_PINS(89);
432 DECLARE_MSM_GPIO_PINS(90);
433 DECLARE_MSM_GPIO_PINS(91);
434 DECLARE_MSM_GPIO_PINS(92);
435 DECLARE_MSM_GPIO_PINS(93);
436 DECLARE_MSM_GPIO_PINS(94);
437 DECLARE_MSM_GPIO_PINS(95);
438 DECLARE_MSM_GPIO_PINS(96);
439 DECLARE_MSM_GPIO_PINS(97);
440 DECLARE_MSM_GPIO_PINS(98);
441 DECLARE_MSM_GPIO_PINS(99);
442 DECLARE_MSM_GPIO_PINS(100);
443 DECLARE_MSM_GPIO_PINS(101);
444 DECLARE_MSM_GPIO_PINS(102);
445 DECLARE_MSM_GPIO_PINS(103);
446 DECLARE_MSM_GPIO_PINS(104);
447 DECLARE_MSM_GPIO_PINS(105);
448 DECLARE_MSM_GPIO_PINS(106);
449 DECLARE_MSM_GPIO_PINS(107);
450 DECLARE_MSM_GPIO_PINS(108);
451 DECLARE_MSM_GPIO_PINS(109);
452 DECLARE_MSM_GPIO_PINS(110);
453 DECLARE_MSM_GPIO_PINS(111);
454 DECLARE_MSM_GPIO_PINS(112);
455 DECLARE_MSM_GPIO_PINS(113);
456 DECLARE_MSM_GPIO_PINS(114);
457 DECLARE_MSM_GPIO_PINS(115);
458 DECLARE_MSM_GPIO_PINS(116);
459 DECLARE_MSM_GPIO_PINS(117);
460 DECLARE_MSM_GPIO_PINS(118);
461 DECLARE_MSM_GPIO_PINS(119);
462 DECLARE_MSM_GPIO_PINS(120);
463 DECLARE_MSM_GPIO_PINS(121);
464 DECLARE_MSM_GPIO_PINS(122);
465 DECLARE_MSM_GPIO_PINS(123);
466 DECLARE_MSM_GPIO_PINS(124);
467 DECLARE_MSM_GPIO_PINS(125);
468 DECLARE_MSM_GPIO_PINS(126);
469 DECLARE_MSM_GPIO_PINS(127);
470 DECLARE_MSM_GPIO_PINS(128);
471 DECLARE_MSM_GPIO_PINS(129);
472 DECLARE_MSM_GPIO_PINS(130);
473 DECLARE_MSM_GPIO_PINS(131);
474 DECLARE_MSM_GPIO_PINS(132);
475 DECLARE_MSM_GPIO_PINS(133);
476 DECLARE_MSM_GPIO_PINS(134);
477 DECLARE_MSM_GPIO_PINS(135);
478 DECLARE_MSM_GPIO_PINS(136);
479 DECLARE_MSM_GPIO_PINS(137);
480 DECLARE_MSM_GPIO_PINS(138);
481 DECLARE_MSM_GPIO_PINS(139);
482 DECLARE_MSM_GPIO_PINS(140);
483 DECLARE_MSM_GPIO_PINS(141);
484 DECLARE_MSM_GPIO_PINS(142);
485 DECLARE_MSM_GPIO_PINS(143);
486 DECLARE_MSM_GPIO_PINS(144);
487 DECLARE_MSM_GPIO_PINS(145);
488 DECLARE_MSM_GPIO_PINS(146);
489 DECLARE_MSM_GPIO_PINS(147);
490 DECLARE_MSM_GPIO_PINS(148);
491 DECLARE_MSM_GPIO_PINS(149);
492 DECLARE_MSM_GPIO_PINS(150);
493 DECLARE_MSM_GPIO_PINS(151);
494 DECLARE_MSM_GPIO_PINS(152);
495 DECLARE_MSM_GPIO_PINS(153);
496 DECLARE_MSM_GPIO_PINS(154);
497 DECLARE_MSM_GPIO_PINS(155);
498 DECLARE_MSM_GPIO_PINS(156);
499 DECLARE_MSM_GPIO_PINS(157);
500 DECLARE_MSM_GPIO_PINS(158);
501 DECLARE_MSM_GPIO_PINS(159);
502 DECLARE_MSM_GPIO_PINS(160);
503 DECLARE_MSM_GPIO_PINS(161);
504 DECLARE_MSM_GPIO_PINS(162);
505 DECLARE_MSM_GPIO_PINS(163);
506 DECLARE_MSM_GPIO_PINS(164);
507 DECLARE_MSM_GPIO_PINS(165);
508 DECLARE_MSM_GPIO_PINS(166);
509 DECLARE_MSM_GPIO_PINS(167);
510 DECLARE_MSM_GPIO_PINS(168);
511 DECLARE_MSM_GPIO_PINS(169);
512 DECLARE_MSM_GPIO_PINS(170);
513 DECLARE_MSM_GPIO_PINS(171);
514 DECLARE_MSM_GPIO_PINS(172);
515 DECLARE_MSM_GPIO_PINS(173);
516 DECLARE_MSM_GPIO_PINS(174);
517 DECLARE_MSM_GPIO_PINS(175);
518 DECLARE_MSM_GPIO_PINS(176);
519 DECLARE_MSM_GPIO_PINS(177);
520 DECLARE_MSM_GPIO_PINS(178);
521 DECLARE_MSM_GPIO_PINS(179);
522 DECLARE_MSM_GPIO_PINS(180);
523 DECLARE_MSM_GPIO_PINS(181);
524 DECLARE_MSM_GPIO_PINS(182);
525 DECLARE_MSM_GPIO_PINS(183);
526 DECLARE_MSM_GPIO_PINS(184);
527 DECLARE_MSM_GPIO_PINS(185);
528 DECLARE_MSM_GPIO_PINS(186);
529 DECLARE_MSM_GPIO_PINS(187);
530 DECLARE_MSM_GPIO_PINS(188);
531 DECLARE_MSM_GPIO_PINS(189);
533 static const unsigned int sdc2_clk_pins[] = { 190 };
534 static const unsigned int sdc2_cmd_pins[] = { 191 };
535 static const unsigned int sdc2_data_pins[] = { 192 };
536 static const unsigned int ufs_reset_pins[] = { 193 };
538 enum sc8180x_functions {
544 msm_mux_atest_tsens2,
551 msm_mux_btfm_slimbus,
587 msm_mux_lpass_slimbus,
598 msm_mux_pa_indicator,
605 msm_mux_pll_bypassnl,
664 msm_mux_vsense_trigger,
671 static const char * const adsp_ext_groups[] = {
675 static const char * const agera_pll_groups[] = {
679 static const char * const aoss_cti_groups[] = {
683 static const char * const atest_char_groups[] = {
684 "gpio133", "gpio134", "gpio135", "gpio140", "gpio142",
687 static const char * const atest_tsens2_groups[] = {
691 static const char * const atest_tsens_groups[] = {
695 static const char * const atest_usb0_groups[] = {
696 "gpio90", "gpio91", "gpio92", "gpio93", "gpio94",
699 static const char * const atest_usb1_groups[] = {
700 "gpio60", "gpio62", "gpio63", "gpio64", "gpio65",
703 static const char * const atest_usb2_groups[] = {
704 "gpio34", "gpio95", "gpio102", "gpio121", "gpio122",
707 static const char * const atest_usb3_groups[] = {
708 "gpio68", "gpio71", "gpio72", "gpio73", "gpio74",
711 static const char * const atest_usb4_groups[] = {
712 "gpio75", "gpio76", "gpio77", "gpio78", "gpio88",
715 static const char * const audio_ref_groups[] = {
719 static const char * const btfm_slimbus_groups[] = {
720 "gpio153", "gpio154",
723 static const char * const cam_mclk_groups[] = {
724 "gpio13", "gpio14", "gpio15", "gpio16", "gpio25", "gpio179", "gpio180",
728 static const char * const cci_async_groups[] = {
729 "gpio24", "gpio25", "gpio26", "gpio176", "gpio185", "gpio186",
732 static const char * const cci_i2c_groups[] = {
733 "gpio0", "gpio1", "gpio2", "gpio3", "gpio17", "gpio18", "gpio19",
734 "gpio20", "gpio31", "gpio32", "gpio33", "gpio34", "gpio39", "gpio40",
738 static const char * const cci_timer0_groups[] = {
742 static const char * const cci_timer1_groups[] = {
746 static const char * const cci_timer2_groups[] = {
750 static const char * const cci_timer3_groups[] = {
754 static const char * const cci_timer4_groups[] = {
758 static const char * const cci_timer5_groups[] = {
762 static const char * const cci_timer6_groups[] = {
766 static const char * const cci_timer7_groups[] = {
770 static const char * const cci_timer8_groups[] = {
774 static const char * const cci_timer9_groups[] = {
778 static const char * const cri_trng_groups[] = {
784 static const char * const dbg_out_groups[] = {
788 static const char * const ddr_bist_groups[] = {
789 "gpio98", "gpio99", "gpio145", "gpio146",
792 static const char * const ddr_pxi_groups[] = {
793 "gpio60", "gpio62", "gpio63", "gpio64", "gpio65", "gpio68", "gpio71",
794 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78",
798 static const char * const debug_hot_groups[] = {
802 static const char * const dp_hot_groups[] = {
806 static const char * const edp_hot_groups[] = {
810 static const char * const edp_lcd_groups[] = {
814 static const char * const emac_phy_groups[] = {
818 static const char * const emac_pps_groups[] = {
822 static const char * const gcc_gp1_groups[] = {
823 "gpio131", "gpio136",
826 static const char * const gcc_gp2_groups[] = {
830 static const char * const gcc_gp3_groups[] = {
834 static const char * const gcc_gp4_groups[] = {
835 "gpio139", "gpio182",
838 static const char * const gcc_gp5_groups[] = {
839 "gpio140", "gpio183",
842 static const char * const gpio_groups[] = {
843 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
844 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio12", "gpio13",
845 "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20",
846 "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27",
847 "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34",
848 "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41",
849 "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48",
850 "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55",
851 "gpio56", "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62",
852 "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69",
853 "gpio70", "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76",
854 "gpio77", "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83",
855 "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90",
856 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97",
857 "gpio98", "gpio99", "gpio100", "gpio101", "gpio102", "gpio103",
858 "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", "gpio109",
859 "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", "gpio115",
860 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
861 "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", "gpio127",
862 "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", "gpio133",
863 "gpio134", "gpio135", "gpio136", "gpio137", "gpio138", "gpio139",
864 "gpio140", "gpio141", "gpio142", "gpio143", "gpio144", "gpio145",
865 "gpio146", "gpio147", "gpio148", "gpio149", "gpio150", "gpio151",
866 "gpio152", "gpio153", "gpio154", "gpio155", "gpio156", "gpio157",
867 "gpio158", "gpio159", "gpio160", "gpio161", "gpio162", "gpio163",
868 "gpio164", "gpio165", "gpio166", "gpio167", "gpio168", "gpio169",
869 "gpio170", "gpio171", "gpio172", "gpio173", "gpio174", "gpio175",
870 "gpio176", "gpio177", "gpio177", "gpio178", "gpio179", "gpio180",
871 "gpio181", "gpio182", "gpio183", "gpio184", "gpio185", "gpio186",
872 "gpio186", "gpio187", "gpio187", "gpio188", "gpio188", "gpio189",
875 static const char * const gps_groups[] = {
876 "gpio60", "gpio76", "gpio77", "gpio81", "gpio82",
879 static const char * const grfc_groups[] = {
880 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio71", "gpio72",
881 "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", "gpio78", "gpio79",
882 "gpio80", "gpio81", "gpio82",
885 static const char * const hs1_mi2s_groups[] = {
886 "gpio155", "gpio156", "gpio157", "gpio158", "gpio159",
889 static const char * const hs2_mi2s_groups[] = {
890 "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
893 static const char * const hs3_mi2s_groups[] = {
894 "gpio125", "gpio165", "gpio166", "gpio167", "gpio168",
897 static const char * const jitter_bist_groups[] = {
901 static const char * const lpass_slimbus_groups[] = {
902 "gpio149", "gpio150", "gpio151", "gpio152",
905 static const char * const m_voc_groups[] = {
909 static const char * const mdp_vsync0_groups[] = {
913 static const char * const mdp_vsync1_groups[] = {
917 static const char * const mdp_vsync2_groups[] = {
921 static const char * const mdp_vsync3_groups[] = {
925 static const char * const mdp_vsync4_groups[] = {
929 static const char * const mdp_vsync5_groups[] = {
933 static const char * const mdp_vsync_groups[] = {
934 "gpio8", "gpio9", "gpio10", "gpio60", "gpio82",
937 static const char * const mss_lte_groups[] = {
941 static const char * const nav_pps_groups[] = {
942 "gpio60", "gpio60", "gpio76", "gpio76", "gpio77", "gpio77", "gpio81",
943 "gpio81", "gpio82", "gpio82",
946 static const char * const pa_indicator_groups[] = {
950 static const char * const pci_e0_groups[] = {
954 static const char * const pci_e1_groups[] = {
955 "gpio102", "gpio103",
958 static const char * const pci_e2_groups[] = {
959 "gpio175", "gpio176",
962 static const char * const pci_e3_groups[] = {
963 "gpio178", "gpio179",
966 static const char * const phase_flag_groups[] = {
967 "gpio4", "gpio5", "gpio6", "gpio7", "gpio33", "gpio53", "gpio54",
968 "gpio102", "gpio120", "gpio121", "gpio122", "gpio123", "gpio125",
969 "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", "gpio155",
970 "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161",
971 "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167",
975 static const char * const pll_bist_groups[] = {
979 static const char * const pll_bypassnl_groups[] = {
983 static const char * const pll_reset_groups[] = {
987 static const char * const pri_mi2s_groups[] = {
988 "gpio143", "gpio144", "gpio146", "gpio147",
991 static const char * const pri_mi2s_ws_groups[] = {
995 static const char * const prng_rosc_groups[] = {
999 static const char * const qdss_cti_groups[] = {
1000 "gpio49", "gpio50", "gpio81", "gpio82", "gpio89", "gpio90", "gpio141",
1004 static const char * const qdss_gpio_groups[] = {
1005 "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", "gpio19",
1006 "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", "gpio26",
1007 "gpio27", "gpio28", "gpio29", "gpio30", "gpio39", "gpio40", "gpio41",
1008 "gpio42", "gpio92", "gpio114", "gpio115", "gpio116", "gpio117",
1009 "gpio118", "gpio119", "gpio120", "gpio121", "gpio130", "gpio132",
1010 "gpio133", "gpio134", "gpio135",
1013 static const char * const qlink_groups[] = {
1017 static const char * const qspi0_groups[] = {
1018 "gpio89", "gpio90", "gpio91", "gpio93",
1021 static const char * const qspi0_clk_groups[] = {
1025 static const char * const qspi0_cs_groups[] = {
1029 static const char * const qspi1_groups[] = {
1030 "gpio56", "gpio57", "gpio161", "gpio162",
1033 static const char * const qspi1_clk_groups[] = {
1037 static const char * const qspi1_cs_groups[] = {
1038 "gpio55", "gpio164",
1041 static const char * const qua_mi2s_groups[] = {
1042 "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", "gpio141",
1046 static const char * const qup0_groups[] = {
1047 "gpio0", "gpio1", "gpio2", "gpio3",
1050 static const char * const qup10_groups[] = {
1051 "gpio9", "gpio10", "gpio11", "gpio12",
1054 static const char * const qup11_groups[] = {
1055 "gpio92", "gpio93", "gpio94", "gpio95",
1058 static const char * const qup12_groups[] = {
1059 "gpio83", "gpio84", "gpio85", "gpio86",
1062 static const char * const qup13_groups[] = {
1063 "gpio43", "gpio44", "gpio45", "gpio46",
1066 static const char * const qup14_groups[] = {
1067 "gpio47", "gpio48", "gpio49", "gpio50",
1070 static const char * const qup15_groups[] = {
1071 "gpio27", "gpio28", "gpio29", "gpio30",
1074 static const char * const qup16_groups[] = {
1075 "gpio83", "gpio84", "gpio85", "gpio86",
1078 static const char * const qup17_groups[] = {
1079 "gpio55", "gpio56", "gpio57", "gpio58",
1082 static const char * const qup18_groups[] = {
1083 "gpio23", "gpio24", "gpio25", "gpio26",
1086 static const char * const qup19_groups[] = {
1087 "gpio181", "gpio182", "gpio183", "gpio184",
1090 static const char * const qup1_groups[] = {
1091 "gpio114", "gpio115", "gpio116", "gpio117",
1094 static const char * const qup2_groups[] = {
1095 "gpio126", "gpio127", "gpio128", "gpio129",
1098 static const char * const qup3_groups[] = {
1099 "gpio144", "gpio145", "gpio146", "gpio147",
1102 static const char * const qup4_groups[] = {
1103 "gpio51", "gpio52", "gpio53", "gpio54",
1106 static const char * const qup5_groups[] = {
1107 "gpio119", "gpio120", "gpio121", "gpio122",
1110 static const char * const qup6_groups[] = {
1111 "gpio4", "gpio5", "gpio6", "gpio7",
1114 static const char * const qup7_groups[] = {
1115 "gpio98", "gpio99", "gpio100", "gpio101",
1118 static const char * const qup8_groups[] = {
1119 "gpio88", "gpio89", "gpio90", "gpio91",
1122 static const char * const qup9_groups[] = {
1123 "gpio39", "gpio40", "gpio41", "gpio42",
1126 static const char * const qup_l4_groups[] = {
1127 "gpio35", "gpio59", "gpio60", "gpio95",
1130 static const char * const qup_l5_groups[] = {
1131 "gpio7", "gpio33", "gpio36", "gpio96",
1134 static const char * const qup_l6_groups[] = {
1135 "gpio6", "gpio34", "gpio37", "gpio97",
1138 static const char * const rgmii_groups[] = {
1139 "gpio4", "gpio5", "gpio6", "gpio7", "gpio59", "gpio114", "gpio115",
1140 "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", "gpio121",
1144 static const char * const sd_write_groups[] = {
1148 static const char * const sdc4_groups[] = {
1149 "gpio91", "gpio93", "gpio94", "gpio95",
1152 static const char * const sdc4_clk_groups[] = {
1156 static const char * const sdc4_cmd_groups[] = {
1160 static const char * const sec_mi2s_groups[] = {
1161 "gpio126", "gpio127", "gpio128", "gpio129", "gpio130",
1164 static const char * const sp_cmu_groups[] = {
1168 static const char * const spkr_i2s_groups[] = {
1169 "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
1172 static const char * const ter_mi2s_groups[] = {
1173 "gpio131", "gpio132", "gpio133", "gpio134", "gpio135",
1176 static const char * const tgu_groups[] = {
1177 "gpio89", "gpio90", "gpio91", "gpio88", "gpio74", "gpio77", "gpio76",
1181 static const char * const tsense_pwm1_groups[] = {
1185 static const char * const tsense_pwm2_groups[] = {
1189 static const char * const tsif1_groups[] = {
1190 "gpio88", "gpio89", "gpio90", "gpio91", "gpio97",
1193 static const char * const tsif2_groups[] = {
1194 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96",
1197 static const char * const uim1_groups[] = {
1198 "gpio109", "gpio110", "gpio111", "gpio112",
1201 static const char * const uim2_groups[] = {
1202 "gpio105", "gpio106", "gpio107", "gpio108",
1205 static const char * const uim_batt_groups[] = {
1209 static const char * const usb0_phy_groups[] = {
1213 static const char * const usb1_phy_groups[] = {
1217 static const char * const usb2phy_ac_groups[] = {
1218 "gpio47", "gpio48", "gpio113", "gpio123",
1221 static const char * const vfr_1_groups[] = {
1225 static const char * const vsense_trigger_groups[] = {
1229 static const char * const wlan1_adc_groups[] = {
1233 static const char * const wlan2_adc_groups[] = {
1237 static const char * const wmss_reset_groups[] = {
1241 static const struct msm_function sc8180x_functions[] = {
1243 FUNCTION(agera_pll),
1245 FUNCTION(atest_char),
1246 FUNCTION(atest_tsens),
1247 FUNCTION(atest_tsens2),
1248 FUNCTION(atest_usb0),
1249 FUNCTION(atest_usb1),
1250 FUNCTION(atest_usb2),
1251 FUNCTION(atest_usb3),
1252 FUNCTION(atest_usb4),
1253 FUNCTION(audio_ref),
1254 FUNCTION(btfm_slimbus),
1256 FUNCTION(cci_async),
1258 FUNCTION(cci_timer0),
1259 FUNCTION(cci_timer1),
1260 FUNCTION(cci_timer2),
1261 FUNCTION(cci_timer3),
1262 FUNCTION(cci_timer4),
1263 FUNCTION(cci_timer5),
1264 FUNCTION(cci_timer6),
1265 FUNCTION(cci_timer7),
1266 FUNCTION(cci_timer8),
1267 FUNCTION(cci_timer9),
1272 FUNCTION(debug_hot),
1289 FUNCTION(jitter_bist),
1290 FUNCTION(lpass_slimbus),
1292 FUNCTION(mdp_vsync),
1293 FUNCTION(mdp_vsync0),
1294 FUNCTION(mdp_vsync1),
1295 FUNCTION(mdp_vsync2),
1296 FUNCTION(mdp_vsync3),
1297 FUNCTION(mdp_vsync4),
1298 FUNCTION(mdp_vsync5),
1301 FUNCTION(pa_indicator),
1306 FUNCTION(phase_flag),
1308 FUNCTION(pll_bypassnl),
1309 FUNCTION(pll_reset),
1311 FUNCTION(pri_mi2s_ws),
1312 FUNCTION(prng_rosc),
1314 FUNCTION(qdss_gpio),
1317 FUNCTION(qspi0_clk),
1320 FUNCTION(qspi1_clk),
1356 FUNCTION(tsense_pwm1),
1357 FUNCTION(tsense_pwm2),
1365 FUNCTION(usb2phy_ac),
1367 FUNCTION(vsense_trigger),
1368 FUNCTION(wlan1_adc),
1369 FUNCTION(wlan2_adc),
1370 FUNCTION(wmss_reset),
1373 /* Every pin is maintained as a single group, and missing or non-existing pin
1374 * would be maintained as dummy group to synchronize pin group index with
1375 * pin descriptor registered with pinctrl core.
1376 * Clients would not be able to request these dummy pin groups.
1378 static const struct msm_pingroup sc8180x_groups[] = {
1379 [0] = PINGROUP(0, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1380 [1] = PINGROUP(1, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1381 [2] = PINGROUP(2, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1382 [3] = PINGROUP(3, WEST, qup0, cci_i2c, _, _, _, _, _, _, _),
1383 [4] = PINGROUP(4, WEST, qup6, rgmii, _, phase_flag, _, _, _, _, _),
1384 [5] = PINGROUP(5, WEST, qup6, rgmii, _, phase_flag, _, _, _, _, _),
1385 [6] = PINGROUP(6, WEST, qup6, rgmii, qup_l6, _, phase_flag, _, _, _, _),
1386 [7] = PINGROUP(7, WEST, qup6, debug_hot, rgmii, qup_l5, _, phase_flag, _, _, _),
1387 [8] = PINGROUP(8, EAST, mdp_vsync, _, _, _, _, _, _, _, _),
1388 [9] = PINGROUP(9, EAST, mdp_vsync, qup10, _, _, _, _, _, _, _),
1389 [10] = PINGROUP(10, EAST, edp_hot, m_voc, mdp_vsync, qup10, _, _, _, _, _),
1390 [11] = PINGROUP(11, EAST, edp_lcd, qup10, _, _, _, _, _, _, _),
1391 [12] = PINGROUP(12, EAST, qup10, _, _, _, _, _, _, _, _),
1392 [13] = PINGROUP(13, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1393 [14] = PINGROUP(14, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1394 [15] = PINGROUP(15, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1395 [16] = PINGROUP(16, EAST, cam_mclk, qdss_gpio, _, _, _, _, _, _, _),
1396 [17] = PINGROUP(17, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1397 [18] = PINGROUP(18, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1398 [19] = PINGROUP(19, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1399 [20] = PINGROUP(20, EAST, cci_i2c, qdss_gpio, _, _, _, _, _, _, _),
1400 [21] = PINGROUP(21, EAST, cci_timer0, gcc_gp2, qdss_gpio, _, _, _, _, _, _),
1401 [22] = PINGROUP(22, EAST, cci_timer1, gcc_gp3, qdss_gpio, _, _, _, _, _, _),
1402 [23] = PINGROUP(23, EAST, cci_timer2, qup18, qdss_gpio, _, _, _, _, _, _),
1403 [24] = PINGROUP(24, EAST, cci_timer3, cci_async, qup18, qdss_gpio, _, _, _, _, _),
1404 [25] = PINGROUP(25, EAST, cam_mclk, cci_async, qup18, qdss_gpio, _, _, _, _, _),
1405 [26] = PINGROUP(26, EAST, cci_async, qup18, qdss_gpio, _, _, _, _, _, _),
1406 [27] = PINGROUP(27, EAST, qup15, _, qdss_gpio, _, _, _, _, _, _),
1407 [28] = PINGROUP(28, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _),
1408 [29] = PINGROUP(29, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _),
1409 [30] = PINGROUP(30, EAST, qup15, qdss_gpio, _, _, _, _, _, _, _),
1410 [31] = PINGROUP(31, EAST, cci_i2c, _, _, _, _, _, _, _, _),
1411 [32] = PINGROUP(32, EAST, cci_i2c, _, _, _, _, _, _, _, _),
1412 [33] = PINGROUP(33, EAST, cci_i2c, qup_l5, _, phase_flag, _, _, _, _, _),
1413 [34] = PINGROUP(34, EAST, cci_i2c, qup_l6, dbg_out, atest_usb2, _, _, _, _, _),
1414 [35] = PINGROUP(35, SOUTH, pci_e0, qup_l4, _, _, _, _, _, _, _),
1415 [36] = PINGROUP(36, SOUTH, pci_e0, qup_l5, _, _, _, _, _, _, _),
1416 [37] = PINGROUP(37, SOUTH, qup_l6, agera_pll, _, _, _, _, _, _, _),
1417 [38] = PINGROUP(38, SOUTH, usb0_phy, _, _, _, _, _, _, _, _),
1418 [39] = PINGROUP(39, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1419 [40] = PINGROUP(40, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1420 [41] = PINGROUP(41, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1421 [42] = PINGROUP(42, EAST, qup9, cci_i2c, qdss_gpio, _, _, _, _, _, _),
1422 [43] = PINGROUP(43, EAST, qup13, _, _, _, _, _, _, _, _),
1423 [44] = PINGROUP(44, EAST, qup13, _, _, _, _, _, _, _, _),
1424 [45] = PINGROUP(45, EAST, qup13, _, _, _, _, _, _, _, _),
1425 [46] = PINGROUP(46, EAST, qup13, _, _, _, _, _, _, _, _),
1426 [47] = PINGROUP(47, EAST, qup14, usb2phy_ac, _, _, _, _, _, _, _),
1427 [48] = PINGROUP(48, EAST, qup14, usb2phy_ac, _, _, _, _, _, _, _),
1428 [49] = PINGROUP(49, EAST, qup14, qdss_cti, _, _, _, _, _, _, _),
1429 [50] = PINGROUP(50, EAST, qup14, qdss_cti, _, _, _, _, _, _, _),
1430 [51] = PINGROUP(51, WEST, qup4, _, _, _, _, _, _, _, _),
1431 [52] = PINGROUP(52, WEST, qup4, _, _, _, _, _, _, _, _),
1432 [53] = PINGROUP(53, WEST, qup4, _, phase_flag, _, _, _, _, _, _),
1433 [54] = PINGROUP(54, WEST, qup4, _, _, phase_flag, _, _, _, _, _),
1434 [55] = PINGROUP(55, WEST, qup17, qspi1_cs, _, _, _, _, _, _, _),
1435 [56] = PINGROUP(56, WEST, qup17, qspi1, _, _, _, _, _, _, _),
1436 [57] = PINGROUP(57, WEST, qup17, qspi1, _, _, _, _, _, _, _),
1437 [58] = PINGROUP(58, WEST, usb1_phy, qup17, _, _, _, _, _, _, _),
1438 [59] = PINGROUP(59, WEST, rgmii, qup_l4, _, _, _, _, _, _, _),
1439 [60] = PINGROUP(60, EAST, gps, nav_pps, nav_pps, qup_l4, mdp_vsync, atest_usb1, ddr_pxi, _, _),
1440 [61] = PINGROUP(61, EAST, qlink, _, _, _, _, _, _, _, _),
1441 [62] = PINGROUP(62, EAST, qlink, atest_tsens2, atest_usb1, ddr_pxi, vsense_trigger, _, _, _, _),
1442 [63] = PINGROUP(63, EAST, wmss_reset, _, atest_usb1, ddr_pxi, wlan1_adc, _, _, _, _),
1443 [64] = PINGROUP(64, EAST, grfc, _, atest_usb1, ddr_pxi, wlan1_adc, _, _, _, _),
1444 [65] = PINGROUP(65, EAST, grfc, atest_usb1, ddr_pxi, wlan2_adc, _, _, _, _, _),
1445 [66] = PINGROUP(66, EAST, grfc, _, _, _, _, _, _, _, _),
1446 [67] = PINGROUP(67, EAST, grfc, _, _, _, _, _, _, _, _),
1447 [68] = PINGROUP(68, EAST, grfc, pa_indicator, atest_usb3, ddr_pxi, wlan2_adc, _, _, _, _),
1448 [69] = PINGROUP(69, EAST, mss_lte, _, _, _, _, _, _, _, _),
1449 [70] = PINGROUP(70, EAST, mss_lte, _, _, _, _, _, _, _, _),
1450 [71] = PINGROUP(71, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _),
1451 [72] = PINGROUP(72, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _),
1452 [73] = PINGROUP(73, EAST, _, grfc, atest_usb3, ddr_pxi, _, _, _, _, _),
1453 [74] = PINGROUP(74, EAST, _, grfc, tgu, atest_usb3, ddr_pxi, _, _, _, _),
1454 [75] = PINGROUP(75, EAST, _, grfc, tgu, atest_usb4, ddr_pxi, _, _, _, _),
1455 [76] = PINGROUP(76, EAST, _, grfc, gps, nav_pps, nav_pps, tgu, atest_usb4, ddr_pxi, _),
1456 [77] = PINGROUP(77, EAST, _, grfc, gps, nav_pps, nav_pps, tgu, atest_usb4, ddr_pxi, _),
1457 [78] = PINGROUP(78, EAST, _, grfc, _, atest_usb4, ddr_pxi, _, _, _, _),
1458 [79] = PINGROUP(79, EAST, _, grfc, _, _, _, _, _, _, _),
1459 [80] = PINGROUP(80, EAST, _, grfc, _, _, _, _, _, _, _),
1460 [81] = PINGROUP(81, EAST, _, grfc, gps, nav_pps, nav_pps, qdss_cti, _, emac_pps, _),
1461 [82] = PINGROUP(82, EAST, _, grfc, gps, nav_pps, nav_pps, mdp_vsync, qdss_cti, _, _),
1462 [83] = PINGROUP(83, EAST, qup12, qup16, _, _, _, _, _, _, _),
1463 [84] = PINGROUP(84, EAST, qup12, qup16, _, _, _, _, _, _, _),
1464 [85] = PINGROUP(85, EAST, qup12, qup16, _, _, _, _, _, _, _),
1465 [86] = PINGROUP(86, EAST, qup12, qup16, _, _, _, _, _, _, _),
1466 [87] = PINGROUP(87, SOUTH, _, _, _, _, _, _, _, _, _),
1467 [88] = PINGROUP(88, EAST, tsif1, qup8, qspi0_cs, tgu, atest_usb4, ddr_pxi, _, _, _),
1468 [89] = PINGROUP(89, EAST, tsif1, qup8, qspi0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mdp_vsync4, mdp_vsync5),
1469 [90] = PINGROUP(90, EAST, tsif1, qup8, qspi0, sdc4_cmd, tgu, qdss_cti, atest_usb0, ddr_pxi, _),
1470 [91] = PINGROUP(91, EAST, tsif1, qup8, qspi0, sdc4, vfr_1, tgu, atest_usb0, _, _),
1471 [92] = PINGROUP(92, EAST, tsif2, qup11, qspi0_clk, sdc4_clk, qdss_gpio, atest_usb0, _, _, _),
1472 [93] = PINGROUP(93, EAST, tsif2, qup11, qspi0, sdc4, atest_tsens, atest_usb0, _, _, _),
1473 [94] = PINGROUP(94, EAST, tsif2, qup11, qspi0_cs, sdc4, _, atest_usb0, _, _, _),
1474 [95] = PINGROUP(95, EAST, tsif2, qup11, sdc4, qup_l4, atest_usb2, _, _, _, _),
1475 [96] = PINGROUP(96, WEST, tsif2, qup_l5, _, _, _, _, _, _, _),
1476 [97] = PINGROUP(97, WEST, sd_write, tsif1, qup_l6, _, _, _, _, _, _),
1477 [98] = PINGROUP(98, WEST, qup7, ddr_bist, _, _, _, _, _, _, _),
1478 [99] = PINGROUP(99, WEST, qup7, ddr_bist, _, _, _, _, _, _, _),
1479 [100] = PINGROUP(100, WEST, qup7, pll_bypassnl, _, _, _, _, _, _, _),
1480 [101] = PINGROUP(101, WEST, qup7, pll_reset, _, _, _, _, _, _, _),
1481 [102] = PINGROUP(102, SOUTH, pci_e1, _, phase_flag, atest_usb2, _, _, _, _, _),
1482 [103] = PINGROUP(103, SOUTH, pci_e1, _, _, _, _, _, _, _, _),
1483 [104] = PINGROUP(104, SOUTH, _, _, _, _, _, _, _, _, _),
1484 [105] = PINGROUP(105, WEST, uim2, _, _, _, _, _, _, _, _),
1485 [106] = PINGROUP(106, WEST, uim2, _, _, _, _, _, _, _, _),
1486 [107] = PINGROUP(107, WEST, uim2, _, _, _, _, _, _, _, _),
1487 [108] = PINGROUP(108, WEST, uim2, _, _, _, _, _, _, _, _),
1488 [109] = PINGROUP(109, WEST, uim1, _, _, _, _, _, _, _, _),
1489 [110] = PINGROUP(110, WEST, uim1, _, _, _, _, _, _, _, _),
1490 [111] = PINGROUP(111, WEST, uim1, _, _, _, _, _, _, _, _),
1491 [112] = PINGROUP(112, WEST, uim1, _, _, _, _, _, _, _, _),
1492 [113] = PINGROUP(113, WEST, uim_batt, usb2phy_ac, aoss_cti, _, _, _, _, _, _),
1493 [114] = PINGROUP(114, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _),
1494 [115] = PINGROUP(115, WEST, qup1, rgmii, adsp_ext, _, qdss_gpio, _, _, _, _),
1495 [116] = PINGROUP(116, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _),
1496 [117] = PINGROUP(117, WEST, qup1, rgmii, _, qdss_gpio, _, _, _, _, _),
1497 [118] = PINGROUP(118, WEST, rgmii, _, qdss_gpio, _, _, _, _, _, _),
1498 [119] = PINGROUP(119, WEST, qup5, rgmii, _, qdss_gpio, _, _, _, _, _),
1499 [120] = PINGROUP(120, WEST, qup5, rgmii, _, phase_flag, qdss_gpio, _, _, _, _),
1500 [121] = PINGROUP(121, WEST, qup5, rgmii, _, phase_flag, qdss_gpio, atest_usb2, _, _, _),
1501 [122] = PINGROUP(122, WEST, qup5, rgmii, _, phase_flag, atest_usb2, _, _, _, _),
1502 [123] = PINGROUP(123, SOUTH, usb2phy_ac, _, phase_flag, _, _, _, _, _, _),
1503 [124] = PINGROUP(124, SOUTH, emac_phy, _, _, _, _, _, _, _, _),
1504 [125] = PINGROUP(125, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1505 [126] = PINGROUP(126, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _),
1506 [127] = PINGROUP(127, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _),
1507 [128] = PINGROUP(128, WEST, sec_mi2s, qup2, _, _, _, _, _, _, _),
1508 [129] = PINGROUP(129, WEST, sec_mi2s, qup2, jitter_bist, _, _, _, _, _, _),
1509 [130] = PINGROUP(130, WEST, sec_mi2s, pll_bist, _, qdss_gpio, _, _, _, _, _),
1510 [131] = PINGROUP(131, WEST, ter_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1511 [132] = PINGROUP(132, WEST, ter_mi2s, _, qdss_gpio, _, _, _, _, _, _),
1512 [133] = PINGROUP(133, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _),
1513 [134] = PINGROUP(134, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _),
1514 [135] = PINGROUP(135, WEST, ter_mi2s, _, qdss_gpio, atest_char, _, _, _, _, _),
1515 [136] = PINGROUP(136, WEST, qua_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1516 [137] = PINGROUP(137, WEST, qua_mi2s, gcc_gp2, _, _, _, _, _, _, _),
1517 [138] = PINGROUP(138, WEST, qua_mi2s, gcc_gp3, _, _, _, _, _, _, _),
1518 [139] = PINGROUP(139, WEST, qua_mi2s, gcc_gp4, _, _, _, _, _, _, _),
1519 [140] = PINGROUP(140, WEST, qua_mi2s, gcc_gp5, _, atest_char, _, _, _, _, _),
1520 [141] = PINGROUP(141, WEST, qua_mi2s, qdss_cti, _, _, _, _, _, _, _),
1521 [142] = PINGROUP(142, WEST, qua_mi2s, _, _, qdss_cti, atest_char, _, _, _, _),
1522 [143] = PINGROUP(143, WEST, pri_mi2s, _, _, _, _, _, _, _, _),
1523 [144] = PINGROUP(144, WEST, pri_mi2s, qup3, _, _, _, _, _, _, _),
1524 [145] = PINGROUP(145, WEST, pri_mi2s_ws, qup3, ddr_bist, _, _, _, _, _, _),
1525 [146] = PINGROUP(146, WEST, pri_mi2s, qup3, ddr_bist, _, _, _, _, _, _),
1526 [147] = PINGROUP(147, WEST, pri_mi2s, qup3, _, _, _, _, _, _, _),
1527 [148] = PINGROUP(148, WEST, spkr_i2s, audio_ref, _, phase_flag, _, _, _, _, _),
1528 [149] = PINGROUP(149, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _),
1529 [150] = PINGROUP(150, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, tsense_pwm1, tsense_pwm2, _, _, _),
1530 [151] = PINGROUP(151, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _),
1531 [152] = PINGROUP(152, WEST, lpass_slimbus, spkr_i2s, _, phase_flag, _, _, _, _, _),
1532 [153] = PINGROUP(153, WEST, btfm_slimbus, _, _, _, _, _, _, _, _),
1533 [154] = PINGROUP(154, WEST, btfm_slimbus, _, _, _, _, _, _, _, _),
1534 [155] = PINGROUP(155, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1535 [156] = PINGROUP(156, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1536 [157] = PINGROUP(157, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1537 [158] = PINGROUP(158, WEST, hs1_mi2s, _, phase_flag, _, _, _, _, _, _),
1538 [159] = PINGROUP(159, WEST, hs1_mi2s, cri_trng, _, phase_flag, _, _, _, _, _),
1539 [160] = PINGROUP(160, WEST, hs2_mi2s, cri_trng, _, phase_flag, _, _, _, _, _),
1540 [161] = PINGROUP(161, WEST, hs2_mi2s, qspi1, cri_trng, _, phase_flag, _, _, _, _),
1541 [162] = PINGROUP(162, WEST, hs2_mi2s, qspi1, sp_cmu, _, phase_flag, _, _, _, _),
1542 [163] = PINGROUP(163, WEST, hs2_mi2s, qspi1_clk, prng_rosc, _, phase_flag, _, _, _, _),
1543 [164] = PINGROUP(164, WEST, hs2_mi2s, qspi1_cs, _, phase_flag, _, _, _, _, _),
1544 [165] = PINGROUP(165, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1545 [166] = PINGROUP(166, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1546 [167] = PINGROUP(167, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1547 [168] = PINGROUP(168, WEST, hs3_mi2s, _, phase_flag, _, _, _, _, _, _),
1548 [169] = PINGROUP(169, SOUTH, _, _, _, _, _, _, _, _, _),
1549 [170] = PINGROUP(170, SOUTH, _, _, _, _, _, _, _, _, _),
1550 [171] = PINGROUP(171, SOUTH, _, _, _, _, _, _, _, _, _),
1551 [172] = PINGROUP(172, SOUTH, _, _, _, _, _, _, _, _, _),
1552 [173] = PINGROUP(173, SOUTH, _, _, _, _, _, _, _, _, _),
1553 [174] = PINGROUP(174, SOUTH, _, _, _, _, _, _, _, _, _),
1554 [175] = PINGROUP(175, SOUTH, pci_e2, _, _, _, _, _, _, _, _),
1555 [176] = PINGROUP(176, SOUTH, pci_e2, cci_async, _, _, _, _, _, _, _),
1556 [177] = PINGROUP_OFFSET(177, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _),
1557 [178] = PINGROUP_OFFSET(178, SOUTH, 0x1e000, pci_e3, cci_timer4, _, _, _, _, _, _, _),
1558 [179] = PINGROUP_OFFSET(179, SOUTH, 0x1e000, pci_e3, cam_mclk, _, _, _, _, _, _, _),
1559 [180] = PINGROUP_OFFSET(180, SOUTH, 0x1e000, cam_mclk, _, _, _, _, _, _, _, _),
1560 [181] = PINGROUP_OFFSET(181, SOUTH, 0x1e000, qup19, cam_mclk, _, _, _, _, _, _, _),
1561 [182] = PINGROUP_OFFSET(182, SOUTH, 0x1e000, qup19, cci_timer5, gcc_gp4, _, _, _, _, _, _),
1562 [183] = PINGROUP_OFFSET(183, SOUTH, 0x1e000, qup19, cci_timer6, gcc_gp5, _, _, _, _, _, _),
1563 [184] = PINGROUP_OFFSET(184, SOUTH, 0x1e000, qup19, cci_timer7, _, _, _, _, _, _, _),
1564 [185] = PINGROUP_OFFSET(185, SOUTH, 0x1e000, cci_timer8, cci_async, _, _, _, _, _, _, _),
1565 [186] = PINGROUP_OFFSET(186, SOUTH, 0x1e000, cci_timer9, cci_async, _, _, _, _, _, _, _),
1566 [187] = PINGROUP_OFFSET(187, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _),
1567 [188] = PINGROUP_OFFSET(188, SOUTH, 0x1e000, _, _, _, _, _, _, _, _, _),
1568 [189] = PINGROUP_OFFSET(189, SOUTH, 0x1e000, dp_hot, _, _, _, _, _, _, _, _),
1569 [190] = UFS_RESET(ufs_reset),
1570 [191] = SDC_QDSD_PINGROUP(sdc2_clk, 0x4b2000, 14, 6),
1571 [192] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x4b2000, 11, 3),
1572 [193] = SDC_QDSD_PINGROUP(sdc2_data, 0x4b2000, 9, 0),
1575 static const int sc8180x_acpi_reserved_gpios[] = {
1582 static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = {
1583 { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, { 12, 104 },
1584 { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, { 30, 39 }, { 36, 43 },
1585 { 37, 43 }, { 38, 45 }, { 39, 118 }, { 39, 125 }, { 41, 47 },
1586 { 42, 48 }, { 46, 50 }, { 47, 49 }, { 48, 51 }, { 49, 53 }, { 50, 52 },
1587 { 51, 116 }, { 51, 123 }, { 53, 54 }, { 54, 55 }, { 55, 56 },
1588 { 56, 57 }, { 58, 58 }, { 60, 60 }, { 68, 62 }, { 70, 63 }, { 76, 86 },
1589 { 77, 36 }, { 81, 64 }, { 83, 65 }, { 86, 67 }, { 87, 84 }, { 88, 117 },
1590 { 88, 124 }, { 90, 69 }, { 91, 70 }, { 93, 75 }, { 95, 72 }, { 97, 74 },
1591 { 101, 76 }, { 103, 77 }, { 104, 78 }, { 114, 82 }, { 117, 85 },
1592 { 118, 101 }, { 119, 87 }, { 120, 88 }, { 121, 89 }, { 122, 90 },
1593 { 123, 91 }, { 124, 92 }, { 125, 93 }, { 129, 94 }, { 132, 105 },
1594 { 133, 35 }, { 134, 36 }, { 136, 97 }, { 142, 103 }, { 144, 115 },
1595 { 144, 122 }, { 147, 106 }, { 150, 107 }, { 152, 108 }, { 153, 109 },
1596 { 177, 111 }, { 180, 112 }, { 184, 113 }, { 189, 114 }
1599 static struct msm_pinctrl_soc_data sc8180x_pinctrl = {
1600 .tiles = sc8180x_tiles,
1601 .ntiles = ARRAY_SIZE(sc8180x_tiles),
1602 .pins = sc8180x_pins,
1603 .npins = ARRAY_SIZE(sc8180x_pins),
1604 .functions = sc8180x_functions,
1605 .nfunctions = ARRAY_SIZE(sc8180x_functions),
1606 .groups = sc8180x_groups,
1607 .ngroups = ARRAY_SIZE(sc8180x_groups),
1609 .wakeirq_map = sc8180x_pdc_map,
1610 .nwakeirq_map = ARRAY_SIZE(sc8180x_pdc_map),
1613 static const struct msm_pinctrl_soc_data sc8180x_acpi_pinctrl = {
1614 .tiles = sc8180x_tiles,
1615 .ntiles = ARRAY_SIZE(sc8180x_tiles),
1616 .pins = sc8180x_pins,
1617 .npins = ARRAY_SIZE(sc8180x_pins),
1618 .groups = sc8180x_groups,
1619 .ngroups = ARRAY_SIZE(sc8180x_groups),
1620 .reserved_gpios = sc8180x_acpi_reserved_gpios,
1625 * ACPI DSDT has one single memory resource for TLMM, which voilates the
1626 * hardware layout of 3 sepearte tiles. Let's split the memory resource into
1627 * 3 named ones, so that msm_pinctrl_probe() can map memory for ACPI in the
1628 * same way as for DT probe.
1630 static int sc8180x_pinctrl_add_tile_resources(struct platform_device *pdev)
1632 int nres_num = pdev->num_resources + ARRAY_SIZE(sc8180x_tiles) - 1;
1633 struct resource *mres, *nres, *res;
1637 * DT already has tiles defined properly, so nothing needs to be done
1640 if (pdev->dev.of_node)
1643 /* Allocate for new resources */
1644 nres = devm_kzalloc(&pdev->dev, sizeof(*nres) * nres_num, GFP_KERNEL);
1650 for (i = 0; i < pdev->num_resources; i++) {
1651 struct resource *r = &pdev->resource[i];
1653 /* Save memory resource and copy others */
1654 if (resource_type(r) == IORESOURCE_MEM)
1660 /* Append tile memory resources */
1661 for (i = 0; i < ARRAY_SIZE(sc8180x_tiles); i++, res++) {
1662 const struct tile_info *info = &sc8180x_tile_info[i];
1664 res->start = mres->start + info->offset;
1665 res->end = mres->start + info->offset + info->size - 1;
1666 res->flags = mres->flags;
1667 res->name = sc8180x_tiles[i];
1669 /* Add new MEM to resource tree */
1670 insert_resource(mres->parent, res);
1673 /* Remove old MEM from resource tree */
1674 remove_resource(mres);
1676 /* Free old resources and install new ones */
1677 ret = platform_device_add_resources(pdev, nres, nres_num);
1679 dev_err(&pdev->dev, "failed to add new resources: %d\n", ret);
1686 static int sc8180x_pinctrl_probe(struct platform_device *pdev)
1688 const struct msm_pinctrl_soc_data *soc_data;
1691 soc_data = device_get_match_data(&pdev->dev);
1695 ret = sc8180x_pinctrl_add_tile_resources(pdev);
1699 return msm_pinctrl_probe(pdev, soc_data);
1702 static const struct acpi_device_id sc8180x_pinctrl_acpi_match[] = {
1705 .driver_data = (kernel_ulong_t) &sc8180x_acpi_pinctrl,
1709 MODULE_DEVICE_TABLE(acpi, sc8180x_pinctrl_acpi_match);
1711 static const struct of_device_id sc8180x_pinctrl_of_match[] = {
1713 .compatible = "qcom,sc8180x-tlmm",
1714 .data = &sc8180x_pinctrl,
1718 MODULE_DEVICE_TABLE(of, sc8180x_pinctrl_of_match);
1720 static struct platform_driver sc8180x_pinctrl_driver = {
1722 .name = "sc8180x-pinctrl",
1723 .of_match_table = sc8180x_pinctrl_of_match,
1724 .acpi_match_table = sc8180x_pinctrl_acpi_match,
1726 .probe = sc8180x_pinctrl_probe,
1727 .remove = msm_pinctrl_remove,
1730 static int __init sc8180x_pinctrl_init(void)
1732 return platform_driver_register(&sc8180x_pinctrl_driver);
1734 arch_initcall(sc8180x_pinctrl_init);
1736 static void __exit sc8180x_pinctrl_exit(void)
1738 platform_driver_unregister(&sc8180x_pinctrl_driver);
1740 module_exit(sc8180x_pinctrl_exit);
1742 MODULE_DESCRIPTION("QTI SC8180x pinctrl driver");
1743 MODULE_LICENSE("GPL v2");