1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP pin controller
5 * Copyright (C) 2020, 2021 Xilinx, Inc.
7 * Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
8 * Rajan Vaja <rajan.vaja@xilinx.com>
11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/platform_device.h>
17 #include <linux/firmware/xlnx-zynqmp.h>
19 #include <linux/pinctrl/pinmux.h>
20 #include <linux/pinctrl/pinconf-generic.h>
23 #include "pinctrl-utils.h"
25 #define ZYNQMP_PIN_PREFIX "MIO"
26 #define PINCTRL_GET_FUNC_NAME_RESP_LEN 16
27 #define MAX_FUNC_NAME_LEN 16
28 #define MAX_GROUP_PIN 50
29 #define MAX_PIN_GROUPS 50
30 #define END_OF_FUNCTIONS "END_OF_FUNCTIONS"
31 #define NUM_GROUPS_PER_RESP 6
33 #define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12
34 #define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12
35 #define NA_GROUP 0xFFFF
36 #define RESERVED_GROUP 0xFFFE
38 #define DRIVE_STRENGTH_2MA 2
39 #define DRIVE_STRENGTH_4MA 4
40 #define DRIVE_STRENGTH_8MA 8
41 #define DRIVE_STRENGTH_12MA 12
44 * struct zynqmp_pmux_function - a pinmux function
45 * @name: Name of the pin mux function
46 * @groups: List of pin groups for this function
47 * @ngroups: Number of entries in @groups
48 * @node: Firmware node matching with the function
50 * This structure holds information about pin control function
51 * and function group names supporting that function.
53 struct zynqmp_pmux_function {
54 char name[MAX_FUNC_NAME_LEN];
55 const char * const *groups;
60 * struct zynqmp_pinctrl - driver data
61 * @pctrl: Pin control device
63 * @ngroups: Number of @groups
64 * @funcs: Pin mux functions
65 * @nfuncs: Number of @funcs
67 * This struct is stored as driver data and used to retrieve
68 * information regarding pin control functions, groups and
71 struct zynqmp_pinctrl {
72 struct pinctrl_dev *pctrl;
73 const struct zynqmp_pctrl_group *groups;
75 const struct zynqmp_pmux_function *funcs;
80 * struct zynqmp_pctrl_group - Pin control group info
82 * @pins: Group pin numbers
83 * @npins: Number of pins in the group
85 struct zynqmp_pctrl_group {
87 unsigned int pins[MAX_GROUP_PIN];
91 static struct pinctrl_desc zynqmp_desc;
93 static int zynqmp_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
95 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
97 return pctrl->ngroups;
100 static const char *zynqmp_pctrl_get_group_name(struct pinctrl_dev *pctldev,
101 unsigned int selector)
103 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
105 return pctrl->groups[selector].name;
108 static int zynqmp_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
109 unsigned int selector,
110 const unsigned int **pins,
113 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
115 *pins = pctrl->groups[selector].pins;
116 *npins = pctrl->groups[selector].npins;
121 static const struct pinctrl_ops zynqmp_pctrl_ops = {
122 .get_groups_count = zynqmp_pctrl_get_groups_count,
123 .get_group_name = zynqmp_pctrl_get_group_name,
124 .get_group_pins = zynqmp_pctrl_get_group_pins,
125 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
126 .dt_free_map = pinctrl_utils_free_map,
129 static int zynqmp_pinmux_request_pin(struct pinctrl_dev *pctldev,
134 ret = zynqmp_pm_pinctrl_request(pin);
136 dev_err(pctldev->dev, "request failed for pin %u\n", pin);
143 static int zynqmp_pmux_get_functions_count(struct pinctrl_dev *pctldev)
145 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
147 return pctrl->nfuncs;
150 static const char *zynqmp_pmux_get_function_name(struct pinctrl_dev *pctldev,
151 unsigned int selector)
153 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
155 return pctrl->funcs[selector].name;
159 * zynqmp_pmux_get_function_groups() - Get groups for the function
160 * @pctldev: Pincontrol device pointer.
161 * @selector: Function ID
162 * @groups: Group names.
163 * @num_groups: Number of function groups.
165 * Get function's group count and group names.
167 static int zynqmp_pmux_get_function_groups(struct pinctrl_dev *pctldev,
168 unsigned int selector,
169 const char * const **groups,
170 unsigned * const num_groups)
172 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
174 *groups = pctrl->funcs[selector].groups;
175 *num_groups = pctrl->funcs[selector].ngroups;
181 * zynqmp_pinmux_set_mux() - Set requested function for the group
182 * @pctldev: Pincontrol device pointer.
183 * @function: Function ID.
186 * Loop through all pins of the group and call firmware API
187 * to set requested function for all pins in the group.
189 * Return: 0 on success else error code.
191 static int zynqmp_pinmux_set_mux(struct pinctrl_dev *pctldev,
192 unsigned int function,
195 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
196 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[group];
199 for (i = 0; i < pgrp->npins; i++) {
200 unsigned int pin = pgrp->pins[i];
202 ret = zynqmp_pm_pinctrl_set_function(pin, function);
204 dev_err(pctldev->dev, "set mux failed for pin %u\n",
213 static int zynqmp_pinmux_release_pin(struct pinctrl_dev *pctldev,
218 ret = zynqmp_pm_pinctrl_release(pin);
220 dev_err(pctldev->dev, "free pin failed for pin %u\n",
228 static const struct pinmux_ops zynqmp_pinmux_ops = {
229 .request = zynqmp_pinmux_request_pin,
230 .get_functions_count = zynqmp_pmux_get_functions_count,
231 .get_function_name = zynqmp_pmux_get_function_name,
232 .get_function_groups = zynqmp_pmux_get_function_groups,
233 .set_mux = zynqmp_pinmux_set_mux,
234 .free = zynqmp_pinmux_release_pin,
238 * zynqmp_pinconf_cfg_get() - get config value for the pin
239 * @pctldev: Pin control device pointer.
241 * @config: Value of config param.
243 * Get value of the requested configuration parameter for the
246 * Return: 0 on success else error code.
248 static int zynqmp_pinconf_cfg_get(struct pinctrl_dev *pctldev,
250 unsigned long *config)
252 unsigned int arg, param = pinconf_to_config_param(*config);
256 case PIN_CONFIG_SLEW_RATE:
257 param = PM_PINCTRL_CONFIG_SLEW_RATE;
258 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
260 case PIN_CONFIG_BIAS_PULL_UP:
261 param = PM_PINCTRL_CONFIG_PULL_CTRL;
262 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
263 if (arg != PM_PINCTRL_BIAS_PULL_UP)
268 case PIN_CONFIG_BIAS_PULL_DOWN:
269 param = PM_PINCTRL_CONFIG_PULL_CTRL;
270 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
271 if (arg != PM_PINCTRL_BIAS_PULL_DOWN)
276 case PIN_CONFIG_BIAS_DISABLE:
277 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
278 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
279 if (arg != PM_PINCTRL_BIAS_DISABLE)
284 case PIN_CONFIG_POWER_SOURCE:
285 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
286 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
288 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
289 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
290 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
292 case PIN_CONFIG_DRIVE_STRENGTH:
293 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
294 ret = zynqmp_pm_pinctrl_get_config(pin, param, &arg);
296 case PM_PINCTRL_DRIVE_STRENGTH_2MA:
297 arg = DRIVE_STRENGTH_2MA;
299 case PM_PINCTRL_DRIVE_STRENGTH_4MA:
300 arg = DRIVE_STRENGTH_4MA;
302 case PM_PINCTRL_DRIVE_STRENGTH_8MA:
303 arg = DRIVE_STRENGTH_8MA;
305 case PM_PINCTRL_DRIVE_STRENGTH_12MA:
306 arg = DRIVE_STRENGTH_12MA;
309 /* Invalid drive strength */
310 dev_warn(pctldev->dev,
311 "Invalid drive strength for pin %d\n",
324 param = pinconf_to_config_param(*config);
325 *config = pinconf_to_config_packed(param, arg);
331 * zynqmp_pinconf_cfg_set() - Set requested config for the pin
332 * @pctldev: Pincontrol device pointer.
334 * @configs: Configuration to set.
335 * @num_configs: Number of configurations.
337 * Loop through all configurations and call firmware API
338 * to set requested configurations for the pin.
340 * Return: 0 on success else error code.
342 static int zynqmp_pinconf_cfg_set(struct pinctrl_dev *pctldev,
343 unsigned int pin, unsigned long *configs,
344 unsigned int num_configs)
348 for (i = 0; i < num_configs; i++) {
349 unsigned int param = pinconf_to_config_param(configs[i]);
350 unsigned int arg = pinconf_to_config_argument(configs[i]);
354 case PIN_CONFIG_SLEW_RATE:
355 param = PM_PINCTRL_CONFIG_SLEW_RATE;
356 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
358 case PIN_CONFIG_BIAS_PULL_UP:
359 param = PM_PINCTRL_CONFIG_PULL_CTRL;
360 arg = PM_PINCTRL_BIAS_PULL_UP;
361 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
363 case PIN_CONFIG_BIAS_PULL_DOWN:
364 param = PM_PINCTRL_CONFIG_PULL_CTRL;
365 arg = PM_PINCTRL_BIAS_PULL_DOWN;
366 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
368 case PIN_CONFIG_BIAS_DISABLE:
369 param = PM_PINCTRL_CONFIG_BIAS_STATUS;
370 arg = PM_PINCTRL_BIAS_DISABLE;
371 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
373 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
374 param = PM_PINCTRL_CONFIG_SCHMITT_CMOS;
375 ret = zynqmp_pm_pinctrl_set_config(pin, param, arg);
377 case PIN_CONFIG_DRIVE_STRENGTH:
379 case DRIVE_STRENGTH_2MA:
380 value = PM_PINCTRL_DRIVE_STRENGTH_2MA;
382 case DRIVE_STRENGTH_4MA:
383 value = PM_PINCTRL_DRIVE_STRENGTH_4MA;
385 case DRIVE_STRENGTH_8MA:
386 value = PM_PINCTRL_DRIVE_STRENGTH_8MA;
388 case DRIVE_STRENGTH_12MA:
389 value = PM_PINCTRL_DRIVE_STRENGTH_12MA;
392 /* Invalid drive strength */
393 dev_warn(pctldev->dev,
394 "Invalid drive strength for pin %d\n",
399 param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH;
400 ret = zynqmp_pm_pinctrl_set_config(pin, param, value);
402 case PIN_CONFIG_POWER_SOURCE:
403 param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS;
404 ret = zynqmp_pm_pinctrl_get_config(pin, param, &value);
407 dev_warn(pctldev->dev,
408 "Invalid IO Standard requested for pin %d\n",
412 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
413 case PIN_CONFIG_MODE_LOW_POWER:
415 * These cases are mentioned in dts but configurable
416 * registers are unknown. So falling through to ignore
417 * boot time warnings as of now.
422 dev_warn(pctldev->dev,
423 "unsupported configuration parameter '%u'\n",
429 param = pinconf_to_config_param(configs[i]);
430 arg = pinconf_to_config_argument(configs[i]);
432 dev_warn(pctldev->dev,
433 "failed to set: pin %u param %u value %u\n",
441 * zynqmp_pinconf_group_set() - Set requested config for the group
442 * @pctldev: Pincontrol device pointer.
443 * @selector: Group ID.
444 * @configs: Configuration to set.
445 * @num_configs: Number of configurations.
447 * Call function to set configs for each pin in the group.
449 * Return: 0 on success else error code.
451 static int zynqmp_pinconf_group_set(struct pinctrl_dev *pctldev,
452 unsigned int selector,
453 unsigned long *configs,
454 unsigned int num_configs)
457 struct zynqmp_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
458 const struct zynqmp_pctrl_group *pgrp = &pctrl->groups[selector];
460 for (i = 0; i < pgrp->npins; i++) {
461 ret = zynqmp_pinconf_cfg_set(pctldev, pgrp->pins[i], configs,
470 static const struct pinconf_ops zynqmp_pinconf_ops = {
472 .pin_config_get = zynqmp_pinconf_cfg_get,
473 .pin_config_set = zynqmp_pinconf_cfg_set,
474 .pin_config_group_set = zynqmp_pinconf_group_set,
477 static struct pinctrl_desc zynqmp_desc = {
478 .name = "zynqmp_pinctrl",
479 .owner = THIS_MODULE,
480 .pctlops = &zynqmp_pctrl_ops,
481 .pmxops = &zynqmp_pinmux_ops,
482 .confops = &zynqmp_pinconf_ops,
485 static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups)
487 struct zynqmp_pm_query_data qdata = {0};
488 u32 payload[PAYLOAD_ARG_CNT];
491 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_GROUPS;
495 ret = zynqmp_pm_query_data(qdata, payload);
499 memcpy(groups, &payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN);
504 static int zynqmp_pinctrl_get_func_num_groups(u32 fid, unsigned int *ngroups)
506 struct zynqmp_pm_query_data qdata = {0};
507 u32 payload[PAYLOAD_ARG_CNT];
510 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS;
513 ret = zynqmp_pm_query_data(qdata, payload);
517 *ngroups = payload[1];
523 * zynqmp_pinctrl_prepare_func_groups() - prepare function and groups data
524 * @dev: Device pointer.
526 * @func: Function data.
527 * @groups: Groups data.
529 * Query firmware to get group IDs for each function. Firmware returns
530 * group IDs. Based on the group index for the function, group names in
531 * the function are stored. For example, the first group in "eth0" function
532 * is named as "eth0_0" and the second group as "eth0_1" and so on.
534 * Based on the group ID received from the firmware, function stores name of
535 * the group for that group ID. For example, if "eth0" first group ID
536 * is x, groups[x] name will be stored as "eth0_0".
538 * Once done for each function, each function would have its group names
539 * and each group would also have their names.
541 * Return: 0 on success else error code.
543 static int zynqmp_pinctrl_prepare_func_groups(struct device *dev, u32 fid,
544 struct zynqmp_pmux_function *func,
545 struct zynqmp_pctrl_group *groups)
547 u16 resp[NUM_GROUPS_PER_RESP] = {0};
548 const char **fgroups;
551 fgroups = devm_kzalloc(dev, sizeof(*fgroups) * func->ngroups, GFP_KERNEL);
555 for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) {
556 ret = zynqmp_pinctrl_get_function_groups(fid, index, resp);
560 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
561 if (resp[i] == NA_GROUP)
564 if (resp[i] == RESERVED_GROUP)
567 fgroups[index + i] = devm_kasprintf(dev, GFP_KERNEL,
571 if (!fgroups[index + i])
574 groups[resp[i]].name = devm_kasprintf(dev, GFP_KERNEL,
578 if (!groups[resp[i]].name)
583 func->groups = fgroups;
588 static void zynqmp_pinctrl_get_function_name(u32 fid, char *name)
590 struct zynqmp_pm_query_data qdata = {0};
591 u32 payload[PAYLOAD_ARG_CNT];
593 qdata.qid = PM_QID_PINCTRL_GET_FUNCTION_NAME;
597 * Name of the function is maximum 16 bytes and cannot
598 * accommodate the return value in SMC buffers, hence ignoring
599 * the return value for this specific qid.
601 zynqmp_pm_query_data(qdata, payload);
602 memcpy(name, payload, PINCTRL_GET_FUNC_NAME_RESP_LEN);
605 static int zynqmp_pinctrl_get_num_functions(unsigned int *nfuncs)
607 struct zynqmp_pm_query_data qdata = {0};
608 u32 payload[PAYLOAD_ARG_CNT];
611 qdata.qid = PM_QID_PINCTRL_GET_NUM_FUNCTIONS;
613 ret = zynqmp_pm_query_data(qdata, payload);
617 *nfuncs = payload[1];
622 static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups)
624 struct zynqmp_pm_query_data qdata = {0};
625 u32 payload[PAYLOAD_ARG_CNT];
628 qdata.qid = PM_QID_PINCTRL_GET_PIN_GROUPS;
632 ret = zynqmp_pm_query_data(qdata, payload);
636 memcpy(groups, &payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN);
641 static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group,
644 group->pins[group->npins++] = pin;
648 * zynqmp_pinctrl_create_pin_groups() - assign pins to respective groups
649 * @dev: Device pointer.
650 * @groups: Groups data.
653 * Query firmware to get groups available for the given pin.
654 * Based on the firmware response(group IDs for the pin), add
655 * pin number to the respective group's pin array.
657 * Once all pins are queries, each group would have its number
658 * of pins and pin numbers data.
660 * Return: 0 on success else error code.
662 static int zynqmp_pinctrl_create_pin_groups(struct device *dev,
663 struct zynqmp_pctrl_group *groups,
666 u16 resp[NUM_GROUPS_PER_RESP] = {0};
667 int ret, i, index = 0;
670 ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp);
674 for (i = 0; i < NUM_GROUPS_PER_RESP; i++) {
675 if (resp[i] == NA_GROUP)
678 if (resp[i] == RESERVED_GROUP)
681 zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin);
683 index += NUM_GROUPS_PER_RESP;
684 } while (index <= MAX_PIN_GROUPS);
690 * zynqmp_pinctrl_prepare_group_pins() - prepare each group's pin data
691 * @dev: Device pointer.
692 * @groups: Groups data.
693 * @ngroups: Number of groups.
695 * Prepare pin number and number of pins data for each pins.
697 * Return: 0 on success else error code.
699 static int zynqmp_pinctrl_prepare_group_pins(struct device *dev,
700 struct zynqmp_pctrl_group *groups,
701 unsigned int ngroups)
706 for (pin = 0; pin < zynqmp_desc.npins; pin++) {
707 ret = zynqmp_pinctrl_create_pin_groups(dev, groups, pin);
716 * zynqmp_pinctrl_prepare_function_info() - prepare function info
717 * @dev: Device pointer.
718 * @pctrl: Pin control driver data.
720 * Query firmware for functions, groups and pin information and
721 * prepare pin control driver data.
723 * Query number of functions and number of function groups (number
724 * of groups in the given function) to allocate required memory buffers
725 * for functions and groups. Once buffers are allocated to store
726 * functions and groups data, query and store required information
727 * (number of groups and group names for each function, number of
728 * pins and pin numbers for each group).
730 * Return: 0 on success else error code.
732 static int zynqmp_pinctrl_prepare_function_info(struct device *dev,
733 struct zynqmp_pinctrl *pctrl)
735 struct zynqmp_pmux_function *funcs;
736 struct zynqmp_pctrl_group *groups;
739 ret = zynqmp_pinctrl_get_num_functions(&pctrl->nfuncs);
743 funcs = devm_kzalloc(dev, sizeof(*funcs) * pctrl->nfuncs, GFP_KERNEL);
747 for (i = 0; i < pctrl->nfuncs; i++) {
748 zynqmp_pinctrl_get_function_name(i, funcs[i].name);
750 ret = zynqmp_pinctrl_get_func_num_groups(i, &funcs[i].ngroups);
754 pctrl->ngroups += funcs[i].ngroups;
757 groups = devm_kzalloc(dev, sizeof(*groups) * pctrl->ngroups, GFP_KERNEL);
761 for (i = 0; i < pctrl->nfuncs; i++) {
762 ret = zynqmp_pinctrl_prepare_func_groups(dev, i, &funcs[i],
768 ret = zynqmp_pinctrl_prepare_group_pins(dev, groups, pctrl->ngroups);
772 pctrl->funcs = funcs;
773 pctrl->groups = groups;
778 static int zynqmp_pinctrl_get_num_pins(unsigned int *npins)
780 struct zynqmp_pm_query_data qdata = {0};
781 u32 payload[PAYLOAD_ARG_CNT];
784 qdata.qid = PM_QID_PINCTRL_GET_NUM_PINS;
786 ret = zynqmp_pm_query_data(qdata, payload);
796 * zynqmp_pinctrl_prepare_pin_desc() - prepare pin description info
797 * @dev: Device pointer.
798 * @zynqmp_pins: Pin information.
799 * @npins: Number of pins.
801 * Query number of pins information from firmware and prepare pin
802 * description containing pin number and pin name.
804 * Return: 0 on success else error code.
806 static int zynqmp_pinctrl_prepare_pin_desc(struct device *dev,
807 const struct pinctrl_pin_desc
811 struct pinctrl_pin_desc *pins, *pin;
815 ret = zynqmp_pinctrl_get_num_pins(npins);
819 pins = devm_kzalloc(dev, sizeof(*pins) * *npins, GFP_KERNEL);
823 for (i = 0; i < *npins; i++) {
826 pin->name = devm_kasprintf(dev, GFP_KERNEL, "%s%d",
827 ZYNQMP_PIN_PREFIX, i);
837 static int zynqmp_pinctrl_probe(struct platform_device *pdev)
839 struct zynqmp_pinctrl *pctrl;
842 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
846 ret = zynqmp_pinctrl_prepare_pin_desc(&pdev->dev,
850 dev_err(&pdev->dev, "pin desc prepare fail with %d\n", ret);
854 ret = zynqmp_pinctrl_prepare_function_info(&pdev->dev, pctrl);
856 dev_err(&pdev->dev, "function info prepare fail with %d\n", ret);
860 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &zynqmp_desc, pctrl);
861 if (IS_ERR(pctrl->pctrl))
862 return PTR_ERR(pctrl->pctrl);
864 platform_set_drvdata(pdev, pctrl);
869 static const struct of_device_id zynqmp_pinctrl_of_match[] = {
870 { .compatible = "xlnx,zynqmp-pinctrl" },
873 MODULE_DEVICE_TABLE(of, zynqmp_pinctrl_of_match);
875 static struct platform_driver zynqmp_pinctrl_driver = {
877 .name = "zynqmp-pinctrl",
878 .of_match_table = zynqmp_pinctrl_of_match,
880 .probe = zynqmp_pinctrl_probe,
882 module_platform_driver(zynqmp_pinctrl_driver);
884 MODULE_AUTHOR("Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>");
885 MODULE_DESCRIPTION("ZynqMP Pin Controller Driver");
886 MODULE_LICENSE("GPL v2");