2 * Generic device tree based pinctrl driver for one register per pin
3 * type pinmux controllers
5 * Copyright (C) 2012 Texas Instruments, Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/list.h>
20 #include <linux/of_device.h>
21 #include <linux/of_address.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
28 #define DRIVER_NAME "pinctrl-single"
29 #define PCS_MUX_PINS_NAME "pinctrl-single,pins"
30 #define PCS_MUX_BITS_NAME "pinctrl-single,bits"
31 #define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1)
32 #define PCS_OFF_DISABLED ~0U
35 * struct pcs_pingroup - pingroups for a function
36 * @np: pingroup device node pointer
37 * @name: pingroup name
38 * @gpins: array of the pins in the group
39 * @ngpins: number of pins in the group
43 struct device_node *np;
47 struct list_head node;
51 * struct pcs_func_vals - mux function register offset and value pair
52 * @reg: register virtual address
53 * @val: register value
55 struct pcs_func_vals {
62 * struct pcs_function - pinctrl function
63 * @name: pinctrl function name
64 * @vals: register and vals array
65 * @nvals: number of entries in vals array
66 * @pgnames: array of pingroup names the function uses
67 * @npgnames: number of pingroup names the function uses
72 struct pcs_func_vals *vals;
76 struct list_head node;
80 * struct pcs_data - wrapper for data needed by pinctrl framework
82 * @cur: index to current element
84 * REVISIT: We should be able to drop this eventually by adding
85 * support for registering pins individually in the pinctrl
86 * framework for those drivers that don't need a static array.
89 struct pinctrl_pin_desc *pa;
94 * struct pcs_name - register name for a pin
95 * @name: name of the pinctrl register
97 * REVISIT: We may want to make names optional in the pinctrl
98 * framework as some drivers may not care about pin names to
99 * avoid kernel bloat. The pin names can be deciphered by user
100 * space tools using debugfs based on the register address and
101 * SoC packaging information.
104 char name[PCS_REG_NAME_LEN];
108 * struct pcs_device - pinctrl device instance
110 * @base: virtual address of the controller
111 * @size: size of the ioremapped area
113 * @pctl: pin controller device
114 * @mutex: mutex protecting the lists
115 * @width: bits per mux register
116 * @fmask: function register mask
117 * @fshift: function register shift
118 * @foff: value to turn mux off
119 * @fmax: max number of functions in fmask
120 * @names: array of register names for pins
121 * @pins: physical pins on the SoC
122 * @pgtree: pingroup index radix tree
123 * @ftree: function index radix tree
124 * @pingroups: list of pingroups
125 * @functions: list of functions
126 * @ngroups: number of pingroups
127 * @nfuncs: number of functions
128 * @desc: pin controller descriptor
129 * @read: register read function to use
130 * @write: register write function to use
133 struct resource *res;
137 struct pinctrl_dev *pctl;
145 struct pcs_name *names;
146 struct pcs_data pins;
147 struct radix_tree_root pgtree;
148 struct radix_tree_root ftree;
149 struct list_head pingroups;
150 struct list_head functions;
153 struct pinctrl_desc desc;
154 unsigned (*read)(void __iomem *reg);
155 void (*write)(unsigned val, void __iomem *reg);
159 * REVISIT: Reads and writes could eventually use regmap or something
160 * generic. But at least on omaps, some mux registers are performance
161 * critical as they may need to be remuxed every time before and after
162 * idle. Adding tests for register access width for every read and
163 * write like regmap is doing is not desired, and caching the registers
164 * does not help in this case.
167 static unsigned __maybe_unused pcs_readb(void __iomem *reg)
172 static unsigned __maybe_unused pcs_readw(void __iomem *reg)
177 static unsigned __maybe_unused pcs_readl(void __iomem *reg)
182 static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg)
187 static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg)
192 static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
197 static int pcs_get_groups_count(struct pinctrl_dev *pctldev)
199 struct pcs_device *pcs;
201 pcs = pinctrl_dev_get_drvdata(pctldev);
206 static const char *pcs_get_group_name(struct pinctrl_dev *pctldev,
209 struct pcs_device *pcs;
210 struct pcs_pingroup *group;
212 pcs = pinctrl_dev_get_drvdata(pctldev);
213 group = radix_tree_lookup(&pcs->pgtree, gselector);
215 dev_err(pcs->dev, "%s could not find pingroup%i\n",
216 __func__, gselector);
223 static int pcs_get_group_pins(struct pinctrl_dev *pctldev,
225 const unsigned **pins,
228 struct pcs_device *pcs;
229 struct pcs_pingroup *group;
231 pcs = pinctrl_dev_get_drvdata(pctldev);
232 group = radix_tree_lookup(&pcs->pgtree, gselector);
234 dev_err(pcs->dev, "%s could not find pingroup%i\n",
235 __func__, gselector);
239 *pins = group->gpins;
240 *npins = group->ngpins;
245 static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
249 struct pcs_device *pcs;
252 pcs = pinctrl_dev_get_drvdata(pctldev);
254 val = pcs->read(pcs->base + offset);
257 seq_printf(s, "%08x %s " , val, DRIVER_NAME);
260 static void pcs_dt_free_map(struct pinctrl_dev *pctldev,
261 struct pinctrl_map *map, unsigned num_maps)
263 struct pcs_device *pcs;
265 pcs = pinctrl_dev_get_drvdata(pctldev);
266 devm_kfree(pcs->dev, map);
269 static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
270 struct device_node *np_config,
271 struct pinctrl_map **map, unsigned *num_maps);
273 static struct pinctrl_ops pcs_pinctrl_ops = {
274 .get_groups_count = pcs_get_groups_count,
275 .get_group_name = pcs_get_group_name,
276 .get_group_pins = pcs_get_group_pins,
277 .pin_dbg_show = pcs_pin_dbg_show,
278 .dt_node_to_map = pcs_dt_node_to_map,
279 .dt_free_map = pcs_dt_free_map,
282 static int pcs_get_functions_count(struct pinctrl_dev *pctldev)
284 struct pcs_device *pcs;
286 pcs = pinctrl_dev_get_drvdata(pctldev);
291 static const char *pcs_get_function_name(struct pinctrl_dev *pctldev,
294 struct pcs_device *pcs;
295 struct pcs_function *func;
297 pcs = pinctrl_dev_get_drvdata(pctldev);
298 func = radix_tree_lookup(&pcs->ftree, fselector);
300 dev_err(pcs->dev, "%s could not find function%i\n",
301 __func__, fselector);
308 static int pcs_get_function_groups(struct pinctrl_dev *pctldev,
310 const char * const **groups,
311 unsigned * const ngroups)
313 struct pcs_device *pcs;
314 struct pcs_function *func;
316 pcs = pinctrl_dev_get_drvdata(pctldev);
317 func = radix_tree_lookup(&pcs->ftree, fselector);
319 dev_err(pcs->dev, "%s could not find function%i\n",
320 __func__, fselector);
323 *groups = func->pgnames;
324 *ngroups = func->npgnames;
329 static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
332 struct pcs_device *pcs;
333 struct pcs_function *func;
336 pcs = pinctrl_dev_get_drvdata(pctldev);
337 func = radix_tree_lookup(&pcs->ftree, fselector);
341 dev_dbg(pcs->dev, "enabling %s function%i\n",
342 func->name, fselector);
344 for (i = 0; i < func->nvals; i++) {
345 struct pcs_func_vals *vals;
348 vals = &func->vals[i];
349 val = pcs->read(vals->reg);
353 mask = pcs->fmask & vals->mask;
356 val |= (vals->val & mask);
357 pcs->write(val, vals->reg);
363 static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector,
366 struct pcs_device *pcs;
367 struct pcs_function *func;
370 pcs = pinctrl_dev_get_drvdata(pctldev);
371 func = radix_tree_lookup(&pcs->ftree, fselector);
373 dev_err(pcs->dev, "%s could not find function%i\n",
374 __func__, fselector);
379 * Ignore disable if function-off is not specified. Some hardware
380 * does not have clearly defined disable function. For pin specific
381 * off modes, you can use alternate named states as described in
382 * pinctrl-bindings.txt.
384 if (pcs->foff == PCS_OFF_DISABLED) {
385 dev_dbg(pcs->dev, "ignoring disable for %s function%i\n",
386 func->name, fselector);
390 dev_dbg(pcs->dev, "disabling function%i %s\n",
391 fselector, func->name);
393 for (i = 0; i < func->nvals; i++) {
394 struct pcs_func_vals *vals;
397 vals = &func->vals[i];
398 val = pcs->read(vals->reg);
400 val |= pcs->foff << pcs->fshift;
401 pcs->write(val, vals->reg);
405 static int pcs_request_gpio(struct pinctrl_dev *pctldev,
406 struct pinctrl_gpio_range *range, unsigned offset)
411 static struct pinmux_ops pcs_pinmux_ops = {
412 .get_functions_count = pcs_get_functions_count,
413 .get_function_name = pcs_get_function_name,
414 .get_function_groups = pcs_get_function_groups,
415 .enable = pcs_enable,
416 .disable = pcs_disable,
417 .gpio_request_enable = pcs_request_gpio,
420 static int pcs_pinconf_get(struct pinctrl_dev *pctldev,
421 unsigned pin, unsigned long *config)
426 static int pcs_pinconf_set(struct pinctrl_dev *pctldev,
427 unsigned pin, unsigned long config)
432 static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev,
433 unsigned group, unsigned long *config)
438 static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev,
439 unsigned group, unsigned long config)
444 static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
445 struct seq_file *s, unsigned offset)
449 static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
450 struct seq_file *s, unsigned selector)
454 static struct pinconf_ops pcs_pinconf_ops = {
455 .pin_config_get = pcs_pinconf_get,
456 .pin_config_set = pcs_pinconf_set,
457 .pin_config_group_get = pcs_pinconf_group_get,
458 .pin_config_group_set = pcs_pinconf_group_set,
459 .pin_config_dbg_show = pcs_pinconf_dbg_show,
460 .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show,
464 * pcs_add_pin() - add a pin to the static per controller pin array
465 * @pcs: pcs driver instance
466 * @offset: register offset from base
468 static int __devinit pcs_add_pin(struct pcs_device *pcs, unsigned offset)
470 struct pinctrl_pin_desc *pin;
475 if (i >= pcs->desc.npins) {
476 dev_err(pcs->dev, "too many pins, max %i\n",
481 pin = &pcs->pins.pa[i];
483 sprintf(pn->name, "%lx",
484 (unsigned long)pcs->res->start + offset);
485 pin->name = pn->name;
493 * pcs_allocate_pin_table() - adds all the pins for the pinctrl driver
494 * @pcs: pcs driver instance
496 * In case of errors, resources are freed in pcs_free_resources.
498 * If your hardware needs holes in the address space, then just set
499 * up multiple driver instances.
501 static int __devinit pcs_allocate_pin_table(struct pcs_device *pcs)
503 int mux_bytes, nr_pins, i;
505 mux_bytes = pcs->width / BITS_PER_BYTE;
506 nr_pins = pcs->size / mux_bytes;
508 dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins);
509 pcs->pins.pa = devm_kzalloc(pcs->dev,
510 sizeof(*pcs->pins.pa) * nr_pins,
515 pcs->names = devm_kzalloc(pcs->dev,
516 sizeof(struct pcs_name) * nr_pins,
521 pcs->desc.pins = pcs->pins.pa;
522 pcs->desc.npins = nr_pins;
524 for (i = 0; i < pcs->desc.npins; i++) {
528 offset = i * mux_bytes;
529 res = pcs_add_pin(pcs, offset);
531 dev_err(pcs->dev, "error adding pins: %i\n", res);
540 * pcs_add_function() - adds a new function to the function list
541 * @pcs: pcs driver instance
542 * @np: device node of the mux entry
543 * @name: name of the function
544 * @vals: array of mux register value pairs used by the function
545 * @nvals: number of mux register value pairs
546 * @pgnames: array of pingroup names for the function
547 * @npgnames: number of pingroup names
549 static struct pcs_function *pcs_add_function(struct pcs_device *pcs,
550 struct device_node *np,
552 struct pcs_func_vals *vals,
554 const char **pgnames,
557 struct pcs_function *function;
559 function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL);
563 function->name = name;
564 function->vals = vals;
565 function->nvals = nvals;
566 function->pgnames = pgnames;
567 function->npgnames = npgnames;
569 mutex_lock(&pcs->mutex);
570 list_add_tail(&function->node, &pcs->functions);
571 radix_tree_insert(&pcs->ftree, pcs->nfuncs, function);
573 mutex_unlock(&pcs->mutex);
578 static void pcs_remove_function(struct pcs_device *pcs,
579 struct pcs_function *function)
583 mutex_lock(&pcs->mutex);
584 for (i = 0; i < pcs->nfuncs; i++) {
585 struct pcs_function *found;
587 found = radix_tree_lookup(&pcs->ftree, i);
588 if (found == function)
589 radix_tree_delete(&pcs->ftree, i);
591 list_del(&function->node);
592 mutex_unlock(&pcs->mutex);
596 * pcs_add_pingroup() - add a pingroup to the pingroup list
597 * @pcs: pcs driver instance
598 * @np: device node of the mux entry
599 * @name: name of the pingroup
600 * @gpins: array of the pins that belong to the group
601 * @ngpins: number of pins in the group
603 static int pcs_add_pingroup(struct pcs_device *pcs,
604 struct device_node *np,
609 struct pcs_pingroup *pingroup;
611 pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL);
615 pingroup->name = name;
617 pingroup->gpins = gpins;
618 pingroup->ngpins = ngpins;
620 mutex_lock(&pcs->mutex);
621 list_add_tail(&pingroup->node, &pcs->pingroups);
622 radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup);
624 mutex_unlock(&pcs->mutex);
630 * pcs_get_pin_by_offset() - get a pin index based on the register offset
631 * @pcs: pcs driver instance
632 * @offset: register offset from the base
634 * Note that this is OK as long as the pins are in a static array.
636 static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
640 if (offset >= pcs->size) {
641 dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n",
646 index = offset / (pcs->width / BITS_PER_BYTE);
652 * smux_parse_one_pinctrl_entry() - parses a device tree mux entry
653 * @pcs: pinctrl driver instance
654 * @np: device node of the mux entry
656 * @pgnames: pingroup names
658 * Note that this binding currently supports only sets of one register + value.
660 * Also note that this driver tries to avoid understanding pin and function
661 * names because of the extra bloat they would cause especially in the case of
662 * a large number of pins. This driver just sets what is specified for the board
663 * in the .dts file. Further user space debugging tools can be developed to
664 * decipher the pin and function names using debugfs.
666 * If you are concerned about the boot time, set up the static pins in
667 * the bootloader, and only set up selected pins as device tree entries.
669 static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
670 struct device_node *np,
671 struct pinctrl_map **map,
672 const char **pgnames)
674 struct pcs_func_vals *vals;
676 int size, params, rows, *pins, index = 0, found = 0, res = -ENOMEM;
677 struct pcs_function *function;
679 if (pcs->bits_per_mux) {
681 mux = of_get_property(np, PCS_MUX_BITS_NAME, &size);
684 mux = of_get_property(np, PCS_MUX_PINS_NAME, &size);
688 dev_err(pcs->dev, "no valid property for %s\n", np->name);
692 if (size < (sizeof(*mux) * params)) {
693 dev_err(pcs->dev, "bad data for %s\n", np->name);
697 size /= sizeof(*mux); /* Number of elements in array */
698 rows = size / params;
700 vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
704 pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL);
708 while (index < size) {
709 unsigned offset, val;
712 offset = be32_to_cpup(mux + index++);
713 val = be32_to_cpup(mux + index++);
714 vals[found].reg = pcs->base + offset;
715 vals[found].val = val;
717 val = be32_to_cpup(mux + index++);
718 vals[found].mask = val;
721 pin = pcs_get_pin_by_offset(pcs, offset);
724 "could not add functions for %s %ux\n",
731 pgnames[0] = np->name;
732 function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
736 res = pcs_add_pingroup(pcs, np, np->name, pins, found);
740 (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
741 (*map)->data.mux.group = np->name;
742 (*map)->data.mux.function = np->name;
747 pcs_remove_function(pcs, function);
750 devm_kfree(pcs->dev, pins);
753 devm_kfree(pcs->dev, vals);
758 * pcs_dt_node_to_map() - allocates and parses pinctrl maps
759 * @pctldev: pinctrl instance
760 * @np_config: device tree pinmux entry
761 * @map: array of map entries
762 * @num_maps: number of maps
764 static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
765 struct device_node *np_config,
766 struct pinctrl_map **map, unsigned *num_maps)
768 struct pcs_device *pcs;
769 const char **pgnames;
772 pcs = pinctrl_dev_get_drvdata(pctldev);
774 *map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL);
780 pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL);
786 ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames);
788 dev_err(pcs->dev, "no pins entries for %s\n",
797 devm_kfree(pcs->dev, pgnames);
799 devm_kfree(pcs->dev, *map);
805 * pcs_free_funcs() - free memory used by functions
806 * @pcs: pcs driver instance
808 static void pcs_free_funcs(struct pcs_device *pcs)
810 struct list_head *pos, *tmp;
813 mutex_lock(&pcs->mutex);
814 for (i = 0; i < pcs->nfuncs; i++) {
815 struct pcs_function *func;
817 func = radix_tree_lookup(&pcs->ftree, i);
820 radix_tree_delete(&pcs->ftree, i);
822 list_for_each_safe(pos, tmp, &pcs->functions) {
823 struct pcs_function *function;
825 function = list_entry(pos, struct pcs_function, node);
826 list_del(&function->node);
828 mutex_unlock(&pcs->mutex);
832 * pcs_free_pingroups() - free memory used by pingroups
833 * @pcs: pcs driver instance
835 static void pcs_free_pingroups(struct pcs_device *pcs)
837 struct list_head *pos, *tmp;
840 mutex_lock(&pcs->mutex);
841 for (i = 0; i < pcs->ngroups; i++) {
842 struct pcs_pingroup *pingroup;
844 pingroup = radix_tree_lookup(&pcs->pgtree, i);
847 radix_tree_delete(&pcs->pgtree, i);
849 list_for_each_safe(pos, tmp, &pcs->pingroups) {
850 struct pcs_pingroup *pingroup;
852 pingroup = list_entry(pos, struct pcs_pingroup, node);
853 list_del(&pingroup->node);
855 mutex_unlock(&pcs->mutex);
859 * pcs_free_resources() - free memory used by this driver
860 * @pcs: pcs driver instance
862 static void pcs_free_resources(struct pcs_device *pcs)
865 pinctrl_unregister(pcs->pctl);
868 pcs_free_pingroups(pcs);
871 #define PCS_GET_PROP_U32(name, reg, err) \
873 ret = of_property_read_u32(np, name, reg); \
875 dev_err(pcs->dev, err); \
880 static struct of_device_id pcs_of_match[];
882 static int __devinit pcs_probe(struct platform_device *pdev)
884 struct device_node *np = pdev->dev.of_node;
885 const struct of_device_id *match;
886 struct resource *res;
887 struct pcs_device *pcs;
890 match = of_match_device(pcs_of_match, &pdev->dev);
894 pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL);
896 dev_err(&pdev->dev, "could not allocate\n");
899 pcs->dev = &pdev->dev;
900 mutex_init(&pcs->mutex);
901 INIT_LIST_HEAD(&pcs->pingroups);
902 INIT_LIST_HEAD(&pcs->functions);
904 PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width,
905 "register width not specified\n");
907 PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask,
908 "function register mask not specified\n");
909 pcs->fshift = ffs(pcs->fmask) - 1;
910 pcs->fmax = pcs->fmask >> pcs->fshift;
912 ret = of_property_read_u32(np, "pinctrl-single,function-off",
915 pcs->foff = PCS_OFF_DISABLED;
917 pcs->bits_per_mux = of_property_read_bool(np,
918 "pinctrl-single,bit-per-mux");
920 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
922 dev_err(pcs->dev, "could not get resource\n");
926 pcs->res = devm_request_mem_region(pcs->dev, res->start,
927 resource_size(res), DRIVER_NAME);
929 dev_err(pcs->dev, "could not get mem_region\n");
933 pcs->size = resource_size(pcs->res);
934 pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size);
936 dev_err(pcs->dev, "could not ioremap\n");
940 INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL);
941 INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL);
942 platform_set_drvdata(pdev, pcs);
944 switch (pcs->width) {
946 pcs->read = pcs_readb;
947 pcs->write = pcs_writeb;
950 pcs->read = pcs_readw;
951 pcs->write = pcs_writew;
954 pcs->read = pcs_readl;
955 pcs->write = pcs_writel;
961 pcs->desc.name = DRIVER_NAME;
962 pcs->desc.pctlops = &pcs_pinctrl_ops;
963 pcs->desc.pmxops = &pcs_pinmux_ops;
964 pcs->desc.confops = &pcs_pinconf_ops;
965 pcs->desc.owner = THIS_MODULE;
967 ret = pcs_allocate_pin_table(pcs);
971 pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs);
973 dev_err(pcs->dev, "could not register single pinctrl driver\n");
978 dev_info(pcs->dev, "%i pins at pa %p size %u\n",
979 pcs->desc.npins, pcs->base, pcs->size);
984 pcs_free_resources(pcs);
989 static int __devexit pcs_remove(struct platform_device *pdev)
991 struct pcs_device *pcs = platform_get_drvdata(pdev);
996 pcs_free_resources(pcs);
1001 static struct of_device_id pcs_of_match[] __devinitdata = {
1002 { .compatible = DRIVER_NAME, },
1005 MODULE_DEVICE_TABLE(of, pcs_of_match);
1007 static struct platform_driver pcs_driver = {
1009 .remove = __devexit_p(pcs_remove),
1011 .owner = THIS_MODULE,
1012 .name = DRIVER_NAME,
1013 .of_match_table = pcs_of_match,
1017 module_platform_driver(pcs_driver);
1019 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
1020 MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
1021 MODULE_LICENSE("GPL v2");