1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2020-2021 Rockchip Electronics Co. Ltd.
5 * Copyright (c) 2013 MundoReader S.L.
6 * Author: Heiko Stuebner <heiko@sntech.de>
8 * With some ideas taken from pinctrl-samsung:
9 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
10 * http://www.samsung.com
11 * Copyright (c) 2012 Linaro Ltd
12 * https://www.linaro.org
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
18 #ifndef _PINCTRL_ROCKCHIP_H
19 #define _PINCTRL_ROCKCHIP_H
21 enum rockchip_pinctrl_type {
36 * struct rockchip_gpio_regs
37 * @port_dr: data register
38 * @port_ddr: data direction register
39 * @int_en: interrupt enable
40 * @int_mask: interrupt mask
41 * @int_type: interrupt trigger type, such as high, low, edge trriger type.
42 * @int_polarity: interrupt polarity enable register
43 * @int_bothedge: interrupt bothedge enable register
44 * @int_status: interrupt status register
45 * @int_rawstatus: int_status = int_rawstatus & int_mask
46 * @debounce: enable debounce for interrupt signal
47 * @dbclk_div_en: enable divider for debounce clock
48 * @dbclk_div_con: setting for divider of debounce clock
49 * @port_eoi: end of interrupt of the port
50 * @ext_port: port data from external
51 * @version_id: controller version register
53 struct rockchip_gpio_regs {
72 * struct rockchip_iomux
73 * @type: iomux variant using IOMUX_* constants
74 * @offset: if initialized to -1 it will be autocalculated, by specifying
75 * an initial offset value the relevant source offset can be reset
76 * to a new value for autocalculating the following iomux registers.
78 struct rockchip_iomux {
84 * enum type index corresponding to rockchip_perpin_drv_list arrays index.
86 enum rockchip_pin_drv_type {
87 DRV_TYPE_IO_DEFAULT = 0,
88 DRV_TYPE_IO_1V8_OR_3V0,
90 DRV_TYPE_IO_1V8_3V0_AUTO,
96 * enum type index corresponding to rockchip_pull_list arrays index.
98 enum rockchip_pin_pull_type {
99 PULL_TYPE_IO_DEFAULT = 0,
100 PULL_TYPE_IO_1V8_ONLY,
105 * struct rockchip_drv
106 * @drv_type: drive strength variant using rockchip_perpin_drv_type
107 * @offset: if initialized to -1 it will be autocalculated, by specifying
108 * an initial offset value the relevant source offset can be reset
109 * to a new value for autocalculating the following drive strength
110 * registers. if used chips own cal_drv func instead to calculate
111 * registers offset, the variant could be ignored.
113 struct rockchip_drv {
114 enum rockchip_pin_drv_type drv_type;
119 * struct rockchip_pin_bank
120 * @dev: the pinctrl device bind to the bank
121 * @reg_base: register base of the gpio bank
122 * @regmap_pull: optional separate register for additional pull settings
123 * @clk: clock of the gpio bank
124 * @db_clk: clock of the gpio debounce
125 * @irq: interrupt of the gpio bank
126 * @saved_masks: Saved content of GPIO_INTEN at suspend time.
127 * @pin_base: first pin number
128 * @nr_pins: number of pins in this bank
129 * @name: name of the bank
130 * @bank_num: number of the bank, to account for holes
131 * @iomux: array describing the 4 iomux sources of the bank
132 * @drv: array describing the 4 drive strength sources of the bank
133 * @pull_type: array describing the 4 pull type sources of the bank
134 * @valid: is all necessary information present
135 * @of_node: dt node of this bank
136 * @drvdata: common pinctrl basedata
137 * @domain: irqdomain of the gpio bank
138 * @gpio_chip: gpiolib chip
139 * @grange: gpio range
140 * @slock: spinlock for the gpio bank
141 * @toggle_edge_mode: bit mask to toggle (falling/rising) edge mode
142 * @recalced_mask: bit mask to indicate a need to recalulate the mask
143 * @route_mask: bits describing the routing pins of per bank
145 struct rockchip_pin_bank {
147 void __iomem *reg_base;
148 struct regmap *regmap_pull;
157 struct rockchip_iomux iomux[4];
158 struct rockchip_drv drv[4];
159 enum rockchip_pin_pull_type pull_type[4];
161 struct device_node *of_node;
162 struct rockchip_pinctrl *drvdata;
163 struct irq_domain *domain;
164 struct gpio_chip gpio_chip;
165 struct pinctrl_gpio_range grange;
166 raw_spinlock_t slock;
167 const struct rockchip_gpio_regs *gpio_regs;
169 u32 toggle_edge_mode;
175 * struct rockchip_mux_recalced_data: represent a pin iomux data.
178 * @bit: index at register.
179 * @reg: register offset.
182 struct rockchip_mux_recalced_data {
190 enum rockchip_mux_route_location {
191 ROCKCHIP_ROUTE_SAME = 0,
197 * struct rockchip_mux_recalced_data: represent a pin iomux data.
198 * @bank_num: bank number.
199 * @pin: index at register or used to calc index.
200 * @func: the min pin.
201 * @route_location: the mux route location (same, pmu, grf).
202 * @route_offset: the max pin.
203 * @route_val: the register offset.
205 struct rockchip_mux_route_data {
209 enum rockchip_mux_route_location route_location;
214 struct rockchip_pin_ctrl {
215 struct rockchip_pin_bank *pin_banks;
219 enum rockchip_pinctrl_type type;
224 struct rockchip_mux_recalced_data *iomux_recalced;
226 struct rockchip_mux_route_data *iomux_routes;
229 void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
230 int pin_num, struct regmap **regmap,
232 void (*drv_calc_reg)(struct rockchip_pin_bank *bank,
233 int pin_num, struct regmap **regmap,
235 int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
236 int pin_num, struct regmap **regmap,
240 struct rockchip_pin_config {
242 unsigned long *configs;
243 unsigned int nconfigs;
247 * struct rockchip_pin_group: represent group of pins of a pinmux function.
248 * @name: name of the pin group, used to lookup the group.
249 * @pins: the pins included in this group.
250 * @npins: number of pins included in this group.
251 * @data: local pin configuration
253 struct rockchip_pin_group {
257 struct rockchip_pin_config *data;
261 * struct rockchip_pmx_func: represent a pin function.
262 * @name: name of the pin function, used to lookup the function.
263 * @groups: one or more names of pin groups that provide this function.
264 * @ngroups: number of groups included in @groups.
266 struct rockchip_pmx_func {
272 struct rockchip_pinctrl {
273 struct regmap *regmap_base;
275 struct regmap *regmap_pull;
276 struct regmap *regmap_pmu;
278 struct rockchip_pin_ctrl *ctrl;
279 struct pinctrl_desc pctl;
280 struct pinctrl_dev *pctl_dev;
281 struct rockchip_pin_group *groups;
282 unsigned int ngroups;
283 struct rockchip_pmx_func *functions;
284 unsigned int nfunctions;