2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's EXYNOS5440 SoC.
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
16 #include <linux/slab.h>
17 #include <linux/err.h>
18 #include <linux/gpio.h>
19 #include <linux/device.h>
20 #include <linux/pinctrl/pinctrl.h>
21 #include <linux/pinctrl/pinmux.h>
22 #include <linux/pinctrl/pinconf.h>
25 /* EXYNOS5440 GPIO and Pinctrl register offsets */
29 #define GPIO_TYPE 0x0C
39 #define EXYNOS5440_MAX_PINS 23
40 #define PIN_NAME_LENGTH 10
42 #define GROUP_SUFFIX "-grp"
43 #define GSUFFIX_LEN sizeof(GROUP_SUFFIX)
44 #define FUNCTION_SUFFIX "-mux"
45 #define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
48 * pin configuration type and its value are packed together into a 16-bits.
49 * The upper 8-bits represent the configuration type and the lower 8-bits
50 * hold the value of the configuration type.
52 #define PINCFG_TYPE_MASK 0xFF
53 #define PINCFG_VALUE_SHIFT 8
54 #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT)
55 #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type)
56 #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK)
57 #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \
61 * enum pincfg_type - possible pin configuration types supported.
62 * @PINCFG_TYPE_PUD: Pull up/down configuration.
63 * @PINCFG_TYPE_DRV: Drive strength configuration.
64 * @PINCFG_TYPE_SKEW_RATE: Skew rate configuration.
65 * @PINCFG_TYPE_INPUT_TYPE: Pin input type configuration.
70 PINCFG_TYPE_SKEW_RATE,
71 PINCFG_TYPE_INPUT_TYPE
75 * struct exynos5440_pin_group: represent group of pins for pincfg setting.
76 * @name: name of the pin group, used to lookup the group.
77 * @pins: the pins included in this group.
78 * @num_pins: number of pins included in this group.
80 struct exynos5440_pin_group {
82 const unsigned int *pins;
87 * struct exynos5440_pmx_func: represent a pin function.
88 * @name: name of the pin function, used to lookup the function.
89 * @groups: one or more names of pin groups that provide this function.
90 * @num_groups: number of groups included in @groups.
91 * @function: the function number to be programmed when selected.
93 struct exynos5440_pmx_func {
97 unsigned long function;
101 * struct exynos5440_pinctrl_priv_data: driver's private runtime data.
102 * @reg_base: ioremapped based address of the register space.
103 * @gc: gpio chip registered with gpiolib.
104 * @pin_groups: list of pin groups parsed from device tree.
105 * @nr_groups: number of pin groups available.
106 * @pmx_functions: list of pin functions parsed from device tree.
107 * @nr_functions: number of pin functions available.
109 struct exynos5440_pinctrl_priv_data {
110 void __iomem *reg_base;
111 struct gpio_chip *gc;
113 const struct exynos5440_pin_group *pin_groups;
114 unsigned int nr_groups;
115 const struct exynos5440_pmx_func *pmx_functions;
116 unsigned int nr_functions;
119 /* list of all possible config options supported */
120 static struct pin_config {
122 unsigned int cfg_type;
124 { "samsung,exynos5440-pin-pud", PINCFG_TYPE_PUD },
125 { "samsung,exynos5440-pin-drv", PINCFG_TYPE_DRV },
126 { "samsung,exynos5440-pin-skew-rate", PINCFG_TYPE_SKEW_RATE },
127 { "samsung,exynos5440-pin-input-type", PINCFG_TYPE_INPUT_TYPE },
130 /* check if the selector is a valid pin group selector */
131 static int exynos5440_get_group_count(struct pinctrl_dev *pctldev)
133 struct exynos5440_pinctrl_priv_data *priv;
135 priv = pinctrl_dev_get_drvdata(pctldev);
136 return priv->nr_groups;
139 /* return the name of the group selected by the group selector */
140 static const char *exynos5440_get_group_name(struct pinctrl_dev *pctldev,
143 struct exynos5440_pinctrl_priv_data *priv;
145 priv = pinctrl_dev_get_drvdata(pctldev);
146 return priv->pin_groups[selector].name;
149 /* return the pin numbers associated with the specified group */
150 static int exynos5440_get_group_pins(struct pinctrl_dev *pctldev,
151 unsigned selector, const unsigned **pins, unsigned *num_pins)
153 struct exynos5440_pinctrl_priv_data *priv;
155 priv = pinctrl_dev_get_drvdata(pctldev);
156 *pins = priv->pin_groups[selector].pins;
157 *num_pins = priv->pin_groups[selector].num_pins;
161 /* create pinctrl_map entries by parsing device tree nodes */
162 static int exynos5440_dt_node_to_map(struct pinctrl_dev *pctldev,
163 struct device_node *np, struct pinctrl_map **maps,
166 struct device *dev = pctldev->dev;
167 struct pinctrl_map *map;
168 unsigned long *cfg = NULL;
170 int cfg_cnt = 0, map_cnt = 0, idx = 0;
172 /* count the number of config options specfied in the node */
173 for (idx = 0; idx < ARRAY_SIZE(pcfgs); idx++)
174 if (of_find_property(np, pcfgs[idx].prop_cfg, NULL))
178 * Find out the number of map entries to create. All the config options
179 * can be accomadated into a single config map entry.
183 if (of_find_property(np, "samsung,exynos5440-pin-function", NULL))
186 dev_err(dev, "node %s does not have either config or function "
187 "configurations\n", np->name);
191 /* Allocate memory for pin-map entries */
192 map = kzalloc(sizeof(*map) * map_cnt, GFP_KERNEL);
194 dev_err(dev, "could not alloc memory for pin-maps\n");
200 * Allocate memory for pin group name. The pin group name is derived
201 * from the node name from which these map entries are be created.
203 gname = kzalloc(strlen(np->name) + GSUFFIX_LEN, GFP_KERNEL);
205 dev_err(dev, "failed to alloc memory for group name\n");
208 sprintf(gname, "%s%s", np->name, GROUP_SUFFIX);
211 * don't have config options? then skip over to creating function
217 /* Allocate memory for config entries */
218 cfg = kzalloc(sizeof(*cfg) * cfg_cnt, GFP_KERNEL);
220 dev_err(dev, "failed to alloc memory for configs\n");
224 /* Prepare a list of config settings */
225 for (idx = 0, cfg_cnt = 0; idx < ARRAY_SIZE(pcfgs); idx++) {
227 if (!of_property_read_u32(np, pcfgs[idx].prop_cfg, &value))
229 PINCFG_PACK(pcfgs[idx].cfg_type, value);
232 /* create the config map entry */
233 map[*nmaps].data.configs.group_or_pin = gname;
234 map[*nmaps].data.configs.configs = cfg;
235 map[*nmaps].data.configs.num_configs = cfg_cnt;
236 map[*nmaps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
240 /* create the function map entry */
241 if (of_find_property(np, "samsung,exynos5440-pin-function", NULL)) {
242 fname = kzalloc(strlen(np->name) + FSUFFIX_LEN, GFP_KERNEL);
244 dev_err(dev, "failed to alloc memory for func name\n");
247 sprintf(fname, "%s%s", np->name, FUNCTION_SUFFIX);
249 map[*nmaps].data.mux.group = gname;
250 map[*nmaps].data.mux.function = fname;
251 map[*nmaps].type = PIN_MAP_TYPE_MUX_GROUP;
267 /* free the memory allocated to hold the pin-map table */
268 static void exynos5440_dt_free_map(struct pinctrl_dev *pctldev,
269 struct pinctrl_map *map, unsigned num_maps)
273 for (idx = 0; idx < num_maps; idx++) {
274 if (map[idx].type == PIN_MAP_TYPE_MUX_GROUP) {
275 kfree(map[idx].data.mux.function);
277 kfree(map[idx].data.mux.group);
278 } else if (map->type == PIN_MAP_TYPE_CONFIGS_GROUP) {
279 kfree(map[idx].data.configs.configs);
281 kfree(map[idx].data.configs.group_or_pin);
288 /* list of pinctrl callbacks for the pinctrl core */
289 static struct pinctrl_ops exynos5440_pctrl_ops = {
290 .get_groups_count = exynos5440_get_group_count,
291 .get_group_name = exynos5440_get_group_name,
292 .get_group_pins = exynos5440_get_group_pins,
293 .dt_node_to_map = exynos5440_dt_node_to_map,
294 .dt_free_map = exynos5440_dt_free_map,
297 /* check if the selector is a valid pin function selector */
298 static int exynos5440_get_functions_count(struct pinctrl_dev *pctldev)
300 struct exynos5440_pinctrl_priv_data *priv;
302 priv = pinctrl_dev_get_drvdata(pctldev);
303 return priv->nr_functions;
306 /* return the name of the pin function specified */
307 static const char *exynos5440_pinmux_get_fname(struct pinctrl_dev *pctldev,
310 struct exynos5440_pinctrl_priv_data *priv;
312 priv = pinctrl_dev_get_drvdata(pctldev);
313 return priv->pmx_functions[selector].name;
316 /* return the groups associated for the specified function selector */
317 static int exynos5440_pinmux_get_groups(struct pinctrl_dev *pctldev,
318 unsigned selector, const char * const **groups,
319 unsigned * const num_groups)
321 struct exynos5440_pinctrl_priv_data *priv;
323 priv = pinctrl_dev_get_drvdata(pctldev);
324 *groups = priv->pmx_functions[selector].groups;
325 *num_groups = priv->pmx_functions[selector].num_groups;
329 /* enable or disable a pinmux function */
330 static void exynos5440_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
331 unsigned group, bool enable)
333 struct exynos5440_pinctrl_priv_data *priv;
338 priv = pinctrl_dev_get_drvdata(pctldev);
339 base = priv->reg_base;
340 function = priv->pmx_functions[selector].function;
342 data = readl(base + GPIO_MUX);
344 data |= (1 << function);
346 data &= ~(1 << function);
347 writel(data, base + GPIO_MUX);
350 /* enable a specified pinmux by writing to registers */
351 static int exynos5440_pinmux_enable(struct pinctrl_dev *pctldev, unsigned selector,
354 exynos5440_pinmux_setup(pctldev, selector, group, true);
358 /* disable a specified pinmux by writing to registers */
359 static void exynos5440_pinmux_disable(struct pinctrl_dev *pctldev,
360 unsigned selector, unsigned group)
362 exynos5440_pinmux_setup(pctldev, selector, group, false);
366 * The calls to gpio_direction_output() and gpio_direction_input()
367 * leads to this function call (via the pinctrl_gpio_direction_{input|output}()
368 * function called from the gpiolib interface).
370 static int exynos5440_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
371 struct pinctrl_gpio_range *range, unsigned offset, bool input)
376 /* list of pinmux callbacks for the pinmux vertical in pinctrl core */
377 static struct pinmux_ops exynos5440_pinmux_ops = {
378 .get_functions_count = exynos5440_get_functions_count,
379 .get_function_name = exynos5440_pinmux_get_fname,
380 .get_function_groups = exynos5440_pinmux_get_groups,
381 .enable = exynos5440_pinmux_enable,
382 .disable = exynos5440_pinmux_disable,
383 .gpio_set_direction = exynos5440_pinmux_gpio_set_direction,
386 /* set the pin config settings for a specified pin */
387 static int exynos5440_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
388 unsigned long config)
390 struct exynos5440_pinctrl_priv_data *priv;
392 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(config);
393 u32 cfg_value = PINCFG_UNPACK_VALUE(config);
396 priv = pinctrl_dev_get_drvdata(pctldev);
397 base = priv->reg_base;
400 case PINCFG_TYPE_PUD:
401 /* first set pull enable/disable bit */
402 data = readl(base + GPIO_PE);
406 writel(data, base + GPIO_PE);
408 /* then set pull up/down bit */
409 data = readl(base + GPIO_PS);
413 writel(data, base + GPIO_PS);
416 case PINCFG_TYPE_DRV:
417 /* set the first bit of the drive strength */
418 data = readl(base + GPIO_DS0);
420 data |= ((cfg_value & 1) << pin);
421 writel(data, base + GPIO_DS0);
424 /* set the second bit of the driver strength */
425 data = readl(base + GPIO_DS1);
427 data |= ((cfg_value & 1) << pin);
428 writel(data, base + GPIO_DS1);
430 case PINCFG_TYPE_SKEW_RATE:
431 data = readl(base + GPIO_SR);
433 data |= ((cfg_value & 1) << pin);
434 writel(data, base + GPIO_SR);
436 case PINCFG_TYPE_INPUT_TYPE:
437 data = readl(base + GPIO_TYPE);
439 data |= ((cfg_value & 1) << pin);
440 writel(data, base + GPIO_TYPE);
450 /* get the pin config settings for a specified pin */
451 static int exynos5440_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
452 unsigned long *config)
454 struct exynos5440_pinctrl_priv_data *priv;
456 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
459 priv = pinctrl_dev_get_drvdata(pctldev);
460 base = priv->reg_base;
463 case PINCFG_TYPE_PUD:
464 data = readl(base + GPIO_PE);
465 data = (data >> pin) & 1;
469 *config = ((readl(base + GPIO_PS) >> pin) & 1) + 1;
471 case PINCFG_TYPE_DRV:
472 data = readl(base + GPIO_DS0);
473 data = (data >> pin) & 1;
475 data = readl(base + GPIO_DS1);
476 data = (data >> pin) & 1;
477 *config |= (data << 1);
479 case PINCFG_TYPE_SKEW_RATE:
480 data = readl(base + GPIO_SR);
481 *config = (data >> pin) & 1;
483 case PINCFG_TYPE_INPUT_TYPE:
484 data = readl(base + GPIO_TYPE);
485 *config = (data >> pin) & 1;
495 /* set the pin config settings for a specified pin group */
496 static int exynos5440_pinconf_group_set(struct pinctrl_dev *pctldev,
497 unsigned group, unsigned long config)
499 struct exynos5440_pinctrl_priv_data *priv;
500 const unsigned int *pins;
503 priv = pinctrl_dev_get_drvdata(pctldev);
504 pins = priv->pin_groups[group].pins;
506 for (cnt = 0; cnt < priv->pin_groups[group].num_pins; cnt++)
507 exynos5440_pinconf_set(pctldev, pins[cnt], config);
512 /* get the pin config settings for a specified pin group */
513 static int exynos5440_pinconf_group_get(struct pinctrl_dev *pctldev,
514 unsigned int group, unsigned long *config)
516 struct exynos5440_pinctrl_priv_data *priv;
517 const unsigned int *pins;
519 priv = pinctrl_dev_get_drvdata(pctldev);
520 pins = priv->pin_groups[group].pins;
521 exynos5440_pinconf_get(pctldev, pins[0], config);
525 /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
526 static struct pinconf_ops exynos5440_pinconf_ops = {
527 .pin_config_get = exynos5440_pinconf_get,
528 .pin_config_set = exynos5440_pinconf_set,
529 .pin_config_group_get = exynos5440_pinconf_group_get,
530 .pin_config_group_set = exynos5440_pinconf_group_set,
533 /* gpiolib gpio_set callback function */
534 static void exynos5440_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
536 struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
537 void __iomem *base = priv->reg_base;
540 data = readl(base + GPIO_VAL);
541 data &= ~(1 << offset);
544 writel(data, base + GPIO_VAL);
547 /* gpiolib gpio_get callback function */
548 static int exynos5440_gpio_get(struct gpio_chip *gc, unsigned offset)
550 struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
551 void __iomem *base = priv->reg_base;
554 data = readl(base + GPIO_IN);
560 /* gpiolib gpio_direction_input callback function */
561 static int exynos5440_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
563 struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
564 void __iomem *base = priv->reg_base;
567 /* first disable the data output enable on this pin */
568 data = readl(base + GPIO_OE);
569 data &= ~(1 << offset);
570 writel(data, base + GPIO_OE);
572 /* now enable input on this pin */
573 data = readl(base + GPIO_IE);
575 writel(data, base + GPIO_IE);
579 /* gpiolib gpio_direction_output callback function */
580 static int exynos5440_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
583 struct exynos5440_pinctrl_priv_data *priv = dev_get_drvdata(gc->dev);
584 void __iomem *base = priv->reg_base;
587 exynos5440_gpio_set(gc, offset, value);
589 /* first disable the data input enable on this pin */
590 data = readl(base + GPIO_IE);
591 data &= ~(1 << offset);
592 writel(data, base + GPIO_IE);
594 /* now enable output on this pin */
595 data = readl(base + GPIO_OE);
597 writel(data, base + GPIO_OE);
601 /* parse the pin numbers listed in the 'samsung,exynos5440-pins' property */
602 static int exynos5440_pinctrl_parse_dt_pins(struct platform_device *pdev,
603 struct device_node *cfg_np, unsigned int **pin_list,
606 struct device *dev = &pdev->dev;
607 struct property *prop;
609 prop = of_find_property(cfg_np, "samsung,exynos5440-pins", NULL);
613 *npins = prop->length / sizeof(unsigned long);
615 dev_err(dev, "invalid pin list in %s node", cfg_np->name);
619 *pin_list = devm_kzalloc(dev, *npins * sizeof(**pin_list), GFP_KERNEL);
621 dev_err(dev, "failed to allocate memory for pin list\n");
625 return of_property_read_u32_array(cfg_np, "samsung,exynos5440-pins",
630 * Parse the information about all the available pin groups and pin functions
631 * from device node of the pin-controller.
633 static int exynos5440_pinctrl_parse_dt(struct platform_device *pdev,
634 struct exynos5440_pinctrl_priv_data *priv)
636 struct device *dev = &pdev->dev;
637 struct device_node *dev_np = dev->of_node;
638 struct device_node *cfg_np;
639 struct exynos5440_pin_group *groups, *grp;
640 struct exynos5440_pmx_func *functions, *func;
642 unsigned int npins, grp_cnt, func_idx = 0;
646 grp_cnt = of_get_child_count(dev_np);
650 groups = devm_kzalloc(dev, grp_cnt * sizeof(*groups), GFP_KERNEL);
652 dev_err(dev, "failed allocate memory for ping group list\n");
657 functions = devm_kzalloc(dev, grp_cnt * sizeof(*functions), GFP_KERNEL);
659 dev_err(dev, "failed to allocate memory for function list\n");
665 * Iterate over all the child nodes of the pin controller node
666 * and create pin groups and pin function lists.
668 for_each_child_of_node(dev_np, cfg_np) {
671 ret = exynos5440_pinctrl_parse_dt_pins(pdev, cfg_np,
676 /* derive pin group name from the node name */
677 gname = devm_kzalloc(dev, strlen(cfg_np->name) + GSUFFIX_LEN,
680 dev_err(dev, "failed to alloc memory for group name\n");
683 sprintf(gname, "%s%s", cfg_np->name, GROUP_SUFFIX);
686 grp->pins = pin_list;
687 grp->num_pins = npins;
690 ret = of_property_read_u32(cfg_np, "samsung,exynos5440-pin-function",
695 /* derive function name from the node name */
696 fname = devm_kzalloc(dev, strlen(cfg_np->name) + FSUFFIX_LEN,
699 dev_err(dev, "failed to alloc memory for func name\n");
702 sprintf(fname, "%s%s", cfg_np->name, FUNCTION_SUFFIX);
705 func->groups = devm_kzalloc(dev, sizeof(char *), GFP_KERNEL);
707 dev_err(dev, "failed to alloc memory for group list "
711 func->groups[0] = gname;
712 func->num_groups = 1;
713 func->function = function;
718 priv->pin_groups = groups;
719 priv->nr_groups = grp_cnt;
720 priv->pmx_functions = functions;
721 priv->nr_functions = func_idx;
725 /* register the pinctrl interface with the pinctrl subsystem */
726 static int exynos5440_pinctrl_register(struct platform_device *pdev,
727 struct exynos5440_pinctrl_priv_data *priv)
729 struct device *dev = &pdev->dev;
730 struct pinctrl_desc *ctrldesc;
731 struct pinctrl_dev *pctl_dev;
732 struct pinctrl_pin_desc *pindesc, *pdesc;
733 struct pinctrl_gpio_range grange;
737 ctrldesc = devm_kzalloc(dev, sizeof(*ctrldesc), GFP_KERNEL);
739 dev_err(dev, "could not allocate memory for pinctrl desc\n");
743 ctrldesc->name = "exynos5440-pinctrl";
744 ctrldesc->owner = THIS_MODULE;
745 ctrldesc->pctlops = &exynos5440_pctrl_ops;
746 ctrldesc->pmxops = &exynos5440_pinmux_ops;
747 ctrldesc->confops = &exynos5440_pinconf_ops;
749 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
750 EXYNOS5440_MAX_PINS, GFP_KERNEL);
752 dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
755 ctrldesc->pins = pindesc;
756 ctrldesc->npins = EXYNOS5440_MAX_PINS;
758 /* dynamically populate the pin number and pin name for pindesc */
759 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
763 * allocate space for storing the dynamically generated names for all
764 * the pins which belong to this pin-controller.
766 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
767 ctrldesc->npins, GFP_KERNEL);
769 dev_err(&pdev->dev, "mem alloc for pin names failed\n");
773 /* for each pin, set the name of the pin */
774 for (pin = 0; pin < ctrldesc->npins; pin++) {
775 sprintf(pin_names, "gpio%02d", pin);
776 pdesc = pindesc + pin;
777 pdesc->name = pin_names;
778 pin_names += PIN_NAME_LENGTH;
781 ret = exynos5440_pinctrl_parse_dt(pdev, priv);
785 pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, priv);
787 dev_err(&pdev->dev, "could not register pinctrl driver\n");
791 grange.name = "exynos5440-pctrl-gpio-range";
794 grange.npins = EXYNOS5440_MAX_PINS;
795 grange.gc = priv->gc;
796 pinctrl_add_gpio_range(pctl_dev, &grange);
800 /* register the gpiolib interface with the gpiolib subsystem */
801 static int exynos5440_gpiolib_register(struct platform_device *pdev,
802 struct exynos5440_pinctrl_priv_data *priv)
804 struct gpio_chip *gc;
807 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
809 dev_err(&pdev->dev, "mem alloc for gpio_chip failed\n");
815 gc->ngpio = EXYNOS5440_MAX_PINS;
816 gc->dev = &pdev->dev;
817 gc->set = exynos5440_gpio_set;
818 gc->get = exynos5440_gpio_get;
819 gc->direction_input = exynos5440_gpio_direction_input;
820 gc->direction_output = exynos5440_gpio_direction_output;
821 gc->label = "gpiolib-exynos5440";
822 gc->owner = THIS_MODULE;
823 ret = gpiochip_add(gc);
825 dev_err(&pdev->dev, "failed to register gpio_chip %s, error "
826 "code: %d\n", gc->label, ret);
833 /* unregister the gpiolib interface with the gpiolib subsystem */
834 static int exynos5440_gpiolib_unregister(struct platform_device *pdev,
835 struct exynos5440_pinctrl_priv_data *priv)
837 int ret = gpiochip_remove(priv->gc);
839 dev_err(&pdev->dev, "gpio chip remove failed\n");
845 static int exynos5440_pinctrl_probe(struct platform_device *pdev)
847 struct device *dev = &pdev->dev;
848 struct exynos5440_pinctrl_priv_data *priv;
849 struct resource *res;
853 dev_err(dev, "device tree node not found\n");
857 priv = devm_kzalloc(dev, sizeof(priv), GFP_KERNEL);
859 dev_err(dev, "could not allocate memory for private data\n");
863 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
865 dev_err(dev, "cannot find IO resource\n");
869 priv->reg_base = devm_ioremap_resource(&pdev->dev, res);
870 if (IS_ERR(priv->reg_base))
871 return PTR_ERR(priv->reg_base);
873 ret = exynos5440_gpiolib_register(pdev, priv);
877 ret = exynos5440_pinctrl_register(pdev, priv);
879 exynos5440_gpiolib_unregister(pdev, priv);
883 platform_set_drvdata(pdev, priv);
884 dev_info(dev, "EXYNOS5440 pinctrl driver registered\n");
888 static const struct of_device_id exynos5440_pinctrl_dt_match[] = {
889 { .compatible = "samsung,exynos5440-pinctrl" },
892 MODULE_DEVICE_TABLE(of, exynos5440_pinctrl_dt_match);
894 static struct platform_driver exynos5440_pinctrl_driver = {
895 .probe = exynos5440_pinctrl_probe,
897 .name = "exynos5440-pinctrl",
898 .owner = THIS_MODULE,
899 .of_match_table = of_match_ptr(exynos5440_pinctrl_dt_match),
903 static int __init exynos5440_pinctrl_drv_register(void)
905 return platform_driver_register(&exynos5440_pinctrl_driver);
907 postcore_initcall(exynos5440_pinctrl_drv_register);
909 static void __exit exynos5440_pinctrl_drv_unregister(void)
911 platform_driver_unregister(&exynos5440_pinctrl_driver);
913 module_exit(exynos5440_pinctrl_drv_unregister);
915 MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
916 MODULE_DESCRIPTION("Samsung EXYNOS5440 SoC pinctrl driver");
917 MODULE_LICENSE("GPL v2");