2 * AXP20x pinctrl and GPIO driver
4 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
5 * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/bitops.h>
14 #include <linux/device.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/kernel.h>
19 #include <linux/mfd/axp20x.h>
20 #include <linux/module.h>
22 #include <linux/pinctrl/pinconf-generic.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/platform_device.h>
26 #include <linux/regmap.h>
27 #include <linux/slab.h>
29 #define AXP20X_GPIO_FUNCTIONS 0x7
30 #define AXP20X_GPIO_FUNCTION_OUT_LOW 0
31 #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1
32 #define AXP20X_GPIO_FUNCTION_INPUT 2
34 #define AXP20X_FUNC_GPIO_OUT 0
35 #define AXP20X_FUNC_GPIO_IN 1
36 #define AXP20X_FUNC_LDO 2
37 #define AXP20X_FUNC_ADC 3
38 #define AXP20X_FUNCS_NB 4
40 #define AXP20X_MUX_GPIO_OUT 0
41 #define AXP20X_MUX_GPIO_IN BIT(1)
42 #define AXP20X_MUX_ADC BIT(2)
44 struct axp20x_pctrl_desc {
45 const struct pinctrl_pin_desc *pins;
47 /* Stores the pins supporting LDO function. Bit offset is pin number. */
49 /* Stores the pins supporting ADC function. Bit offset is pin number. */
51 u8 gpio_status_offset;
54 struct axp20x_pinctrl_function {
62 struct gpio_chip chip;
63 struct regmap *regmap;
64 struct pinctrl_dev *pctl_dev;
66 const struct axp20x_pctrl_desc *desc;
67 struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB];
70 static const struct pinctrl_pin_desc axp209_pins[] = {
71 PINCTRL_PIN(0, "GPIO0"),
72 PINCTRL_PIN(1, "GPIO1"),
73 PINCTRL_PIN(2, "GPIO2"),
76 static const struct axp20x_pctrl_desc axp20x_data = {
78 .npins = ARRAY_SIZE(axp209_pins),
79 .ldo_mask = BIT(0) | BIT(1),
80 .adc_mask = BIT(0) | BIT(1),
81 .gpio_status_offset = 4,
84 static int axp20x_gpio_get_reg(unsigned int offset)
88 return AXP20X_GPIO0_CTRL;
90 return AXP20X_GPIO1_CTRL;
92 return AXP20X_GPIO2_CTRL;
98 static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset)
100 return pinctrl_gpio_direction_input(chip->base + offset);
103 static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
105 struct axp20x_pctl *pctl = gpiochip_get_data(chip);
109 ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val);
113 return !!(val & BIT(offset + pctl->desc->gpio_status_offset));
116 static int axp20x_gpio_get_direction(struct gpio_chip *chip,
119 struct axp20x_pctl *pctl = gpiochip_get_data(chip);
123 reg = axp20x_gpio_get_reg(offset);
127 ret = regmap_read(pctl->regmap, reg, &val);
132 * This shouldn't really happen if the pin is in use already,
133 * or if it's not in use yet, it doesn't matter since we're
134 * going to change the value soon anyway. Default to output.
136 if ((val & AXP20X_GPIO_FUNCTIONS) > 2)
140 * The GPIO directions are the three lowest values.
141 * 2 is input, 0 and 1 are output
146 static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset,
149 chip->set(chip, offset, value);
154 static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset,
157 struct axp20x_pctl *pctl = gpiochip_get_data(chip);
160 reg = axp20x_gpio_get_reg(offset);
164 regmap_update_bits(pctl->regmap, reg,
165 AXP20X_GPIO_FUNCTIONS,
166 value ? AXP20X_GPIO_FUNCTION_OUT_HIGH :
167 AXP20X_GPIO_FUNCTION_OUT_LOW);
170 static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset,
173 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
176 reg = axp20x_gpio_get_reg(offset);
180 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS,
184 static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev)
186 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
188 return ARRAY_SIZE(pctl->funcs);
191 static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev,
192 unsigned int selector)
194 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
196 return pctl->funcs[selector].name;
199 static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev,
200 unsigned int selector,
201 const char * const **groups,
202 unsigned int *num_groups)
204 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
206 *groups = pctl->funcs[selector].groups;
207 *num_groups = pctl->funcs[selector].ngroups;
212 static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev,
213 unsigned int function, unsigned int group)
215 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
218 /* Every pin supports GPIO_OUT and GPIO_IN functions */
219 if (function <= AXP20X_FUNC_GPIO_IN)
220 return axp20x_pmx_set(pctldev, group,
221 pctl->funcs[function].muxval);
223 if (function == AXP20X_FUNC_LDO)
224 mask = pctl->desc->ldo_mask;
226 mask = pctl->desc->adc_mask;
228 if (!(BIT(group) & mask))
232 * We let the regulator framework handle the LDO muxing as muxing bits
233 * are basically also regulators on/off bits. It's better not to enforce
234 * any state of the regulator when selecting LDO mux so that we don't
235 * interfere with the regulator driver.
237 if (function == AXP20X_FUNC_LDO)
240 return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval);
243 static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
244 struct pinctrl_gpio_range *range,
245 unsigned int offset, bool input)
247 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
250 return axp20x_pmx_set(pctldev, offset,
251 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval);
253 return axp20x_pmx_set(pctldev, offset,
254 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval);
257 static const struct pinmux_ops axp20x_pmx_ops = {
258 .get_functions_count = axp20x_pmx_func_cnt,
259 .get_function_name = axp20x_pmx_func_name,
260 .get_function_groups = axp20x_pmx_func_groups,
261 .set_mux = axp20x_pmx_set_mux,
262 .gpio_set_direction = axp20x_pmx_gpio_set_direction,
266 static int axp20x_groups_cnt(struct pinctrl_dev *pctldev)
268 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
270 return pctl->desc->npins;
273 static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
274 const unsigned int **pins, unsigned int *num_pins)
276 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
278 *pins = (unsigned int *)&pctl->desc->pins[selector];
284 static const char *axp20x_group_name(struct pinctrl_dev *pctldev,
285 unsigned int selector)
287 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
289 return pctl->desc->pins[selector].name;
292 static const struct pinctrl_ops axp20x_pctrl_ops = {
293 .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
294 .dt_free_map = pinconf_generic_dt_free_map,
295 .get_groups_count = axp20x_groups_cnt,
296 .get_group_name = axp20x_group_name,
297 .get_group_pins = axp20x_group_pins,
300 static void axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask,
301 unsigned int mask_len,
302 struct axp20x_pinctrl_function *func,
303 const struct pinctrl_pin_desc *pins)
305 unsigned long int mask_cpy = mask;
307 unsigned int ngroups = hweight8(mask);
310 func->ngroups = ngroups;
311 if (func->ngroups > 0) {
312 func->groups = devm_kzalloc(dev, ngroups * sizeof(const char *),
314 group = func->groups;
315 for_each_set_bit(bit, &mask_cpy, mask_len) {
316 *group = pins[bit].name;
322 static void axp20x_build_funcs_groups(struct platform_device *pdev)
324 struct axp20x_pctl *pctl = platform_get_drvdata(pdev);
325 int i, pin, npins = pctl->desc->npins;
327 pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out";
328 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT;
329 pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in";
330 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN;
331 pctl->funcs[AXP20X_FUNC_LDO].name = "ldo";
333 * Muxval for LDO is useless as we won't use it.
334 * See comment in axp20x_pmx_set_mux.
336 pctl->funcs[AXP20X_FUNC_ADC].name = "adc";
337 pctl->funcs[AXP20X_FUNC_ADC].muxval = AXP20X_MUX_ADC;
339 /* Every pin supports GPIO_OUT and GPIO_IN functions */
340 for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) {
341 pctl->funcs[i].ngroups = npins;
342 pctl->funcs[i].groups = devm_kzalloc(&pdev->dev,
343 npins * sizeof(char *),
345 for (pin = 0; pin < npins; pin++)
346 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name;
349 axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask,
350 npins, &pctl->funcs[AXP20X_FUNC_LDO],
353 axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask,
354 npins, &pctl->funcs[AXP20X_FUNC_ADC],
358 static int axp20x_pctl_probe(struct platform_device *pdev)
360 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
361 struct axp20x_pctl *pctl;
362 struct pinctrl_desc *pctrl_desc;
365 if (!of_device_is_available(pdev->dev.of_node))
369 dev_err(&pdev->dev, "Parent drvdata not set\n");
373 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
377 pctl->chip.base = -1;
378 pctl->chip.can_sleep = true;
379 pctl->chip.request = gpiochip_generic_request;
380 pctl->chip.free = gpiochip_generic_free;
381 pctl->chip.parent = &pdev->dev;
382 pctl->chip.label = dev_name(&pdev->dev);
383 pctl->chip.owner = THIS_MODULE;
384 pctl->chip.get = axp20x_gpio_get;
385 pctl->chip.get_direction = axp20x_gpio_get_direction;
386 pctl->chip.set = axp20x_gpio_set;
387 pctl->chip.direction_input = axp20x_gpio_input;
388 pctl->chip.direction_output = axp20x_gpio_output;
389 pctl->chip.ngpio = 3;
391 pctl->desc = &axp20x_data;
392 pctl->regmap = axp20x->regmap;
393 pctl->dev = &pdev->dev;
395 platform_set_drvdata(pdev, pctl);
397 axp20x_build_funcs_groups(pdev);
399 pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);
403 pctrl_desc->name = dev_name(&pdev->dev);
404 pctrl_desc->owner = THIS_MODULE;
405 pctrl_desc->pins = pctl->desc->pins;
406 pctrl_desc->npins = pctl->desc->npins;
407 pctrl_desc->pctlops = &axp20x_pctrl_ops;
408 pctrl_desc->pmxops = &axp20x_pmx_ops;
410 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl);
411 if (IS_ERR(pctl->pctl_dev)) {
412 dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
413 return PTR_ERR(pctl->pctl_dev);
416 ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl);
418 dev_err(&pdev->dev, "Failed to register GPIO chip\n");
422 ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev),
423 pctl->desc->pins->number,
424 pctl->desc->pins->number,
427 dev_err(&pdev->dev, "failed to add pin range\n");
431 dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n");
436 static const struct of_device_id axp20x_pctl_match[] = {
437 { .compatible = "x-powers,axp209-gpio" },
440 MODULE_DEVICE_TABLE(of, axp20x_pctl_match);
442 static struct platform_driver axp20x_pctl_driver = {
443 .probe = axp20x_pctl_probe,
445 .name = "axp20x-gpio",
446 .of_match_table = axp20x_pctl_match,
450 module_platform_driver(axp20x_pctl_driver);
452 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
453 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
454 MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver");
455 MODULE_LICENSE("GPL");