1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019 DENX Software Engineering
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
9 #include <asm/global_data.h>
10 #include <dm/device_compat.h>
11 #include <dm/devres.h>
13 #include <linux/err.h>
15 #include <dm/pinctrl.h>
17 #include "pinctrl-mxs.h"
19 DECLARE_GLOBAL_DATA_PTR;
21 struct mxs_pinctrl_priv {
23 const struct mxs_regs *regs;
26 static unsigned long mxs_dt_node_to_map(struct udevice *conf)
28 unsigned long config = 0;
32 ret = dev_read_u32(conf, "fsl,drive-strength", &val);
34 config = val | MA_PRESENT;
36 ret = dev_read_u32(conf, "fsl,voltage", &val);
38 config |= val << VOL_SHIFT | VOL_PRESENT;
40 ret = dev_read_u32(conf, "fsl,pull-up", &val);
42 config |= val << PULL_SHIFT | PULL_PRESENT;
47 static int mxs_pinctrl_set_mux(struct udevice *dev, u32 val, int bank, int pin)
49 struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
50 int muxsel = MUXID_TO_MUXSEL(val), shift;
53 reg = iomux->base + iomux->regs->muxsel;
54 reg += bank * 0x20 + pin / 16 * 0x10;
57 mxs_pinctrl_rmwl(muxsel, 0x3, shift, reg);
58 debug(" mux %d,", muxsel);
63 static int mxs_pinctrl_set_state(struct udevice *dev, struct udevice *conf)
65 struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
66 u32 *pin_data, val, ma, vol, pull;
67 int npins, size, i, ret;
70 debug("\n%s: set state: %s\n", __func__, conf->name);
72 size = dev_read_size(conf, "fsl,pinmux-ids");
76 if (!size || size % sizeof(int)) {
77 dev_err(dev, "Invalid fsl,pinmux-ids property in %s\n",
82 npins = size / sizeof(int);
84 pin_data = devm_kzalloc(dev, size, 0);
88 ret = dev_read_u32_array(conf, "fsl,pinmux-ids", pin_data, npins);
90 dev_err(dev, "Error reading pin data.\n");
91 devm_kfree(dev, pin_data);
95 config = mxs_dt_node_to_map(conf);
97 ma = CONFIG_TO_MA(config);
98 vol = CONFIG_TO_VOL(config);
99 pull = CONFIG_TO_PULL(config);
101 for (i = 0; i < npins; i++) {
102 int pinid, bank, pin, shift;
107 pinid = MUXID_TO_PINID(val);
108 bank = PINID_TO_BANK(pinid);
109 pin = PINID_TO_PIN(pinid);
111 debug("(val: 0x%x) pin %d,", val, pinid);
113 mxs_pinctrl_set_mux(dev, val, bank, pin);
115 debug(" ma: %d, vol: %d, pull: %d\n", ma, vol, pull);
118 reg = iomux->base + iomux->regs->drive;
119 reg += bank * 0x40 + pin / 8 * 0x10;
122 if (config & MA_PRESENT) {
124 mxs_pinctrl_rmwl(ma, 0x3, shift, reg);
128 if (config & VOL_PRESENT) {
129 shift = pin % 8 * 4 + 2;
131 writel(1 << shift, reg + SET);
133 writel(1 << shift, reg + CLR);
137 if (config & PULL_PRESENT) {
138 reg = iomux->base + iomux->regs->pull;
142 writel(1 << shift, reg + SET);
144 writel(1 << shift, reg + CLR);
148 devm_kfree(dev, pin_data);
152 static struct pinctrl_ops mxs_pinctrl_ops = {
153 .set_state = mxs_pinctrl_set_state,
156 static int mxs_pinctrl_probe(struct udevice *dev)
158 struct mxs_pinctrl_priv *iomux = dev_get_priv(dev);
160 iomux->base = dev_read_addr_ptr(dev);
161 iomux->regs = (struct mxs_regs *)dev_get_driver_data(dev);
166 static const struct mxs_regs imx23_regs = {
172 static const struct mxs_regs imx28_regs = {
178 static const struct udevice_id mxs_pinctrl_match[] = {
179 { .compatible = "fsl,imx23-pinctrl", .data = (ulong)&imx23_regs },
180 { .compatible = "fsl,imx28-pinctrl", .data = (ulong)&imx28_regs },
184 U_BOOT_DRIVER(fsl_imx23_pinctrl) = {
185 .name = "fsl_imx23_pinctrl",
186 .id = UCLASS_PINCTRL,
187 .of_match = of_match_ptr(mxs_pinctrl_match),
188 .probe = mxs_pinctrl_probe,
189 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
190 .bind = dm_scan_fdt_dev,
192 .priv_auto = sizeof(struct mxs_pinctrl_priv),
193 .ops = &mxs_pinctrl_ops,
196 DM_DRIVER_ALIAS(fsl_imx23_pinctrl, fsl_imx28_pinctrl)