2 * Copyright (C) ST-Ericsson SA 2013
4 * Author: Patrice Chotard <patrice.chotard@st.com>
5 * License terms: GNU General Public License (GPL) version 2
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/slab.h>
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/err.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
21 #include <linux/irq.h>
22 #include <linux/irqdomain.h>
23 #include <linux/interrupt.h>
24 #include <linux/bitops.h>
25 #include <linux/mfd/abx500.h>
26 #include <linux/mfd/abx500/ab8500.h>
27 #include <linux/pinctrl/pinctrl.h>
28 #include <linux/pinctrl/consumer.h>
29 #include <linux/pinctrl/pinmux.h>
30 #include <linux/pinctrl/pinconf.h>
31 #include <linux/pinctrl/pinconf-generic.h>
32 #include <linux/pinctrl/machine.h>
34 #include "pinctrl-abx500.h"
36 #include "../pinconf.h"
37 #include "../pinctrl-utils.h"
40 * The AB9540 and AB8540 GPIO support are extended versions
41 * of the AB8500 GPIO support.
42 * The AB9540 supports an additional (7th) register so that
43 * more GPIO may be configured and used.
44 * The AB8540 supports 4 new gpios (GPIOx_VBAT) that have
45 * internal pull-up and pull-down capabilities.
49 * GPIO registers offset
52 #define AB8500_GPIO_SEL1_REG 0x00
53 #define AB8500_GPIO_SEL2_REG 0x01
54 #define AB8500_GPIO_SEL3_REG 0x02
55 #define AB8500_GPIO_SEL4_REG 0x03
56 #define AB8500_GPIO_SEL5_REG 0x04
57 #define AB8500_GPIO_SEL6_REG 0x05
58 #define AB9540_GPIO_SEL7_REG 0x06
60 #define AB8500_GPIO_DIR1_REG 0x10
61 #define AB8500_GPIO_DIR2_REG 0x11
62 #define AB8500_GPIO_DIR3_REG 0x12
63 #define AB8500_GPIO_DIR4_REG 0x13
64 #define AB8500_GPIO_DIR5_REG 0x14
65 #define AB8500_GPIO_DIR6_REG 0x15
66 #define AB9540_GPIO_DIR7_REG 0x16
68 #define AB8500_GPIO_OUT1_REG 0x20
69 #define AB8500_GPIO_OUT2_REG 0x21
70 #define AB8500_GPIO_OUT3_REG 0x22
71 #define AB8500_GPIO_OUT4_REG 0x23
72 #define AB8500_GPIO_OUT5_REG 0x24
73 #define AB8500_GPIO_OUT6_REG 0x25
74 #define AB9540_GPIO_OUT7_REG 0x26
76 #define AB8500_GPIO_PUD1_REG 0x30
77 #define AB8500_GPIO_PUD2_REG 0x31
78 #define AB8500_GPIO_PUD3_REG 0x32
79 #define AB8500_GPIO_PUD4_REG 0x33
80 #define AB8500_GPIO_PUD5_REG 0x34
81 #define AB8500_GPIO_PUD6_REG 0x35
82 #define AB9540_GPIO_PUD7_REG 0x36
84 #define AB8500_GPIO_IN1_REG 0x40
85 #define AB8500_GPIO_IN2_REG 0x41
86 #define AB8500_GPIO_IN3_REG 0x42
87 #define AB8500_GPIO_IN4_REG 0x43
88 #define AB8500_GPIO_IN5_REG 0x44
89 #define AB8500_GPIO_IN6_REG 0x45
90 #define AB9540_GPIO_IN7_REG 0x46
91 #define AB8540_GPIO_VINSEL_REG 0x47
92 #define AB8540_GPIO_PULL_UPDOWN_REG 0x48
93 #define AB8500_GPIO_ALTFUN_REG 0x50
94 #define AB8540_GPIO_PULL_UPDOWN_MASK 0x03
95 #define AB8540_GPIO_VINSEL_MASK 0x03
96 #define AB8540_GPIOX_VBAT_START 51
97 #define AB8540_GPIOX_VBAT_END 54
99 #define ABX500_GPIO_INPUT 0
100 #define ABX500_GPIO_OUTPUT 1
102 struct abx500_pinctrl {
104 struct pinctrl_dev *pctldev;
105 struct abx500_pinctrl_soc_data *soc;
106 struct gpio_chip chip;
107 struct ab8500 *parent;
108 struct abx500_gpio_irq_cluster *irq_cluster;
109 int irq_cluster_size;
112 static int abx500_gpio_get_bit(struct gpio_chip *chip, u8 reg,
113 unsigned offset, bool *bit)
115 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
121 ret = abx500_get_register_interruptible(pct->dev,
122 AB8500_MISC, reg, &val);
124 *bit = !!(val & BIT(pos));
128 "%s read reg =%x, offset=%x failed (%d)\n",
129 __func__, reg, offset, ret);
134 static int abx500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
135 unsigned offset, int val)
137 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
142 ret = abx500_mask_and_set_register_interruptible(pct->dev,
143 AB8500_MISC, reg, BIT(pos), val << pos);
145 dev_err(pct->dev, "%s write reg, %x offset %x failed (%d)\n",
146 __func__, reg, offset, ret);
152 * abx500_gpio_get() - Get the particular GPIO value
154 * @offset: GPIO number to read
156 static int abx500_gpio_get(struct gpio_chip *chip, unsigned offset)
158 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
161 u8 gpio_offset = offset - 1;
164 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
165 gpio_offset, &is_out);
170 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_OUT1_REG,
173 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_IN1_REG,
177 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
184 static void abx500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
186 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
189 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
191 dev_err(pct->dev, "%s write failed (%d)\n", __func__, ret);
194 static int abx500_get_pull_updown(struct abx500_pinctrl *pct, int offset,
195 enum abx500_gpio_pull_updown *pull_updown)
200 struct pullud *pullud;
202 if (!pct->soc->pullud) {
203 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
209 pullud = pct->soc->pullud;
211 if ((offset < pullud->first_pin)
212 || (offset > pullud->last_pin)) {
217 ret = abx500_get_register_interruptible(pct->dev,
218 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG, &val);
220 pos = (offset - pullud->first_pin) << 1;
221 *pull_updown = (val >> pos) & AB8540_GPIO_PULL_UPDOWN_MASK;
225 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
230 static int abx500_set_pull_updown(struct abx500_pinctrl *pct,
231 int offset, enum abx500_gpio_pull_updown val)
235 struct pullud *pullud;
237 if (!pct->soc->pullud) {
238 dev_err(pct->dev, "%s AB chip doesn't support pull up/down feature",
244 pullud = pct->soc->pullud;
246 if ((offset < pullud->first_pin)
247 || (offset > pullud->last_pin)) {
251 pos = (offset - pullud->first_pin) << 1;
253 ret = abx500_mask_and_set_register_interruptible(pct->dev,
254 AB8500_MISC, AB8540_GPIO_PULL_UPDOWN_REG,
255 AB8540_GPIO_PULL_UPDOWN_MASK << pos, val << pos);
259 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
264 static bool abx500_pullud_supported(struct gpio_chip *chip, unsigned gpio)
266 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
267 struct pullud *pullud = pct->soc->pullud;
270 gpio >= pullud->first_pin &&
271 gpio <= pullud->last_pin);
274 static int abx500_gpio_direction_output(struct gpio_chip *chip,
278 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
282 /* set direction as output */
283 ret = abx500_gpio_set_bits(chip,
284 AB8500_GPIO_DIR1_REG,
290 /* disable pull down */
291 ret = abx500_gpio_set_bits(chip,
292 AB8500_GPIO_PUD1_REG,
294 ABX500_GPIO_PULL_NONE);
298 /* if supported, disable both pull down and pull up */
300 if (abx500_pullud_supported(chip, gpio)) {
301 ret = abx500_set_pull_updown(pct,
303 ABX500_GPIO_PULL_NONE);
307 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
311 /* set the output as 1 or 0 */
312 return abx500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
315 static int abx500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
317 /* set the register as input */
318 return abx500_gpio_set_bits(chip,
319 AB8500_GPIO_DIR1_REG,
324 static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
326 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
327 /* The AB8500 GPIO numbers are off by one */
328 int gpio = offset + 1;
332 for (i = 0; i < pct->irq_cluster_size; i++) {
333 struct abx500_gpio_irq_cluster *cluster =
334 &pct->irq_cluster[i];
336 if (gpio >= cluster->start && gpio <= cluster->end) {
338 * The ABx500 GPIO's associated IRQs are clustered together
339 * throughout the interrupt numbers at irregular intervals.
340 * To solve this quandry, we have placed the read-in values
341 * into the cluster information table.
343 hwirq = gpio - cluster->start + cluster->to_irq;
344 return irq_create_mapping(pct->parent->domain, hwirq);
351 static int abx500_set_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
352 unsigned gpio, int alt_setting)
354 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
355 struct alternate_functions af = pct->soc->alternate_functions[gpio];
360 const char *modes[] = {
361 [ABX500_DEFAULT] = "default",
362 [ABX500_ALT_A] = "altA",
363 [ABX500_ALT_B] = "altB",
364 [ABX500_ALT_C] = "altC",
368 if (((alt_setting == ABX500_ALT_A) && (af.gpiosel_bit == UNUSED)) ||
369 ((alt_setting == ABX500_ALT_B) && (af.alt_bit1 == UNUSED)) ||
370 ((alt_setting == ABX500_ALT_C) && (af.alt_bit2 == UNUSED))) {
371 dev_dbg(pct->dev, "pin %d doesn't support %s mode\n", gpio,
376 /* on ABx5xx, there is no GPIO0, so adjust the offset */
379 switch (alt_setting) {
382 * for ABx5xx family, default mode is always selected by
383 * writing 0 to GPIOSELx register, except for pins which
384 * support at least ALT_B mode, default mode is selected
385 * by writing 1 to GPIOSELx register
388 if (af.alt_bit1 != UNUSED)
391 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
397 * for ABx5xx family, alt_a mode is always selected by
398 * writing 1 to GPIOSELx register, except for pins which
399 * support at least ALT_B mode, alt_a mode is selected
400 * by writing 0 to GPIOSELx register and 0 in ALTFUNC
403 if (af.alt_bit1 != UNUSED) {
404 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
409 ret = abx500_gpio_set_bits(chip,
410 AB8500_GPIO_ALTFUN_REG,
412 !!(af.alta_val & BIT(0)));
416 if (af.alt_bit2 != UNUSED)
417 ret = abx500_gpio_set_bits(chip,
418 AB8500_GPIO_ALTFUN_REG,
420 !!(af.alta_val & BIT(1)));
422 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
427 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
432 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
433 af.alt_bit1, !!(af.altb_val & BIT(0)));
437 if (af.alt_bit2 != UNUSED)
438 ret = abx500_gpio_set_bits(chip,
439 AB8500_GPIO_ALTFUN_REG,
441 !!(af.altb_val & BIT(1)));
445 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_SEL1_REG,
450 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
451 af.alt_bit2, !!(af.altc_val & BIT(0)));
455 ret = abx500_gpio_set_bits(chip, AB8500_GPIO_ALTFUN_REG,
456 af.alt_bit2, !!(af.altc_val & BIT(1)));
460 dev_dbg(pct->dev, "unknown alt_setting %d\n", alt_setting);
466 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
471 static int abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip,
478 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
479 struct alternate_functions af = pct->soc->alternate_functions[gpio];
480 /* on ABx5xx, there is no GPIO0, so adjust the offset */
481 unsigned offset = gpio - 1;
485 * if gpiosel_bit is set to unused,
486 * it means no GPIO or special case
488 if (af.gpiosel_bit == UNUSED)
489 return ABX500_DEFAULT;
491 /* read GpioSelx register */
492 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8),
493 af.gpiosel_bit, &bit_mode);
500 if ((af.alt_bit1 < UNUSED) || (af.alt_bit1 > 7) ||
501 (af.alt_bit2 < UNUSED) || (af.alt_bit2 > 7)) {
503 "alt_bitX value not in correct range (-1 to 7)\n");
507 /* if alt_bit2 is used, alt_bit1 must be used too */
508 if ((af.alt_bit2 != UNUSED) && (af.alt_bit1 == UNUSED)) {
510 "if alt_bit2 is used, alt_bit1 can't be unused\n");
514 /* check if pin use AlternateFunction register */
515 if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED))
518 * if pin GPIOSEL bit is set and pin supports alternate function,
519 * it means DEFAULT mode
522 return ABX500_DEFAULT;
525 * pin use the AlternatFunction register
526 * read alt_bit1 value
528 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
529 af.alt_bit1, &alt_bit1);
533 if (af.alt_bit2 != UNUSED) {
534 /* read alt_bit2 value */
535 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_ALTFUN_REG,
543 mode = (alt_bit2 << 1) + alt_bit1;
544 if (mode == af.alta_val)
546 else if (mode == af.altb_val)
552 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
556 #ifdef CONFIG_DEBUG_FS
558 #include <linux/seq_file.h>
560 static void abx500_gpio_dbg_show_one(struct seq_file *s,
561 struct pinctrl_dev *pctldev,
562 struct gpio_chip *chip,
563 unsigned offset, unsigned gpio)
565 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
566 const char *label = gpiochip_is_requested(chip, offset - 1);
567 u8 gpio_offset = offset - 1;
571 enum abx500_gpio_pull_updown pud = 0;
574 const char *modes[] = {
575 [ABX500_DEFAULT] = "default",
576 [ABX500_ALT_A] = "altA",
577 [ABX500_ALT_B] = "altB",
578 [ABX500_ALT_C] = "altC",
581 const char *pull_up_down[] = {
582 [ABX500_GPIO_PULL_DOWN] = "pull down",
583 [ABX500_GPIO_PULL_NONE] = "pull none",
584 [ABX500_GPIO_PULL_NONE + 1] = "pull none",
585 [ABX500_GPIO_PULL_UP] = "pull up",
588 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_DIR1_REG,
589 gpio_offset, &is_out);
593 seq_printf(s, " gpio-%-3d (%-20.20s) %-3s",
594 gpio, label ?: "(none)",
595 is_out ? "out" : "in ");
598 if (abx500_pullud_supported(chip, offset)) {
599 ret = abx500_get_pull_updown(pct, offset, &pud);
603 seq_printf(s, " %-9s", pull_up_down[pud]);
605 ret = abx500_gpio_get_bit(chip, AB8500_GPIO_PUD1_REG,
610 seq_printf(s, " %-9s", pull_up_down[pd]);
613 seq_printf(s, " %-9s", chip->get(chip, offset) ? "hi" : "lo");
615 mode = abx500_get_mode(pctldev, chip, offset);
617 seq_printf(s, " %s", (mode < 0) ? "unknown" : modes[mode]);
621 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
624 static void abx500_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
627 unsigned gpio = chip->base;
628 struct abx500_pinctrl *pct = gpiochip_get_data(chip);
629 struct pinctrl_dev *pctldev = pct->pctldev;
631 for (i = 0; i < chip->ngpio; i++, gpio++) {
632 /* On AB8500, there is no GPIO0, the first is the GPIO 1 */
633 abx500_gpio_dbg_show_one(s, pctldev, chip, i + 1, gpio);
639 static inline void abx500_gpio_dbg_show_one(struct seq_file *s,
640 struct pinctrl_dev *pctldev,
641 struct gpio_chip *chip,
642 unsigned offset, unsigned gpio)
645 #define abx500_gpio_dbg_show NULL
648 static struct gpio_chip abx500gpio_chip = {
649 .label = "abx500-gpio",
650 .owner = THIS_MODULE,
651 .request = gpiochip_generic_request,
652 .free = gpiochip_generic_free,
653 .direction_input = abx500_gpio_direction_input,
654 .get = abx500_gpio_get,
655 .direction_output = abx500_gpio_direction_output,
656 .set = abx500_gpio_set,
657 .to_irq = abx500_gpio_to_irq,
658 .dbg_show = abx500_gpio_dbg_show,
661 static int abx500_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
663 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
665 return pct->soc->nfunctions;
668 static const char *abx500_pmx_get_func_name(struct pinctrl_dev *pctldev,
671 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
673 return pct->soc->functions[function].name;
676 static int abx500_pmx_get_func_groups(struct pinctrl_dev *pctldev,
678 const char * const **groups,
679 unsigned * const num_groups)
681 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
683 *groups = pct->soc->functions[function].groups;
684 *num_groups = pct->soc->functions[function].ngroups;
689 static int abx500_pmx_set(struct pinctrl_dev *pctldev, unsigned function,
692 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
693 struct gpio_chip *chip = &pct->chip;
694 const struct abx500_pingroup *g;
698 g = &pct->soc->groups[group];
699 if (g->altsetting < 0)
702 dev_dbg(pct->dev, "enable group %s, %u pins\n", g->name, g->npins);
704 for (i = 0; i < g->npins; i++) {
705 dev_dbg(pct->dev, "setting pin %d to altsetting %d\n",
706 g->pins[i], g->altsetting);
708 ret = abx500_set_mode(pctldev, chip, g->pins[i], g->altsetting);
712 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
717 static int abx500_gpio_request_enable(struct pinctrl_dev *pctldev,
718 struct pinctrl_gpio_range *range,
721 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
722 const struct abx500_pinrange *p;
727 * Different ranges have different ways to enable GPIO function on a
728 * pin, so refer back to our local range type, where we handily define
729 * what altfunc enables GPIO for a certain pin.
731 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
732 p = &pct->soc->gpio_ranges[i];
733 if ((offset >= p->offset) &&
734 (offset < (p->offset + p->npins)))
738 if (i == pct->soc->gpio_num_ranges) {
739 dev_err(pct->dev, "%s failed to locate range\n", __func__);
743 dev_dbg(pct->dev, "enable GPIO by altfunc %d at gpio %d\n",
746 ret = abx500_set_mode(pct->pctldev, &pct->chip,
749 dev_err(pct->dev, "%s setting altfunc failed\n", __func__);
754 static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev,
755 struct pinctrl_gpio_range *range,
760 static const struct pinmux_ops abx500_pinmux_ops = {
761 .get_functions_count = abx500_pmx_get_funcs_cnt,
762 .get_function_name = abx500_pmx_get_func_name,
763 .get_function_groups = abx500_pmx_get_func_groups,
764 .set_mux = abx500_pmx_set,
765 .gpio_request_enable = abx500_gpio_request_enable,
766 .gpio_disable_free = abx500_gpio_disable_free,
769 static int abx500_get_groups_cnt(struct pinctrl_dev *pctldev)
771 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
773 return pct->soc->ngroups;
776 static const char *abx500_get_group_name(struct pinctrl_dev *pctldev,
779 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
781 return pct->soc->groups[selector].name;
784 static int abx500_get_group_pins(struct pinctrl_dev *pctldev,
786 const unsigned **pins,
789 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
791 *pins = pct->soc->groups[selector].pins;
792 *num_pins = pct->soc->groups[selector].npins;
797 static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev,
798 struct seq_file *s, unsigned offset)
800 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
801 struct gpio_chip *chip = &pct->chip;
803 abx500_gpio_dbg_show_one(s, pctldev, chip, offset,
804 chip->base + offset - 1);
807 static int abx500_dt_add_map_mux(struct pinctrl_map **map,
808 unsigned *reserved_maps,
809 unsigned *num_maps, const char *group,
810 const char *function)
812 if (*num_maps == *reserved_maps)
815 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
816 (*map)[*num_maps].data.mux.group = group;
817 (*map)[*num_maps].data.mux.function = function;
823 static int abx500_dt_add_map_configs(struct pinctrl_map **map,
824 unsigned *reserved_maps,
825 unsigned *num_maps, const char *group,
826 unsigned long *configs, unsigned num_configs)
828 unsigned long *dup_configs;
830 if (*num_maps == *reserved_maps)
833 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
838 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_PIN;
840 (*map)[*num_maps].data.configs.group_or_pin = group;
841 (*map)[*num_maps].data.configs.configs = dup_configs;
842 (*map)[*num_maps].data.configs.num_configs = num_configs;
848 static const char *abx500_find_pin_name(struct pinctrl_dev *pctldev,
849 const char *pin_name)
852 struct abx500_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
854 if (sscanf((char *)pin_name, "GPIO%d", &pin_number) == 1)
855 for (i = 0; i < npct->soc->npins; i++)
856 if (npct->soc->pins[i].number == pin_number)
857 return npct->soc->pins[i].name;
861 static int abx500_dt_subnode_to_map(struct pinctrl_dev *pctldev,
862 struct device_node *np,
863 struct pinctrl_map **map,
864 unsigned *reserved_maps,
868 const char *function = NULL;
869 unsigned long *configs;
870 unsigned int nconfigs = 0;
871 struct property *prop;
873 ret = of_property_read_string(np, "function", &function);
877 ret = of_property_count_strings(np, "groups");
881 ret = pinctrl_utils_reserve_map(pctldev, map, reserved_maps,
886 of_property_for_each_string(np, "groups", prop, group) {
887 ret = abx500_dt_add_map_mux(map, reserved_maps,
888 num_maps, group, function);
894 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs, &nconfigs);
896 const char *gpio_name;
899 ret = of_property_count_strings(np, "pins");
903 ret = pinctrl_utils_reserve_map(pctldev, map,
909 of_property_for_each_string(np, "pins", prop, pin) {
910 gpio_name = abx500_find_pin_name(pctldev, pin);
912 ret = abx500_dt_add_map_configs(map, reserved_maps,
913 num_maps, gpio_name, configs, 1);
923 static int abx500_dt_node_to_map(struct pinctrl_dev *pctldev,
924 struct device_node *np_config,
925 struct pinctrl_map **map, unsigned *num_maps)
927 unsigned reserved_maps;
928 struct device_node *np;
935 for_each_child_of_node(np_config, np) {
936 ret = abx500_dt_subnode_to_map(pctldev, np, map,
937 &reserved_maps, num_maps);
939 pinctrl_utils_dt_free_map(pctldev, *map, *num_maps);
947 static const struct pinctrl_ops abx500_pinctrl_ops = {
948 .get_groups_count = abx500_get_groups_cnt,
949 .get_group_name = abx500_get_group_name,
950 .get_group_pins = abx500_get_group_pins,
951 .pin_dbg_show = abx500_pin_dbg_show,
952 .dt_node_to_map = abx500_dt_node_to_map,
953 .dt_free_map = pinctrl_utils_dt_free_map,
956 static int abx500_pin_config_get(struct pinctrl_dev *pctldev,
958 unsigned long *config)
963 static int abx500_pin_config_set(struct pinctrl_dev *pctldev,
965 unsigned long *configs,
966 unsigned num_configs)
968 struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev);
969 struct gpio_chip *chip = &pct->chip;
973 enum pin_config_param param;
974 enum pin_config_param argument;
976 for (i = 0; i < num_configs; i++) {
977 param = pinconf_to_config_param(configs[i]);
978 argument = pinconf_to_config_argument(configs[i]);
980 dev_dbg(chip->parent, "pin %d [%#lx]: %s %s\n",
982 (param == PIN_CONFIG_OUTPUT) ? "output " : "input",
983 (param == PIN_CONFIG_OUTPUT) ?
984 (argument ? "high" : "low") :
985 (argument ? "pull up" : "pull down"));
987 /* on ABx500, there is no GPIO0, so adjust the offset */
991 case PIN_CONFIG_BIAS_DISABLE:
992 ret = abx500_gpio_direction_input(chip, offset);
996 * Some chips only support pull down, while some
997 * actually support both pull up and pull down. Such
998 * chips have a "pullud" range specified for the pins
999 * that support both features. If the pin is not
1000 * within that range, we fall back to the old bit set
1001 * that only support pull down.
1003 if (abx500_pullud_supported(chip, pin))
1004 ret = abx500_set_pull_updown(pct,
1006 ABX500_GPIO_PULL_NONE);
1008 /* Chip only supports pull down */
1009 ret = abx500_gpio_set_bits(chip,
1010 AB8500_GPIO_PUD1_REG, offset,
1011 ABX500_GPIO_PULL_NONE);
1014 case PIN_CONFIG_BIAS_PULL_DOWN:
1015 ret = abx500_gpio_direction_input(chip, offset);
1019 * if argument = 1 set the pull down
1020 * else clear the pull down
1021 * Some chips only support pull down, while some
1022 * actually support both pull up and pull down. Such
1023 * chips have a "pullud" range specified for the pins
1024 * that support both features. If the pin is not
1025 * within that range, we fall back to the old bit set
1026 * that only support pull down.
1028 if (abx500_pullud_supported(chip, pin))
1029 ret = abx500_set_pull_updown(pct,
1031 argument ? ABX500_GPIO_PULL_DOWN :
1032 ABX500_GPIO_PULL_NONE);
1034 /* Chip only supports pull down */
1035 ret = abx500_gpio_set_bits(chip,
1036 AB8500_GPIO_PUD1_REG,
1038 argument ? ABX500_GPIO_PULL_DOWN :
1039 ABX500_GPIO_PULL_NONE);
1042 case PIN_CONFIG_BIAS_PULL_UP:
1043 ret = abx500_gpio_direction_input(chip, offset);
1047 * if argument = 1 set the pull up
1048 * else clear the pull up
1050 ret = abx500_gpio_direction_input(chip, offset);
1052 * Some chips only support pull down, while some
1053 * actually support both pull up and pull down. Such
1054 * chips have a "pullud" range specified for the pins
1055 * that support both features. If the pin is not
1056 * within that range, do nothing
1058 if (abx500_pullud_supported(chip, pin))
1059 ret = abx500_set_pull_updown(pct,
1061 argument ? ABX500_GPIO_PULL_UP :
1062 ABX500_GPIO_PULL_NONE);
1065 case PIN_CONFIG_OUTPUT:
1066 ret = abx500_gpio_direction_output(chip, offset,
1071 dev_err(chip->parent,
1072 "illegal configuration requested\n");
1074 } /* for each config */
1077 dev_err(pct->dev, "%s failed (%d)\n", __func__, ret);
1082 static const struct pinconf_ops abx500_pinconf_ops = {
1083 .pin_config_get = abx500_pin_config_get,
1084 .pin_config_set = abx500_pin_config_set,
1088 static struct pinctrl_desc abx500_pinctrl_desc = {
1089 .name = "pinctrl-abx500",
1090 .pctlops = &abx500_pinctrl_ops,
1091 .pmxops = &abx500_pinmux_ops,
1092 .confops = &abx500_pinconf_ops,
1093 .owner = THIS_MODULE,
1096 static int abx500_get_gpio_num(struct abx500_pinctrl_soc_data *soc)
1098 unsigned int lowest = 0;
1099 unsigned int highest = 0;
1100 unsigned int npins = 0;
1104 * Compute number of GPIOs from the last SoC gpio range descriptors
1105 * These ranges may include "holes" but the GPIO number space shall
1106 * still be homogeneous, so we need to detect and account for any
1107 * such holes so that these are included in the number of GPIO pins.
1109 for (i = 0; i < soc->gpio_num_ranges; i++) {
1112 const struct abx500_pinrange *p;
1114 p = &soc->gpio_ranges[i];
1116 gend = p->offset + p->npins - 1;
1119 /* First iteration, set start values */
1123 if (gstart < lowest)
1129 /* this gives the absolute number of pins */
1130 npins = highest - lowest + 1;
1134 static const struct of_device_id abx500_gpio_match[] = {
1135 { .compatible = "stericsson,ab8500-gpio", .data = (void *)PINCTRL_AB8500, },
1136 { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, },
1137 { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, },
1138 { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, },
1142 static int abx500_gpio_probe(struct platform_device *pdev)
1144 struct device_node *np = pdev->dev.of_node;
1145 const struct of_device_id *match;
1146 struct abx500_pinctrl *pct;
1147 unsigned int id = -1;
1152 dev_err(&pdev->dev, "gpio dt node missing\n");
1156 pct = devm_kzalloc(&pdev->dev, sizeof(struct abx500_pinctrl),
1160 "failed to allocate memory for pct\n");
1164 pct->dev = &pdev->dev;
1165 pct->parent = dev_get_drvdata(pdev->dev.parent);
1166 pct->chip = abx500gpio_chip;
1167 pct->chip.parent = &pdev->dev;
1168 pct->chip.base = -1; /* Dynamic allocation */
1170 match = of_match_device(abx500_gpio_match, &pdev->dev);
1172 dev_err(&pdev->dev, "gpio dt not matching\n");
1175 id = (unsigned long)match->data;
1177 /* Poke in other ASIC variants here */
1179 case PINCTRL_AB8500:
1180 abx500_pinctrl_ab8500_init(&pct->soc);
1182 case PINCTRL_AB8540:
1183 abx500_pinctrl_ab8540_init(&pct->soc);
1185 case PINCTRL_AB9540:
1186 abx500_pinctrl_ab9540_init(&pct->soc);
1188 case PINCTRL_AB8505:
1189 abx500_pinctrl_ab8505_init(&pct->soc);
1192 dev_err(&pdev->dev, "Unsupported pinctrl sub driver (%d)\n", id);
1197 dev_err(&pdev->dev, "Invalid SOC data\n");
1201 pct->chip.ngpio = abx500_get_gpio_num(pct->soc);
1202 pct->irq_cluster = pct->soc->gpio_irq_cluster;
1203 pct->irq_cluster_size = pct->soc->ngpio_irq_cluster;
1205 ret = gpiochip_add_data(&pct->chip, pct);
1207 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
1210 dev_info(&pdev->dev, "added gpiochip\n");
1212 abx500_pinctrl_desc.pins = pct->soc->pins;
1213 abx500_pinctrl_desc.npins = pct->soc->npins;
1214 pct->pctldev = pinctrl_register(&abx500_pinctrl_desc, &pdev->dev, pct);
1215 if (IS_ERR(pct->pctldev)) {
1217 "could not register abx500 pinctrl driver\n");
1218 ret = PTR_ERR(pct->pctldev);
1221 dev_info(&pdev->dev, "registered pin controller\n");
1223 /* We will handle a range of GPIO pins */
1224 for (i = 0; i < pct->soc->gpio_num_ranges; i++) {
1225 const struct abx500_pinrange *p = &pct->soc->gpio_ranges[i];
1227 ret = gpiochip_add_pin_range(&pct->chip,
1228 dev_name(&pdev->dev),
1229 p->offset - 1, p->offset, p->npins);
1234 platform_set_drvdata(pdev, pct);
1235 dev_info(&pdev->dev, "initialized abx500 pinctrl driver\n");
1240 gpiochip_remove(&pct->chip);
1245 * abx500_gpio_remove() - remove Ab8500-gpio driver
1246 * @pdev: Platform device registered
1248 static int abx500_gpio_remove(struct platform_device *pdev)
1250 struct abx500_pinctrl *pct = platform_get_drvdata(pdev);
1252 gpiochip_remove(&pct->chip);
1256 static struct platform_driver abx500_gpio_driver = {
1258 .name = "abx500-gpio",
1259 .of_match_table = abx500_gpio_match,
1261 .probe = abx500_gpio_probe,
1262 .remove = abx500_gpio_remove,
1265 static int __init abx500_gpio_init(void)
1267 return platform_driver_register(&abx500_gpio_driver);
1269 core_initcall(abx500_gpio_init);
1271 MODULE_AUTHOR("Patrice Chotard <patrice.chotard@st.com>");
1272 MODULE_DESCRIPTION("Driver allows to use AxB5xx unused pins to be used as GPIO");
1273 MODULE_ALIAS("platform:abx500-gpio");
1274 MODULE_LICENSE("GPL v2");