2 * Marvell MVEBU pinctrl core driver
4 * Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/platform_device.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
18 #include <linux/of_address.h>
19 #include <linux/of_platform.h>
20 #include <linux/err.h>
21 #include <linux/gpio.h>
22 #include <linux/pinctrl/machine.h>
23 #include <linux/pinctrl/pinconf.h>
24 #include <linux/pinctrl/pinctrl.h>
25 #include <linux/pinctrl/pinmux.h>
27 #include "pinctrl-mvebu.h"
29 #define MPPS_PER_REG 8
33 struct mvebu_pinctrl_function {
39 struct mvebu_pinctrl_group {
41 struct mvebu_mpp_ctrl *ctrl;
42 struct mvebu_mpp_ctrl_setting *settings;
43 unsigned num_settings;
49 struct mvebu_pinctrl {
51 struct pinctrl_dev *pctldev;
52 struct pinctrl_desc desc;
54 struct mvebu_pinctrl_group *groups;
56 struct mvebu_pinctrl_function *functions;
57 unsigned num_functions;
61 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid(
62 struct mvebu_pinctrl *pctl, unsigned pid)
65 for (n = 0; n < pctl->num_groups; n++) {
66 if (pid >= pctl->groups[n].pins[0] &&
67 pid < pctl->groups[n].pins[0] +
68 pctl->groups[n].npins)
69 return &pctl->groups[n];
74 static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name(
75 struct mvebu_pinctrl *pctl, const char *name)
78 for (n = 0; n < pctl->num_groups; n++) {
79 if (strcmp(name, pctl->groups[n].name) == 0)
80 return &pctl->groups[n];
85 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val(
86 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
90 for (n = 0; n < grp->num_settings; n++) {
91 if (config == grp->settings[n].val) {
92 if (!pctl->variant || (pctl->variant &
93 grp->settings[n].variant))
94 return &grp->settings[n];
100 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name(
101 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
105 for (n = 0; n < grp->num_settings; n++) {
106 if (strcmp(name, grp->settings[n].name) == 0) {
107 if (!pctl->variant || (pctl->variant &
108 grp->settings[n].variant))
109 return &grp->settings[n];
115 static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting(
116 struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp)
119 for (n = 0; n < grp->num_settings; n++) {
120 if (grp->settings[n].flags &
121 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
122 if (!pctl->variant || (pctl->variant &
123 grp->settings[n].variant))
124 return &grp->settings[n];
130 static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name(
131 struct mvebu_pinctrl *pctl, const char *name)
134 for (n = 0; n < pctl->num_functions; n++) {
135 if (strcmp(name, pctl->functions[n].name) == 0)
136 return &pctl->functions[n];
142 * Common mpp pin configuration registers on MVEBU are
143 * registers of eight 4-bit values for each mpp setting.
144 * Register offset and bit mask are calculated accordingly below.
146 static int mvebu_common_mpp_get(struct mvebu_pinctrl *pctl,
147 struct mvebu_pinctrl_group *grp,
148 unsigned long *config)
150 unsigned pin = grp->gid;
151 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS;
152 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS;
154 *config = readl(pctl->base + off);
161 static int mvebu_common_mpp_set(struct mvebu_pinctrl *pctl,
162 struct mvebu_pinctrl_group *grp,
163 unsigned long config)
165 unsigned pin = grp->gid;
166 unsigned off = (pin / MPPS_PER_REG) * MPP_BITS;
167 unsigned shift = (pin % MPPS_PER_REG) * MPP_BITS;
170 reg = readl(pctl->base + off);
171 reg &= ~(MPP_MASK << shift);
172 reg |= (config << shift);
173 writel(reg, pctl->base + off);
178 static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,
179 unsigned gid, unsigned long *config)
181 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
182 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
187 if (grp->ctrl->mpp_get)
188 return grp->ctrl->mpp_get(grp->ctrl, config);
190 return mvebu_common_mpp_get(pctl, grp, config);
193 static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,
194 unsigned gid, unsigned long *configs,
195 unsigned num_configs)
197 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
198 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
204 for (i = 0; i < num_configs; i++) {
205 if (grp->ctrl->mpp_set)
206 ret = grp->ctrl->mpp_set(grp->ctrl, configs[i]);
208 ret = mvebu_common_mpp_set(pctl, grp, configs[i]);
212 } /* for each config */
217 static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
218 struct seq_file *s, unsigned gid)
220 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
221 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
222 struct mvebu_mpp_ctrl_setting *curr;
223 unsigned long config;
226 if (mvebu_pinconf_group_get(pctldev, gid, &config))
229 curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config);
232 seq_printf(s, "current: %s", curr->name);
234 seq_printf(s, "(%s)", curr->subname);
235 if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
237 if (curr->flags & MVEBU_SETTING_GPI)
239 if (curr->flags & MVEBU_SETTING_GPO)
244 seq_printf(s, "current: UNKNOWN");
246 if (grp->num_settings > 1) {
247 seq_printf(s, ", available = [");
248 for (n = 0; n < grp->num_settings; n++) {
249 if (curr == &grp->settings[n])
252 /* skip unsupported settings for this variant */
254 !(pctl->variant & grp->settings[n].variant))
257 seq_printf(s, " %s", grp->settings[n].name);
258 if (grp->settings[n].subname)
259 seq_printf(s, "(%s)", grp->settings[n].subname);
260 if (grp->settings[n].flags &
261 (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
263 if (grp->settings[n].flags & MVEBU_SETTING_GPI)
265 if (grp->settings[n].flags & MVEBU_SETTING_GPO)
275 static const struct pinconf_ops mvebu_pinconf_ops = {
276 .pin_config_group_get = mvebu_pinconf_group_get,
277 .pin_config_group_set = mvebu_pinconf_group_set,
278 .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show,
281 static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev)
283 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
285 return pctl->num_functions;
288 static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev,
291 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
293 return pctl->functions[fid].name;
296 static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid,
297 const char * const **groups,
298 unsigned * const num_groups)
300 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
302 *groups = pctl->functions[fid].groups;
303 *num_groups = pctl->functions[fid].num_groups;
307 static int mvebu_pinmux_enable(struct pinctrl_dev *pctldev, unsigned fid,
310 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
311 struct mvebu_pinctrl_function *func = &pctl->functions[fid];
312 struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
313 struct mvebu_mpp_ctrl_setting *setting;
315 unsigned long config;
317 setting = mvebu_pinctrl_find_setting_by_name(pctl, grp,
321 "unable to find setting %s in group %s\n",
322 func->name, func->groups[gid]);
326 config = setting->val;
327 ret = mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
329 dev_err(pctl->dev, "cannot set group %s to %s\n",
330 func->groups[gid], func->name);
337 static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
338 struct pinctrl_gpio_range *range, unsigned offset)
340 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
341 struct mvebu_pinctrl_group *grp;
342 struct mvebu_mpp_ctrl_setting *setting;
343 unsigned long config;
345 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
349 if (grp->ctrl->mpp_gpio_req)
350 return grp->ctrl->mpp_gpio_req(grp->ctrl, offset);
352 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
356 config = setting->val;
358 return mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
361 static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
362 struct pinctrl_gpio_range *range, unsigned offset, bool input)
364 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
365 struct mvebu_pinctrl_group *grp;
366 struct mvebu_mpp_ctrl_setting *setting;
368 grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
372 if (grp->ctrl->mpp_gpio_dir)
373 return grp->ctrl->mpp_gpio_dir(grp->ctrl, offset, input);
375 setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
379 if ((input && (setting->flags & MVEBU_SETTING_GPI)) ||
380 (!input && (setting->flags & MVEBU_SETTING_GPO)))
386 static const struct pinmux_ops mvebu_pinmux_ops = {
387 .get_functions_count = mvebu_pinmux_get_funcs_count,
388 .get_function_name = mvebu_pinmux_get_func_name,
389 .get_function_groups = mvebu_pinmux_get_groups,
390 .gpio_request_enable = mvebu_pinmux_gpio_request_enable,
391 .gpio_set_direction = mvebu_pinmux_gpio_set_direction,
392 .enable = mvebu_pinmux_enable,
395 static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
397 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
398 return pctl->num_groups;
401 static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
404 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
405 return pctl->groups[gid].name;
408 static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
409 unsigned gid, const unsigned **pins,
412 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
413 *pins = pctl->groups[gid].pins;
414 *num_pins = pctl->groups[gid].npins;
418 static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
419 struct device_node *np,
420 struct pinctrl_map **map,
423 struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
424 struct property *prop;
425 const char *function;
432 ret = of_property_read_string(np, "marvell,function", &function);
435 "missing marvell,function in node %s\n", np->name);
439 nmaps = of_property_count_strings(np, "marvell,pins");
442 "missing marvell,pins in node %s\n", np->name);
446 *map = kmalloc(nmaps * sizeof(struct pinctrl_map), GFP_KERNEL);
449 "cannot allocate pinctrl_map memory for %s\n",
455 of_property_for_each_string(np, "marvell,pins", prop, group) {
456 struct mvebu_pinctrl_group *grp =
457 mvebu_pinctrl_find_group_by_name(pctl, group);
460 dev_err(pctl->dev, "unknown pin %s", group);
464 if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) {
465 dev_err(pctl->dev, "unsupported function %s on pin %s",
470 (*map)[n].type = PIN_MAP_TYPE_MUX_GROUP;
471 (*map)[n].data.mux.group = group;
472 (*map)[n].data.mux.function = function;
481 static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
482 struct pinctrl_map *map, unsigned num_maps)
487 static const struct pinctrl_ops mvebu_pinctrl_ops = {
488 .get_groups_count = mvebu_pinctrl_get_groups_count,
489 .get_group_name = mvebu_pinctrl_get_group_name,
490 .get_group_pins = mvebu_pinctrl_get_group_pins,
491 .dt_node_to_map = mvebu_pinctrl_dt_node_to_map,
492 .dt_free_map = mvebu_pinctrl_dt_free_map,
495 static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize,
501 while (funcs->num_groups) {
502 /* function already there */
503 if (strcmp(funcs->name, name) == 0) {
510 /* append new unique function */
512 funcs->num_groups = 1;
518 static int mvebu_pinctrl_build_functions(struct platform_device *pdev,
519 struct mvebu_pinctrl *pctl)
521 struct mvebu_pinctrl_function *funcs;
522 int num = 0, funcsize = pctl->desc.npins;
525 /* we allocate functions for number of pins and hope
526 * there are fewer unique functions than pins available */
527 funcs = devm_kzalloc(&pdev->dev, funcsize *
528 sizeof(struct mvebu_pinctrl_function), GFP_KERNEL);
532 for (n = 0; n < pctl->num_groups; n++) {
533 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
534 for (s = 0; s < grp->num_settings; s++) {
537 /* skip unsupported settings on this variant */
539 !(pctl->variant & grp->settings[s].variant))
542 /* check for unique functions and count groups */
543 ret = _add_function(funcs, &funcsize,
544 grp->settings[s].name);
545 if (ret == -EOVERFLOW)
547 "More functions than pins(%d)\n",
556 pctl->num_functions = num;
557 pctl->functions = funcs;
559 for (n = 0; n < pctl->num_groups; n++) {
560 struct mvebu_pinctrl_group *grp = &pctl->groups[n];
561 for (s = 0; s < grp->num_settings; s++) {
562 struct mvebu_pinctrl_function *f;
565 /* skip unsupported settings on this variant */
567 !(pctl->variant & grp->settings[s].variant))
570 f = mvebu_pinctrl_find_function_by_name(pctl,
571 grp->settings[s].name);
573 /* allocate group name array if not done already */
575 f->groups = devm_kzalloc(&pdev->dev,
576 f->num_groups * sizeof(char *),
582 /* find next free group name and assign current name */
593 int mvebu_pinctrl_probe(struct platform_device *pdev)
595 struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
596 struct device_node *np = pdev->dev.of_node;
597 struct mvebu_pinctrl *pctl;
599 struct pinctrl_pin_desc *pdesc;
603 if (!soc || !soc->controls || !soc->modes) {
604 dev_err(&pdev->dev, "wrong pinctrl soc info\n");
608 base = of_iomap(np, 0);
610 dev_err(&pdev->dev, "unable to get base address\n");
614 pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl),
617 dev_err(&pdev->dev, "unable to alloc driver\n");
621 pctl->desc.name = dev_name(&pdev->dev);
622 pctl->desc.owner = THIS_MODULE;
623 pctl->desc.pctlops = &mvebu_pinctrl_ops;
624 pctl->desc.pmxops = &mvebu_pinmux_ops;
625 pctl->desc.confops = &mvebu_pinconf_ops;
626 pctl->variant = soc->variant;
628 pctl->dev = &pdev->dev;
629 platform_set_drvdata(pdev, pctl);
631 /* count controls and create names for mvebu generic
632 register controls; also does sanity checks */
633 pctl->num_groups = 0;
634 pctl->desc.npins = 0;
635 for (n = 0; n < soc->ncontrols; n++) {
636 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
639 pctl->desc.npins += ctrl->npins;
640 /* initial control pins */
641 for (k = 0; k < ctrl->npins; k++)
642 ctrl->pins[k] = ctrl->pid + k;
644 /* special soc specific control */
645 if (ctrl->mpp_get || ctrl->mpp_set) {
646 if (!ctrl->name || !ctrl->mpp_get || !ctrl->mpp_set) {
647 dev_err(&pdev->dev, "wrong soc control info\n");
650 pctl->num_groups += 1;
654 /* generic mvebu register control */
655 names = devm_kzalloc(&pdev->dev, ctrl->npins * 8, GFP_KERNEL);
657 dev_err(&pdev->dev, "failed to alloc mpp names\n");
660 for (k = 0; k < ctrl->npins; k++)
661 sprintf(names + 8*k, "mpp%d", ctrl->pid+k);
663 pctl->num_groups += ctrl->npins;
666 pdesc = devm_kzalloc(&pdev->dev, pctl->desc.npins *
667 sizeof(struct pinctrl_pin_desc), GFP_KERNEL);
669 dev_err(&pdev->dev, "failed to alloc pinctrl pins\n");
673 for (n = 0; n < pctl->desc.npins; n++)
675 pctl->desc.pins = pdesc;
677 pctl->groups = devm_kzalloc(&pdev->dev, pctl->num_groups *
678 sizeof(struct mvebu_pinctrl_group), GFP_KERNEL);
680 dev_err(&pdev->dev, "failed to alloc pinctrl groups\n");
684 /* assign mpp controls to groups */
686 for (n = 0; n < soc->ncontrols; n++) {
687 struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
688 pctl->groups[gid].gid = gid;
689 pctl->groups[gid].ctrl = ctrl;
690 pctl->groups[gid].name = ctrl->name;
691 pctl->groups[gid].pins = ctrl->pins;
692 pctl->groups[gid].npins = ctrl->npins;
694 /* generic mvebu register control maps to a number of groups */
695 if (!ctrl->mpp_get && !ctrl->mpp_set) {
696 pctl->groups[gid].npins = 1;
698 for (k = 1; k < ctrl->npins; k++) {
700 pctl->groups[gid].gid = gid;
701 pctl->groups[gid].ctrl = ctrl;
702 pctl->groups[gid].name = &ctrl->name[8*k];
703 pctl->groups[gid].pins = &ctrl->pins[k];
704 pctl->groups[gid].npins = 1;
710 /* assign mpp modes to groups */
711 for (n = 0; n < soc->nmodes; n++) {
712 struct mvebu_mpp_mode *mode = &soc->modes[n];
713 struct mvebu_pinctrl_group *grp =
714 mvebu_pinctrl_find_group_by_pid(pctl, mode->pid);
715 unsigned num_settings;
718 dev_warn(&pdev->dev, "unknown pinctrl group %d\n",
723 for (num_settings = 0; ;) {
724 struct mvebu_mpp_ctrl_setting *set =
725 &mode->settings[num_settings];
731 /* skip unsupported settings for this variant */
732 if (pctl->variant && !(pctl->variant & set->variant))
735 /* find gpio/gpo/gpi settings */
736 if (strcmp(set->name, "gpio") == 0)
737 set->flags = MVEBU_SETTING_GPI |
739 else if (strcmp(set->name, "gpo") == 0)
740 set->flags = MVEBU_SETTING_GPO;
741 else if (strcmp(set->name, "gpi") == 0)
742 set->flags = MVEBU_SETTING_GPI;
745 grp->settings = mode->settings;
746 grp->num_settings = num_settings;
749 ret = mvebu_pinctrl_build_functions(pdev, pctl);
751 dev_err(&pdev->dev, "unable to build functions\n");
755 pctl->pctldev = pinctrl_register(&pctl->desc, &pdev->dev, pctl);
756 if (!pctl->pctldev) {
757 dev_err(&pdev->dev, "unable to register pinctrl driver\n");
761 dev_info(&pdev->dev, "registered pinctrl driver\n");
763 /* register gpio ranges */
764 for (n = 0; n < soc->ngpioranges; n++)
765 pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]);
770 int mvebu_pinctrl_remove(struct platform_device *pdev)
772 struct mvebu_pinctrl *pctl = platform_get_drvdata(pdev);
773 pinctrl_unregister(pctl->pctldev);