1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
10 #include <asm/global_data.h>
11 #include <dm/device-internal.h>
12 #include <dm/device_compat.h>
14 #include <dm/pinctrl.h>
15 #include <fdt_support.h>
16 #include <linux/bitops.h>
17 #include <linux/err.h>
19 #include <linux/libfdt.h>
20 #include <linux/sizes.h>
23 #include "pinctrl-meson.h"
25 DECLARE_GLOBAL_DATA_PTR;
27 static const char *meson_pinctrl_dummy_name = "_dummy";
29 static char pin_name[PINNAME_SIZE];
31 int meson_pinctrl_get_groups_count(struct udevice *dev)
33 struct meson_pinctrl *priv = dev_get_priv(dev);
35 return priv->data->num_groups;
38 const char *meson_pinctrl_get_group_name(struct udevice *dev,
39 unsigned int selector)
41 struct meson_pinctrl *priv = dev_get_priv(dev);
43 if (!priv->data->groups[selector].name)
44 return meson_pinctrl_dummy_name;
46 return priv->data->groups[selector].name;
49 int meson_pinctrl_get_pins_count(struct udevice *dev)
51 struct meson_pinctrl *priv = dev_get_priv(dev);
53 return priv->data->num_pins;
56 const char *meson_pinctrl_get_pin_name(struct udevice *dev,
57 unsigned int selector)
59 struct meson_pinctrl *priv = dev_get_priv(dev);
61 if (selector > priv->data->num_pins ||
62 selector > priv->data->funcs[0].num_groups)
63 snprintf(pin_name, PINNAME_SIZE, "Error");
65 snprintf(pin_name, PINNAME_SIZE, "%s",
66 priv->data->funcs[0].groups[selector]);
71 int meson_pinmux_get_functions_count(struct udevice *dev)
73 struct meson_pinctrl *priv = dev_get_priv(dev);
75 return priv->data->num_funcs;
78 const char *meson_pinmux_get_function_name(struct udevice *dev,
79 unsigned int selector)
81 struct meson_pinctrl *priv = dev_get_priv(dev);
83 return priv->data->funcs[selector].name;
86 static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int offset,
87 enum meson_reg_type reg_type,
88 unsigned int *reg, unsigned int *bit)
90 struct meson_pinctrl *priv = dev_get_priv(dev);
91 struct meson_bank *bank = NULL;
92 struct meson_reg_desc *desc;
96 pin = priv->data->pin_base + offset;
98 for (i = 0; i < priv->data->num_banks; i++) {
99 if (pin >= priv->data->banks[i].first &&
100 pin <= priv->data->banks[i].last) {
101 bank = &priv->data->banks[i];
109 desc = &bank->regs[reg_type];
110 *reg = desc->reg * 4;
111 *bit = desc->bit + pin - bank->first;
116 int meson_gpio_get(struct udevice *dev, unsigned int offset)
118 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
119 unsigned int reg, bit;
122 ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_IN, ®,
127 return !!(readl(priv->reg_gpio + reg) & BIT(bit));
130 int meson_gpio_set(struct udevice *dev, unsigned int offset, int value)
132 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
133 unsigned int reg, bit;
136 ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_OUT, ®,
141 clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), value ? BIT(bit) : 0);
146 int meson_gpio_get_direction(struct udevice *dev, unsigned int offset)
148 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
149 unsigned int reg, bit, val;
152 ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, ®,
157 val = readl(priv->reg_gpio + reg);
159 return (val & BIT(bit)) ? GPIOF_INPUT : GPIOF_OUTPUT;
162 int meson_gpio_direction_input(struct udevice *dev, unsigned int offset)
164 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
165 unsigned int reg, bit;
168 ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, ®,
173 setbits_le32(priv->reg_gpio + reg, BIT(bit));
178 int meson_gpio_direction_output(struct udevice *dev,
179 unsigned int offset, int value)
181 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
182 unsigned int reg, bit;
185 ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_DIR, ®,
190 clrbits_le32(priv->reg_gpio + reg, BIT(bit));
192 ret = meson_gpio_calc_reg_and_bit(dev->parent, offset, REG_OUT, ®,
197 clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), value ? BIT(bit) : 0);
202 static int meson_pinconf_bias_set(struct udevice *dev, unsigned int pin,
205 struct meson_pinctrl *priv = dev_get_priv(dev);
206 unsigned int offset = pin - priv->data->pin_base;
207 unsigned int reg, bit;
210 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_PULLEN, ®, &bit);
214 if (param == PIN_CONFIG_BIAS_DISABLE) {
215 clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), 0);
219 /* othewise, enable the bias and select level */
220 clrsetbits_le32(priv->reg_pullen + reg, BIT(bit), BIT(bit));
221 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_PULL, ®, &bit);
225 clrsetbits_le32(priv->reg_pull + reg, BIT(bit),
226 (param == PIN_CONFIG_BIAS_PULL_UP ? BIT(bit) : 0));
231 static int meson_pinconf_drive_strength_set(struct udevice *dev,
233 unsigned int drive_strength_ua)
235 struct meson_pinctrl *priv = dev_get_priv(dev);
236 unsigned int offset = pin - priv->data->pin_base;
237 unsigned int reg, bit;
242 dev_err(dev, "drive-strength-microamp not supported\n");
246 ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_DS, ®, &bit);
252 if (drive_strength_ua <= 500) {
253 ds_val = MESON_PINCONF_DRV_500UA;
254 } else if (drive_strength_ua <= 2500) {
255 ds_val = MESON_PINCONF_DRV_2500UA;
256 } else if (drive_strength_ua <= 3000) {
257 ds_val = MESON_PINCONF_DRV_3000UA;
258 } else if (drive_strength_ua <= 4000) {
259 ds_val = MESON_PINCONF_DRV_4000UA;
262 "pin %u: invalid drive-strength-microamp : %d , default to 4mA\n",
263 pin, drive_strength_ua);
264 ds_val = MESON_PINCONF_DRV_4000UA;
267 clrsetbits_le32(priv->reg_ds + reg, 0x3 << bit, ds_val << bit);
272 int meson_pinconf_set(struct udevice *dev, unsigned int pin,
273 unsigned int param, unsigned int arg)
278 case PIN_CONFIG_BIAS_DISABLE:
279 case PIN_CONFIG_BIAS_PULL_UP:
280 case PIN_CONFIG_BIAS_PULL_DOWN:
281 ret = meson_pinconf_bias_set(dev, pin, param);
283 case PIN_CONFIG_DRIVE_STRENGTH_UA:
284 ret = meson_pinconf_drive_strength_set(dev, pin, arg);
287 dev_err(dev, "unsupported configuration parameter %u\n", param);
294 int meson_pinconf_group_set(struct udevice *dev,
295 unsigned int group_selector,
296 unsigned int param, unsigned int arg)
298 struct meson_pinctrl *priv = dev_get_priv(dev);
299 struct meson_pmx_group *grp = &priv->data->groups[group_selector];
302 for (i = 0; i < grp->num_pins; i++) {
303 ret = meson_pinconf_set(dev, grp->pins[i], param, arg);
311 int meson_gpio_probe(struct udevice *dev)
313 struct meson_pinctrl *priv = dev_get_priv(dev->parent);
314 struct gpio_dev_priv *uc_priv;
316 uc_priv = dev_get_uclass_priv(dev);
317 uc_priv->bank_name = priv->data->name;
318 uc_priv->gpio_count = priv->data->num_pins;
323 static fdt_addr_t parse_address(int offset, const char *name, int na, int ns)
328 index = fdt_stringlist_search(gd->fdt_blob, offset, "reg-names", name);
330 return FDT_ADDR_T_NONE;
332 reg = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
333 if (!reg || (len <= (index * sizeof(fdt32_t) * (na + ns))))
334 return FDT_ADDR_T_NONE;
336 reg += index * (na + ns);
338 return fdt_translate_address((void *)gd->fdt_blob, offset, reg);
341 int meson_pinctrl_probe(struct udevice *dev)
343 struct meson_pinctrl *priv = dev_get_priv(dev);
344 struct uclass_driver *drv;
345 struct udevice *gpio_dev;
347 int node, gpio = -1, len;
351 /* FIXME: Should use livetree */
352 na = fdt_address_cells(gd->fdt_blob, dev_of_offset(dev->parent));
354 debug("bad #address-cells\n");
358 ns = fdt_size_cells(gd->fdt_blob, dev_of_offset(dev->parent));
360 debug("bad #size-cells\n");
364 fdt_for_each_subnode(node, gd->fdt_blob, dev_of_offset(dev)) {
365 if (fdt_getprop(gd->fdt_blob, node, "gpio-controller", &len)) {
372 debug("gpio node not found\n");
376 addr = parse_address(gpio, "mux", na, ns);
377 if (addr == FDT_ADDR_T_NONE) {
378 debug("mux address not found\n");
381 priv->reg_mux = (void __iomem *)addr;
383 addr = parse_address(gpio, "gpio", na, ns);
384 if (addr == FDT_ADDR_T_NONE) {
385 debug("gpio address not found\n");
388 priv->reg_gpio = (void __iomem *)addr;
390 addr = parse_address(gpio, "pull", na, ns);
391 /* Use gpio region if pull one is not present */
392 if (addr == FDT_ADDR_T_NONE)
393 priv->reg_pull = priv->reg_gpio;
395 priv->reg_pull = (void __iomem *)addr;
397 addr = parse_address(gpio, "pull-enable", na, ns);
398 /* Use pull region if pull-enable one is not present */
399 if (addr == FDT_ADDR_T_NONE)
400 priv->reg_pullen = priv->reg_pull;
402 priv->reg_pullen = (void __iomem *)addr;
404 addr = parse_address(gpio, "ds", na, ns);
405 /* Drive strength region is optional */
406 if (addr == FDT_ADDR_T_NONE)
409 priv->reg_ds = (void __iomem *)addr;
411 priv->data = (struct meson_pinctrl_data *)dev_get_driver_data(dev);
413 /* Lookup GPIO driver */
414 drv = lists_uclass_lookup(UCLASS_GPIO);
416 puts("Cannot find GPIO driver\n");
420 name = calloc(1, 32);
421 sprintf(name, "meson-gpio");
423 /* Create child device UCLASS_GPIO and bind it */
424 device_bind(dev, priv->data->gpio_driver, name, NULL,
425 offset_to_ofnode(gpio), &gpio_dev);