1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2018 MediaTek Inc.
4 * Author: Ryder Lee <ryder.lee@mediatek.com>
7 #ifndef __PINCTRL_MEDIATEK_H__
8 #define __PINCTRL_MEDIATEK_H__
10 #define MTK_RANGE(_a) { .range = (_a), .nranges = ARRAY_SIZE(_a), }
11 #define MTK_PIN(_number, _name, _drv_n) { \
17 #define PINCTRL_PIN_GROUP(name, id) \
21 ARRAY_SIZE(id##_pins), \
25 #define PIN_FIELD_CALC(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, \
26 _x_bits, _sz_reg, _fixed) { \
30 .x_addrs = _x_addrs, \
37 /* List these attributes which could be modified for the pin */
45 PINCTRL_PIN_REG_PULLEN,
46 PINCTRL_PIN_REG_PULLSEL,
51 /* Group the pins by the driving current */
62 * struct mtk_pin_field - the structure that holds the information of the field
63 * used to describe the attribute for the pin
64 * @offset: the register offset relative to the base address
65 * @mask: the mask used to filter out the field from the register
66 * @bitpos: the start bit relative to the register
67 * @next: the indication that the field would be extended to the
70 struct mtk_pin_field {
78 * struct mtk_pin_field_calc - the structure that holds the range providing
79 * the guide used to look up the relevant field
80 * @s_pin: the start pin within the range
81 * @e_pin: the end pin within the range
82 * @s_addr: the start address for the range
83 * @x_addrs: the address distance between two consecutive registers
85 * @s_bit: the start bit for the first register within the range
86 * @x_bits: the bit distance between two consecutive pins within
88 * @sz_reg: the size of bits in a register
89 * @fixed: the consecutive pins share the same bits with the 1st
92 struct mtk_pin_field_calc {
104 * struct mtk_pin_reg_calc - the structure that holds all ranges used to
105 * determine which register the pin would make use of
106 * for certain pin attribute.
107 * @range: the start address for the range
108 * @nranges: the number of items in the range
110 struct mtk_pin_reg_calc {
111 const struct mtk_pin_field_calc *range;
112 unsigned int nranges;
116 * struct mtk_pin_desc - the structure that providing information
117 * for each pin of chips
118 * @number: unique pin number from the global pin number space
119 * @name: name for this pin
120 * @drv_n: the index with the driving group
122 struct mtk_pin_desc {
129 * struct mtk_group_desc - generic pin group descriptor
130 * @name: name of the pin group
131 * @pins: array of pins that belong to the group
132 * @num_pins: number of pins in the group
133 * @data: pin controller driver specific data
135 struct mtk_group_desc {
143 * struct mtk_function_desc - generic function descriptor
144 * @name: name of the function
145 * @group_names: array of pin group names
146 * @num_group_names: number of pin group names
148 struct mtk_function_desc {
150 const char * const *group_names;
154 /* struct mtk_pin_soc - the structure that holds SoC-specific data */
155 struct mtk_pinctrl_soc {
157 const struct mtk_pin_reg_calc *reg_cal;
158 const struct mtk_pin_desc *pins;
160 const struct mtk_group_desc *grps;
162 const struct mtk_function_desc *funcs;
167 * struct mtk_pinctrl_priv - private data for MTK pinctrl driver
169 * @base: base address of the pinctrl device
170 * @soc: SoC specific data
172 struct mtk_pinctrl_priv {
174 struct mtk_pinctrl_soc *soc;
177 extern const struct pinctrl_ops mtk_pinctrl_ops;
179 /* A common read-modify-write helper for MediaTek chips */
180 void mtk_rmw(struct udevice *dev, u32 reg, u32 mask, u32 set);
181 int mtk_pinctrl_common_probe(struct udevice *dev,
182 struct mtk_pinctrl_soc *soc);
184 #endif /* __PINCTRL_MEDIATEK_H__ */