drivers/pinctrl/intel/pinctrl-tigerlake.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Intel Tiger Lake PCH pinctrl/GPIO driver
   4  *
   5  * Copyright (C) 2019 - 2020, Intel Corporation
   6  * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
   7  *          Mika Westerberg <mika.westerberg@linux.intel.com>
   8  */
   9
  10 #include <linux/mod_devicetable.h>
  11 #include <linux/module.h>
  12 #include <linux/platform_device.h>
  13
  14 #include <linux/pinctrl/pinctrl.h>
  15
  16 #include "pinctrl-intel.h"
  17
  18 #define TGL_LP_PAD_OWN          0x020
  19 #define TGL_LP_PADCFGLOCK       0x080
  20 #define TGL_LP_HOSTSW_OWN       0x0b0
  21 #define TGL_LP_GPI_IS           0x100
  22 #define TGL_LP_GPI_IE           0x120
  23
  24 #define TGL_H_PAD_OWN           0x020
  25 #define TGL_H_PADCFGLOCK        0x090
  26 #define TGL_H_HOSTSW_OWN        0x0c0
  27 #define TGL_H_GPI_IS            0x100
  28 #define TGL_H_GPI_IE            0x120
  29
  30 #define TGL_GPP(r, s, e, g)                             \
  31         {                                               \
  32                 .reg_num = (r),                         \
  33                 .base = (s),                            \
  34                 .size = ((e) - (s) + 1),                \
  35                 .gpio_base = (g),                       \
  36         }
  37
  38 #define TGL_LP_COMMUNITY(b, s, e, g)                    \
  39         INTEL_COMMUNITY_GPPS(b, s, e, g, TGL_LP)
  40
  41 #define TGL_H_COMMUNITY(b, s, e, g)                     \
  42         INTEL_COMMUNITY_GPPS(b, s, e, g, TGL_H)
  43
  44 /* Tiger Lake-LP */
  45 static const struct pinctrl_pin_desc tgllp_pins[] = {
  46         /* GPP_B */
  47         PINCTRL_PIN(0, "CORE_VID_0"),
  48         PINCTRL_PIN(1, "CORE_VID_1"),
  49         PINCTRL_PIN(2, "VRALERTB"),
  50         PINCTRL_PIN(3, "CPU_GP_2"),
  51         PINCTRL_PIN(4, "CPU_GP_3"),
  52         PINCTRL_PIN(5, "ISH_I2C0_SDA"),
  53         PINCTRL_PIN(6, "ISH_I2C0_SCL"),
  54         PINCTRL_PIN(7, "ISH_I2C1_SDA"),
  55         PINCTRL_PIN(8, "ISH_I2C1_SCL"),
  56         PINCTRL_PIN(9, "I2C5_SDA"),
  57         PINCTRL_PIN(10, "I2C5_SCL"),
  58         PINCTRL_PIN(11, "PMCALERTB"),
  59         PINCTRL_PIN(12, "SLP_S0B"),
  60         PINCTRL_PIN(13, "PLTRSTB"),
  61         PINCTRL_PIN(14, "SPKR"),
  62         PINCTRL_PIN(15, "GSPI0_CS0B"),
  63         PINCTRL_PIN(16, "GSPI0_CLK"),
  64         PINCTRL_PIN(17, "GSPI0_MISO"),
  65         PINCTRL_PIN(18, "GSPI0_MOSI"),
  66         PINCTRL_PIN(19, "GSPI1_CS0B"),
  67         PINCTRL_PIN(20, "GSPI1_CLK"),
  68         PINCTRL_PIN(21, "GSPI1_MISO"),
  69         PINCTRL_PIN(22, "GSPI1_MOSI"),
  70         PINCTRL_PIN(23, "SML1ALERTB"),
  71         PINCTRL_PIN(24, "GSPI0_CLK_LOOPBK"),
  72         PINCTRL_PIN(25, "GSPI1_CLK_LOOPBK"),
  73         /* GPP_T */
  74         PINCTRL_PIN(26, "I2C6_SDA"),
  75         PINCTRL_PIN(27, "I2C6_SCL"),
  76         PINCTRL_PIN(28, "I2C7_SDA"),
  77         PINCTRL_PIN(29, "I2C7_SCL"),
  78         PINCTRL_PIN(30, "UART4_RXD"),
  79         PINCTRL_PIN(31, "UART4_TXD"),
  80         PINCTRL_PIN(32, "UART4_RTSB"),
  81         PINCTRL_PIN(33, "UART4_CTSB"),
  82         PINCTRL_PIN(34, "UART5_RXD"),
  83         PINCTRL_PIN(35, "UART5_TXD"),
  84         PINCTRL_PIN(36, "UART5_RTSB"),
  85         PINCTRL_PIN(37, "UART5_CTSB"),
  86         PINCTRL_PIN(38, "UART6_RXD"),
  87         PINCTRL_PIN(39, "UART6_TXD"),
  88         PINCTRL_PIN(40, "UART6_RTSB"),
  89         PINCTRL_PIN(41, "UART6_CTSB"),
  90         /* GPP_A */
  91         PINCTRL_PIN(42, "ESPI_IO_0"),
  92         PINCTRL_PIN(43, "ESPI_IO_1"),
  93         PINCTRL_PIN(44, "ESPI_IO_2"),
  94         PINCTRL_PIN(45, "ESPI_IO_3"),
  95         PINCTRL_PIN(46, "ESPI_CSB"),
  96         PINCTRL_PIN(47, "ESPI_CLK"),
  97         PINCTRL_PIN(48, "ESPI_RESETB"),
  98         PINCTRL_PIN(49, "I2S2_SCLK"),
  99         PINCTRL_PIN(50, "I2S2_SFRM"),
 100         PINCTRL_PIN(51, "I2S2_TXD"),
 101         PINCTRL_PIN(52, "I2S2_RXD"),
 102         PINCTRL_PIN(53, "PMC_I2C_SDA"),
 103         PINCTRL_PIN(54, "SATAXPCIE_1"),
 104         PINCTRL_PIN(55, "PMC_I2C_SCL"),
 105         PINCTRL_PIN(56, "USB2_OCB_1"),
 106         PINCTRL_PIN(57, "USB2_OCB_2"),
 107         PINCTRL_PIN(58, "USB2_OCB_3"),
 108         PINCTRL_PIN(59, "DDSP_HPD_C"),
 109         PINCTRL_PIN(60, "DDSP_HPD_B"),
 110         PINCTRL_PIN(61, "DDSP_HPD_1"),
 111         PINCTRL_PIN(62, "DDSP_HPD_2"),
 112         PINCTRL_PIN(63, "GPPC_A_21"),
 113         PINCTRL_PIN(64, "GPPC_A_22"),
 114         PINCTRL_PIN(65, "I2S1_SCLK"),
 115         PINCTRL_PIN(66, "ESPI_CLK_LOOPBK"),
 116         /* GPP_S */
 117         PINCTRL_PIN(67, "SNDW0_CLK"),
 118         PINCTRL_PIN(68, "SNDW0_DATA"),
 119         PINCTRL_PIN(69, "SNDW1_CLK"),
 120         PINCTRL_PIN(70, "SNDW1_DATA"),
 121         PINCTRL_PIN(71, "SNDW2_CLK"),
 122         PINCTRL_PIN(72, "SNDW2_DATA"),
 123         PINCTRL_PIN(73, "SNDW3_CLK"),
 124         PINCTRL_PIN(74, "SNDW3_DATA"),
 125         /* GPP_H */
 126         PINCTRL_PIN(75, "GPPC_H_0"),
 127         PINCTRL_PIN(76, "GPPC_H_1"),
 128         PINCTRL_PIN(77, "GPPC_H_2"),
 129         PINCTRL_PIN(78, "SX_EXIT_HOLDOFFB"),
 130         PINCTRL_PIN(79, "I2C2_SDA"),
 131         PINCTRL_PIN(80, "I2C2_SCL"),
 132         PINCTRL_PIN(81, "I2C3_SDA"),
 133         PINCTRL_PIN(82, "I2C3_SCL"),
 134         PINCTRL_PIN(83, "I2C4_SDA"),
 135         PINCTRL_PIN(84, "I2C4_SCL"),
 136         PINCTRL_PIN(85, "SRCCLKREQB_4"),
 137         PINCTRL_PIN(86, "SRCCLKREQB_5"),
 138         PINCTRL_PIN(87, "M2_SKT2_CFG_0"),
 139         PINCTRL_PIN(88, "M2_SKT2_CFG_1"),
 140         PINCTRL_PIN(89, "M2_SKT2_CFG_2"),
 141         PINCTRL_PIN(90, "M2_SKT2_CFG_3"),
 142         PINCTRL_PIN(91, "DDPB_CTRLCLK"),
 143         PINCTRL_PIN(92, "DDPB_CTRLDATA"),
 144         PINCTRL_PIN(93, "CPU_C10_GATEB"),
 145         PINCTRL_PIN(94, "TIME_SYNC_0"),
 146         PINCTRL_PIN(95, "IMGCLKOUT_1"),
 147         PINCTRL_PIN(96, "IMGCLKOUT_2"),
 148         PINCTRL_PIN(97, "IMGCLKOUT_3"),
 149         PINCTRL_PIN(98, "IMGCLKOUT_4"),
 150         /* GPP_D */
 151         PINCTRL_PIN(99, "ISH_GP_0"),
 152         PINCTRL_PIN(100, "ISH_GP_1"),
 153         PINCTRL_PIN(101, "ISH_GP_2"),
 154         PINCTRL_PIN(102, "ISH_GP_3"),
 155         PINCTRL_PIN(103, "IMGCLKOUT_0"),
 156         PINCTRL_PIN(104, "SRCCLKREQB_0"),
 157         PINCTRL_PIN(105, "SRCCLKREQB_1"),
 158         PINCTRL_PIN(106, "SRCCLKREQB_2"),
 159         PINCTRL_PIN(107, "SRCCLKREQB_3"),
 160         PINCTRL_PIN(108, "ISH_SPI_CSB"),
 161         PINCTRL_PIN(109, "ISH_SPI_CLK"),
 162         PINCTRL_PIN(110, "ISH_SPI_MISO"),
 163         PINCTRL_PIN(111, "ISH_SPI_MOSI"),
 164         PINCTRL_PIN(112, "ISH_UART0_RXD"),
 165         PINCTRL_PIN(113, "ISH_UART0_TXD"),
 166         PINCTRL_PIN(114, "ISH_UART0_RTSB"),
 167         PINCTRL_PIN(115, "ISH_UART0_CTSB"),
 168         PINCTRL_PIN(116, "ISH_GP_4"),
 169         PINCTRL_PIN(117, "ISH_GP_5"),
 170         PINCTRL_PIN(118, "I2S_MCLK1_OUT"),
 171         PINCTRL_PIN(119, "GSPI2_CLK_LOOPBK"),
 172         /* GPP_U */
 173         PINCTRL_PIN(120, "UART3_RXD"),
 174         PINCTRL_PIN(121, "UART3_TXD"),
 175         PINCTRL_PIN(122, "UART3_RTSB"),
 176         PINCTRL_PIN(123, "UART3_CTSB"),
 177         PINCTRL_PIN(124, "GSPI3_CS0B"),
 178         PINCTRL_PIN(125, "GSPI3_CLK"),
 179         PINCTRL_PIN(126, "GSPI3_MISO"),
 180         PINCTRL_PIN(127, "GSPI3_MOSI"),
 181         PINCTRL_PIN(128, "GSPI4_CS0B"),
 182         PINCTRL_PIN(129, "GSPI4_CLK"),
 183         PINCTRL_PIN(130, "GSPI4_MISO"),
 184         PINCTRL_PIN(131, "GSPI4_MOSI"),
 185         PINCTRL_PIN(132, "GSPI5_CS0B"),
 186         PINCTRL_PIN(133, "GSPI5_CLK"),
 187         PINCTRL_PIN(134, "GSPI5_MISO"),
 188         PINCTRL_PIN(135, "GSPI5_MOSI"),
 189         PINCTRL_PIN(136, "GSPI6_CS0B"),
 190         PINCTRL_PIN(137, "GSPI6_CLK"),
 191         PINCTRL_PIN(138, "GSPI6_MISO"),
 192         PINCTRL_PIN(139, "GSPI6_MOSI"),
 193         PINCTRL_PIN(140, "GSPI3_CLK_LOOPBK"),
 194         PINCTRL_PIN(141, "GSPI4_CLK_LOOPBK"),
 195         PINCTRL_PIN(142, "GSPI5_CLK_LOOPBK"),
 196         PINCTRL_PIN(143, "GSPI6_CLK_LOOPBK"),
 197         /* vGPIO */
 198         PINCTRL_PIN(144, "CNV_BTEN"),
 199         PINCTRL_PIN(145, "CNV_BT_HOST_WAKEB"),
 200         PINCTRL_PIN(146, "CNV_BT_IF_SELECT"),
 201         PINCTRL_PIN(147, "vCNV_BT_UART_TXD"),
 202         PINCTRL_PIN(148, "vCNV_BT_UART_RXD"),
 203         PINCTRL_PIN(149, "vCNV_BT_UART_CTS_B"),
 204         PINCTRL_PIN(150, "vCNV_BT_UART_RTS_B"),
 205         PINCTRL_PIN(151, "vCNV_MFUART1_TXD"),
 206         PINCTRL_PIN(152, "vCNV_MFUART1_RXD"),
 207         PINCTRL_PIN(153, "vCNV_MFUART1_CTS_B"),
 208         PINCTRL_PIN(154, "vCNV_MFUART1_RTS_B"),
 209         PINCTRL_PIN(155, "vUART0_TXD"),
 210         PINCTRL_PIN(156, "vUART0_RXD"),
 211         PINCTRL_PIN(157, "vUART0_CTS_B"),
 212         PINCTRL_PIN(158, "vUART0_RTS_B"),
 213         PINCTRL_PIN(159, "vISH_UART0_TXD"),
 214         PINCTRL_PIN(160, "vISH_UART0_RXD"),
 215         PINCTRL_PIN(161, "vISH_UART0_CTS_B"),
 216         PINCTRL_PIN(162, "vISH_UART0_RTS_B"),
 217         PINCTRL_PIN(163, "vCNV_BT_I2S_BCLK"),
 218         PINCTRL_PIN(164, "vCNV_BT_I2S_WS_SYNC"),
 219         PINCTRL_PIN(165, "vCNV_BT_I2S_SDO"),
 220         PINCTRL_PIN(166, "vCNV_BT_I2S_SDI"),
 221         PINCTRL_PIN(167, "vI2S2_SCLK"),
 222         PINCTRL_PIN(168, "vI2S2_SFRM"),
 223         PINCTRL_PIN(169, "vI2S2_TXD"),
 224         PINCTRL_PIN(170, "vI2S2_RXD"),
 225         /* GPP_C */
 226         PINCTRL_PIN(171, "SMBCLK"),
 227         PINCTRL_PIN(172, "SMBDATA"),
 228         PINCTRL_PIN(173, "SMBALERTB"),
 229         PINCTRL_PIN(174, "SML0CLK"),
 230         PINCTRL_PIN(175, "SML0DATA"),
 231         PINCTRL_PIN(176, "SML0ALERTB"),
 232         PINCTRL_PIN(177, "SML1CLK"),
 233         PINCTRL_PIN(178, "SML1DATA"),
 234         PINCTRL_PIN(179, "UART0_RXD"),
 235         PINCTRL_PIN(180, "UART0_TXD"),
 236         PINCTRL_PIN(181, "UART0_RTSB"),
 237         PINCTRL_PIN(182, "UART0_CTSB"),
 238         PINCTRL_PIN(183, "UART1_RXD"),
 239         PINCTRL_PIN(184, "UART1_TXD"),
 240         PINCTRL_PIN(185, "UART1_RTSB"),
 241         PINCTRL_PIN(186, "UART1_CTSB"),
 242         PINCTRL_PIN(187, "I2C0_SDA"),
 243         PINCTRL_PIN(188, "I2C0_SCL"),
 244         PINCTRL_PIN(189, "I2C1_SDA"),
 245         PINCTRL_PIN(190, "I2C1_SCL"),
 246         PINCTRL_PIN(191, "UART2_RXD"),
 247         PINCTRL_PIN(192, "UART2_TXD"),
 248         PINCTRL_PIN(193, "UART2_RTSB"),
 249         PINCTRL_PIN(194, "UART2_CTSB"),
 250         /* GPP_F */
 251         PINCTRL_PIN(195, "CNV_BRI_DT"),
 252         PINCTRL_PIN(196, "CNV_BRI_RSP"),
 253         PINCTRL_PIN(197, "CNV_RGI_DT"),
 254         PINCTRL_PIN(198, "CNV_RGI_RSP"),
 255         PINCTRL_PIN(199, "CNV_RF_RESET_B"),
 256         PINCTRL_PIN(200, "GPPC_F_5"),
 257         PINCTRL_PIN(201, "CNV_PA_BLANKING"),
 258         PINCTRL_PIN(202, "GPPC_F_7"),
 259         PINCTRL_PIN(203, "I2S_MCLK2_INOUT"),
 260         PINCTRL_PIN(204, "BOOTMPC"),
 261         PINCTRL_PIN(205, "GPPC_F_10"),
 262         PINCTRL_PIN(206, "GPPC_F_11"),
 263         PINCTRL_PIN(207, "GSXDOUT"),
 264         PINCTRL_PIN(208, "GSXSLOAD"),
 265         PINCTRL_PIN(209, "GSXDIN"),
 266         PINCTRL_PIN(210, "GSXSRESETB"),
 267         PINCTRL_PIN(211, "GSXCLK"),
 268         PINCTRL_PIN(212, "GMII_MDC"),
 269         PINCTRL_PIN(213, "GMII_MDIO"),
 270         PINCTRL_PIN(214, "SRCCLKREQB_6"),
 271         PINCTRL_PIN(215, "EXT_PWR_GATEB"),
 272         PINCTRL_PIN(216, "EXT_PWR_GATE2B"),
 273         PINCTRL_PIN(217, "VNN_CTRL"),
 274         PINCTRL_PIN(218, "V1P05_CTRL"),
 275         PINCTRL_PIN(219, "GPPF_CLK_LOOPBACK"),
 276         /* HVCMOS */
 277         PINCTRL_PIN(220, "L_BKLTEN"),
 278         PINCTRL_PIN(221, "L_BKLTCTL"),
 279         PINCTRL_PIN(222, "L_VDDEN"),
 280         PINCTRL_PIN(223, "SYS_PWROK"),
 281         PINCTRL_PIN(224, "SYS_RESETB"),
 282         PINCTRL_PIN(225, "MLK_RSTB"),
 283         /* GPP_E */
 284         PINCTRL_PIN(226, "SATAXPCIE_0"),
 285         PINCTRL_PIN(227, "SPI1_IO_2"),
 286         PINCTRL_PIN(228, "SPI1_IO_3"),
 287         PINCTRL_PIN(229, "CPU_GP_0"),
 288         PINCTRL_PIN(230, "SATA_DEVSLP_0"),
 289         PINCTRL_PIN(231, "SATA_DEVSLP_1"),
 290         PINCTRL_PIN(232, "GPPC_E_6"),
 291         PINCTRL_PIN(233, "CPU_GP_1"),
 292         PINCTRL_PIN(234, "SPI1_CS1B"),
 293         PINCTRL_PIN(235, "USB2_OCB_0"),
 294         PINCTRL_PIN(236, "SPI1_CSB"),
 295         PINCTRL_PIN(237, "SPI1_CLK"),
 296         PINCTRL_PIN(238, "SPI1_MISO_IO_1"),
 297         PINCTRL_PIN(239, "SPI1_MOSI_IO_0"),
 298         PINCTRL_PIN(240, "DDSP_HPD_A"),
 299         PINCTRL_PIN(241, "ISH_GP_6"),
 300         PINCTRL_PIN(242, "ISH_GP_7"),
 301         PINCTRL_PIN(243, "GPPC_E_17"),
 302         PINCTRL_PIN(244, "DDP1_CTRLCLK"),
 303         PINCTRL_PIN(245, "DDP1_CTRLDATA"),
 304         PINCTRL_PIN(246, "DDP2_CTRLCLK"),
 305         PINCTRL_PIN(247, "DDP2_CTRLDATA"),
 306         PINCTRL_PIN(248, "DDPA_CTRLCLK"),
 307         PINCTRL_PIN(249, "DDPA_CTRLDATA"),
 308         PINCTRL_PIN(250, "SPI1_CLK_LOOPBK"),
 309         /* JTAG */
 310         PINCTRL_PIN(251, "JTAG_TDO"),
 311         PINCTRL_PIN(252, "JTAGX"),
 312         PINCTRL_PIN(253, "PRDYB"),
 313         PINCTRL_PIN(254, "PREQB"),
 314         PINCTRL_PIN(255, "CPU_TRSTB"),
 315         PINCTRL_PIN(256, "JTAG_TDI"),
 316         PINCTRL_PIN(257, "JTAG_TMS"),
 317         PINCTRL_PIN(258, "JTAG_TCK"),
 318         PINCTRL_PIN(259, "DBG_PMODE"),
 319         /* GPP_R */
 320         PINCTRL_PIN(260, "HDA_BCLK"),
 321         PINCTRL_PIN(261, "HDA_SYNC"),
 322         PINCTRL_PIN(262, "HDA_SDO"),
 323         PINCTRL_PIN(263, "HDA_SDI_0"),
 324         PINCTRL_PIN(264, "HDA_RSTB"),
 325         PINCTRL_PIN(265, "HDA_SDI_1"),
 326         PINCTRL_PIN(266, "GPP_R_6"),
 327         PINCTRL_PIN(267, "GPP_R_7"),
 328         /* SPI */
 329         PINCTRL_PIN(268, "SPI0_IO_2"),
 330         PINCTRL_PIN(269, "SPI0_IO_3"),
 331         PINCTRL_PIN(270, "SPI0_MOSI_IO_0"),
 332         PINCTRL_PIN(271, "SPI0_MISO_IO_1"),
 333         PINCTRL_PIN(272, "SPI0_TPM_CSB"),
 334         PINCTRL_PIN(273, "SPI0_FLASH_0_CSB"),
 335         PINCTRL_PIN(274, "SPI0_FLASH_1_CSB"),
 336         PINCTRL_PIN(275, "SPI0_CLK"),
 337         PINCTRL_PIN(276, "SPI0_CLK_LOOPBK"),
 338 };
 339
 340 static const struct intel_padgroup tgllp_community0_gpps[] = {
 341         TGL_GPP(0, 0, 25, 0),                           /* GPP_B */
 342         TGL_GPP(1, 26, 41, 32),                         /* GPP_T */
 343         TGL_GPP(2, 42, 66, 64),                         /* GPP_A */
 344 };
 345
 346 static const struct intel_padgroup tgllp_community1_gpps[] = {
 347         TGL_GPP(0, 67, 74, 96),                         /* GPP_S */
 348         TGL_GPP(1, 75, 98, 128),                        /* GPP_H */
 349         TGL_GPP(2, 99, 119, 160),                       /* GPP_D */
 350         TGL_GPP(3, 120, 143, 192),                      /* GPP_U */
 351         TGL_GPP(4, 144, 170, 224),                      /* vGPIO */
 352 };
 353
 354 static const struct intel_padgroup tgllp_community4_gpps[] = {
 355         TGL_GPP(0, 171, 194, 256),                      /* GPP_C */
 356         TGL_GPP(1, 195, 219, 288),                      /* GPP_F */
 357         TGL_GPP(2, 220, 225, INTEL_GPIO_BASE_NOMAP),    /* HVCMOS */
 358         TGL_GPP(3, 226, 250, 320),                      /* GPP_E */
 359         TGL_GPP(4, 251, 259, INTEL_GPIO_BASE_NOMAP),    /* JTAG */
 360 };
 361
 362 static const struct intel_padgroup tgllp_community5_gpps[] = {
 363         TGL_GPP(0, 260, 267, 352),                      /* GPP_R */
 364         TGL_GPP(1, 268, 276, INTEL_GPIO_BASE_NOMAP),    /* SPI */
 365 };
 366
 367 static const struct intel_community tgllp_communities[] = {
 368         TGL_LP_COMMUNITY(0, 0, 66, tgllp_community0_gpps),
 369         TGL_LP_COMMUNITY(1, 67, 170, tgllp_community1_gpps),
 370         TGL_LP_COMMUNITY(2, 171, 259, tgllp_community4_gpps),
 371         TGL_LP_COMMUNITY(3, 260, 276, tgllp_community5_gpps),
 372 };
 373
 374 static const struct intel_pinctrl_soc_data tgllp_soc_data = {
 375         .pins = tgllp_pins,
 376         .npins = ARRAY_SIZE(tgllp_pins),
 377         .communities = tgllp_communities,
 378         .ncommunities = ARRAY_SIZE(tgllp_communities),
 379 };
 380
 381 /* Tiger Lake-H */
 382 static const struct pinctrl_pin_desc tglh_pins[] = {
 383         /* GPP_A */
 384         PINCTRL_PIN(0, "SPI0_IO_2"),
 385         PINCTRL_PIN(1, "SPI0_IO_3"),
 386         PINCTRL_PIN(2, "SPI0_MOSI_IO_0"),
 387         PINCTRL_PIN(3, "SPI0_MISO_IO_1"),
 388         PINCTRL_PIN(4, "SPI0_TPM_CSB"),
 389         PINCTRL_PIN(5, "SPI0_FLASH_0_CSB"),
 390         PINCTRL_PIN(6, "SPI0_FLASH_1_CSB"),
 391         PINCTRL_PIN(7, "SPI0_CLK"),
 392         PINCTRL_PIN(8, "ESPI_IO_0"),
 393         PINCTRL_PIN(9, "ESPI_IO_1"),
 394         PINCTRL_PIN(10, "ESPI_IO_2"),
 395         PINCTRL_PIN(11, "ESPI_IO_3"),
 396         PINCTRL_PIN(12, "ESPI_CS0B"),
 397         PINCTRL_PIN(13, "ESPI_CLK"),
 398         PINCTRL_PIN(14, "ESPI_RESETB"),
 399         PINCTRL_PIN(15, "ESPI_CS1B"),
 400         PINCTRL_PIN(16, "ESPI_CS2B"),
 401         PINCTRL_PIN(17, "ESPI_CS3B"),
 402         PINCTRL_PIN(18, "ESPI_ALERT0B"),
 403         PINCTRL_PIN(19, "ESPI_ALERT1B"),
 404         PINCTRL_PIN(20, "ESPI_ALERT2B"),
 405         PINCTRL_PIN(21, "ESPI_ALERT3B"),
 406         PINCTRL_PIN(22, "GPPC_A_14"),
 407         PINCTRL_PIN(23, "SPI0_CLK_LOOPBK"),
 408         PINCTRL_PIN(24, "ESPI_CLK_LOOPBK"),
 409         /* GPP_R */
 410         PINCTRL_PIN(25, "HDA_BCLK"),
 411         PINCTRL_PIN(26, "HDA_SYNC"),
 412         PINCTRL_PIN(27, "HDA_SDO"),
 413         PINCTRL_PIN(28, "HDA_SDI_0"),
 414         PINCTRL_PIN(29, "HDA_RSTB"),
 415         PINCTRL_PIN(30, "HDA_SDI_1"),
 416         PINCTRL_PIN(31, "GPP_R_6"),
 417         PINCTRL_PIN(32, "GPP_R_7"),
 418         PINCTRL_PIN(33, "GPP_R_8"),
 419         PINCTRL_PIN(34, "PCIE_LNK_DOWN"),
 420         PINCTRL_PIN(35, "ISH_UART0_RTSB"),
 421         PINCTRL_PIN(36, "SX_EXIT_HOLDOFFB"),
 422         PINCTRL_PIN(37, "CLKOUT_48"),
 423         PINCTRL_PIN(38, "ISH_GP_7"),
 424         PINCTRL_PIN(39, "ISH_GP_0"),
 425         PINCTRL_PIN(40, "ISH_GP_1"),
 426         PINCTRL_PIN(41, "ISH_GP_2"),
 427         PINCTRL_PIN(42, "ISH_GP_3"),
 428         PINCTRL_PIN(43, "ISH_GP_4"),
 429         PINCTRL_PIN(44, "ISH_GP_5"),
 430         /* GPP_B */
 431         PINCTRL_PIN(45, "GSPI0_CS1B"),
 432         PINCTRL_PIN(46, "GSPI1_CS1B"),
 433         PINCTRL_PIN(47, "VRALERTB"),
 434         PINCTRL_PIN(48, "CPU_GP_2"),
 435         PINCTRL_PIN(49, "CPU_GP_3"),
 436         PINCTRL_PIN(50, "SRCCLKREQB_0"),
 437         PINCTRL_PIN(51, "SRCCLKREQB_1"),
 438         PINCTRL_PIN(52, "SRCCLKREQB_2"),
 439         PINCTRL_PIN(53, "SRCCLKREQB_3"),
 440         PINCTRL_PIN(54, "SRCCLKREQB_4"),
 441         PINCTRL_PIN(55, "SRCCLKREQB_5"),
 442         PINCTRL_PIN(56, "I2S_MCLK"),
 443         PINCTRL_PIN(57, "SLP_S0B"),
 444         PINCTRL_PIN(58, "PLTRSTB"),
 445         PINCTRL_PIN(59, "SPKR"),
 446         PINCTRL_PIN(60, "GSPI0_CS0B"),
 447         PINCTRL_PIN(61, "GSPI0_CLK"),
 448         PINCTRL_PIN(62, "GSPI0_MISO"),
 449         PINCTRL_PIN(63, "GSPI0_MOSI"),
 450         PINCTRL_PIN(64, "GSPI1_CS0B"),
 451         PINCTRL_PIN(65, "GSPI1_CLK"),
 452         PINCTRL_PIN(66, "GSPI1_MISO"),
 453         PINCTRL_PIN(67, "GSPI1_MOSI"),
 454         PINCTRL_PIN(68, "SML1ALERTB"),
 455         PINCTRL_PIN(69, "GSPI0_CLK_LOOPBK"),
 456         PINCTRL_PIN(70, "GSPI1_CLK_LOOPBK"),
 457         /* vGPIO_0 */
 458         PINCTRL_PIN(71, "ESPI_USB_OCB_0"),
 459         PINCTRL_PIN(72, "ESPI_USB_OCB_1"),
 460         PINCTRL_PIN(73, "ESPI_USB_OCB_2"),
 461         PINCTRL_PIN(74, "ESPI_USB_OCB_3"),
 462         PINCTRL_PIN(75, "USB_CPU_OCB_0"),
 463         PINCTRL_PIN(76, "USB_CPU_OCB_1"),
 464         PINCTRL_PIN(77, "USB_CPU_OCB_2"),
 465         PINCTRL_PIN(78, "USB_CPU_OCB_3"),
 466         /* GPP_D */
 467         PINCTRL_PIN(79, "SPI1_CSB"),
 468         PINCTRL_PIN(80, "SPI1_CLK"),
 469         PINCTRL_PIN(81, "SPI1_MISO_IO_1"),
 470         PINCTRL_PIN(82, "SPI1_MOSI_IO_0"),
 471         PINCTRL_PIN(83, "SML1CLK"),
 472         PINCTRL_PIN(84, "I2S2_SFRM"),
 473         PINCTRL_PIN(85, "I2S2_TXD"),
 474         PINCTRL_PIN(86, "I2S2_RXD"),
 475         PINCTRL_PIN(87, "I2S2_SCLK"),
 476         PINCTRL_PIN(88, "SML0CLK"),
 477         PINCTRL_PIN(89, "SML0DATA"),
 478         PINCTRL_PIN(90, "GPP_D_11"),
 479         PINCTRL_PIN(91, "ISH_UART0_CTSB"),
 480         PINCTRL_PIN(92, "SPI1_IO_2"),
 481         PINCTRL_PIN(93, "SPI1_IO_3"),
 482         PINCTRL_PIN(94, "SML1DATA"),
 483         PINCTRL_PIN(95, "GSPI3_CS0B"),
 484         PINCTRL_PIN(96, "GSPI3_CLK"),
 485         PINCTRL_PIN(97, "GSPI3_MISO"),
 486         PINCTRL_PIN(98, "GSPI3_MOSI"),
 487         PINCTRL_PIN(99, "UART3_RXD"),
 488         PINCTRL_PIN(100, "UART3_TXD"),
 489         PINCTRL_PIN(101, "UART3_RTSB"),
 490         PINCTRL_PIN(102, "UART3_CTSB"),
 491         PINCTRL_PIN(103, "SPI1_CLK_LOOPBK"),
 492         PINCTRL_PIN(104, "GSPI3_CLK_LOOPBK"),
 493         /* GPP_C */
 494         PINCTRL_PIN(105, "SMBCLK"),
 495         PINCTRL_PIN(106, "SMBDATA"),
 496         PINCTRL_PIN(107, "SMBALERTB"),
 497         PINCTRL_PIN(108, "ISH_UART0_RXD"),
 498         PINCTRL_PIN(109, "ISH_UART0_TXD"),
 499         PINCTRL_PIN(110, "SML0ALERTB"),
 500         PINCTRL_PIN(111, "ISH_I2C2_SDA"),
 501         PINCTRL_PIN(112, "ISH_I2C2_SCL"),
 502         PINCTRL_PIN(113, "UART0_RXD"),
 503         PINCTRL_PIN(114, "UART0_TXD"),
 504         PINCTRL_PIN(115, "UART0_RTSB"),
 505         PINCTRL_PIN(116, "UART0_CTSB"),
 506         PINCTRL_PIN(117, "UART1_RXD"),
 507         PINCTRL_PIN(118, "UART1_TXD"),
 508         PINCTRL_PIN(119, "UART1_RTSB"),
 509         PINCTRL_PIN(120, "UART1_CTSB"),
 510         PINCTRL_PIN(121, "I2C0_SDA"),
 511         PINCTRL_PIN(122, "I2C0_SCL"),
 512         PINCTRL_PIN(123, "I2C1_SDA"),
 513         PINCTRL_PIN(124, "I2C1_SCL"),
 514         PINCTRL_PIN(125, "UART2_RXD"),
 515         PINCTRL_PIN(126, "UART2_TXD"),
 516         PINCTRL_PIN(127, "UART2_RTSB"),
 517         PINCTRL_PIN(128, "UART2_CTSB"),
 518         /* GPP_S */
 519         PINCTRL_PIN(129, "SNDW1_CLK"),
 520         PINCTRL_PIN(130, "SNDW1_DATA"),
 521         PINCTRL_PIN(131, "SNDW2_CLK"),
 522         PINCTRL_PIN(132, "SNDW2_DATA"),
 523         PINCTRL_PIN(133, "SNDW3_CLK"),
 524         PINCTRL_PIN(134, "SNDW3_DATA"),
 525         PINCTRL_PIN(135, "SNDW4_CLK"),
 526         PINCTRL_PIN(136, "SNDW4_DATA"),
 527         /* GPP_G */
 528         PINCTRL_PIN(137, "DDPA_CTRLCLK"),
 529         PINCTRL_PIN(138, "DDPA_CTRLDATA"),
 530         PINCTRL_PIN(139, "DNX_FORCE_RELOAD"),
 531         PINCTRL_PIN(140, "GMII_MDC_0"),
 532         PINCTRL_PIN(141, "GMII_MDIO_0"),
 533         PINCTRL_PIN(142, "SLP_DRAMB"),
 534         PINCTRL_PIN(143, "GPPC_G_6"),
 535         PINCTRL_PIN(144, "GPPC_G_7"),
 536         PINCTRL_PIN(145, "ISH_SPI_CSB"),
 537         PINCTRL_PIN(146, "ISH_SPI_CLK"),
 538         PINCTRL_PIN(147, "ISH_SPI_MISO"),
 539         PINCTRL_PIN(148, "ISH_SPI_MOSI"),
 540         PINCTRL_PIN(149, "DDP1_CTRLCLK"),
 541         PINCTRL_PIN(150, "DDP1_CTRLDATA"),
 542         PINCTRL_PIN(151, "DDP2_CTRLCLK"),
 543         PINCTRL_PIN(152, "DDP2_CTRLDATA"),
 544         PINCTRL_PIN(153, "GSPI2_CLK_LOOPBK"),
 545         /* vGPIO */
 546         PINCTRL_PIN(154, "CNV_BTEN"),
 547         PINCTRL_PIN(155, "CNV_BT_HOST_WAKEB"),
 548         PINCTRL_PIN(156, "CNV_BT_IF_SELECT"),
 549         PINCTRL_PIN(157, "vCNV_BT_UART_TXD"),
 550         PINCTRL_PIN(158, "vCNV_BT_UART_RXD"),
 551         PINCTRL_PIN(159, "vCNV_BT_UART_CTS_B"),
 552         PINCTRL_PIN(160, "vCNV_BT_UART_RTS_B"),
 553         PINCTRL_PIN(161, "vCNV_MFUART1_TXD"),
 554         PINCTRL_PIN(162, "vCNV_MFUART1_RXD"),
 555         PINCTRL_PIN(163, "vCNV_MFUART1_CTS_B"),
 556         PINCTRL_PIN(164, "vCNV_MFUART1_RTS_B"),
 557         PINCTRL_PIN(165, "vUART0_TXD"),
 558         PINCTRL_PIN(166, "vUART0_RXD"),
 559         PINCTRL_PIN(167, "vUART0_CTS_B"),
 560         PINCTRL_PIN(168, "vUART0_RTS_B"),
 561         PINCTRL_PIN(169, "vISH_UART0_TXD"),
 562         PINCTRL_PIN(170, "vISH_UART0_RXD"),
 563         PINCTRL_PIN(171, "vISH_UART0_CTS_B"),
 564         PINCTRL_PIN(172, "vISH_UART0_RTS_B"),
 565         PINCTRL_PIN(173, "vCNV_BT_I2S_BCLK"),
 566         PINCTRL_PIN(174, "vCNV_BT_I2S_WS_SYNC"),
 567         PINCTRL_PIN(175, "vCNV_BT_I2S_SDO"),
 568         PINCTRL_PIN(176, "vCNV_BT_I2S_SDI"),
 569         PINCTRL_PIN(177, "vI2S2_SCLK"),
 570         PINCTRL_PIN(178, "vI2S2_SFRM"),
 571         PINCTRL_PIN(179, "vI2S2_TXD"),
 572         PINCTRL_PIN(180, "vI2S2_RXD"),
 573         /* GPP_E */
 574         PINCTRL_PIN(181, "SATAXPCIE_0"),
 575         PINCTRL_PIN(182, "SATAXPCIE_1"),
 576         PINCTRL_PIN(183, "SATAXPCIE_2"),
 577         PINCTRL_PIN(184, "CPU_GP_0"),
 578         PINCTRL_PIN(185, "SATA_DEVSLP_0"),
 579         PINCTRL_PIN(186, "SATA_DEVSLP_1"),
 580         PINCTRL_PIN(187, "SATA_DEVSLP_2"),
 581         PINCTRL_PIN(188, "CPU_GP_1"),
 582         PINCTRL_PIN(189, "SATA_LEDB"),
 583         PINCTRL_PIN(190, "USB2_OCB_0"),
 584         PINCTRL_PIN(191, "USB2_OCB_1"),
 585         PINCTRL_PIN(192, "USB2_OCB_2"),
 586         PINCTRL_PIN(193, "USB2_OCB_3"),
 587         /* GPP_F */
 588         PINCTRL_PIN(194, "SATAXPCIE_3"),
 589         PINCTRL_PIN(195, "SATAXPCIE_4"),
 590         PINCTRL_PIN(196, "SATAXPCIE_5"),
 591         PINCTRL_PIN(197, "SATAXPCIE_6"),
 592         PINCTRL_PIN(198, "SATAXPCIE_7"),
 593         PINCTRL_PIN(199, "SATA_DEVSLP_3"),
 594         PINCTRL_PIN(200, "SATA_DEVSLP_4"),
 595         PINCTRL_PIN(201, "SATA_DEVSLP_5"),
 596         PINCTRL_PIN(202, "SATA_DEVSLP_6"),
 597         PINCTRL_PIN(203, "SATA_DEVSLP_7"),
 598         PINCTRL_PIN(204, "SATA_SCLOCK"),
 599         PINCTRL_PIN(205, "SATA_SLOAD"),
 600         PINCTRL_PIN(206, "SATA_SDATAOUT1"),
 601         PINCTRL_PIN(207, "SATA_SDATAOUT0"),
 602         PINCTRL_PIN(208, "PS_ONB"),
 603         PINCTRL_PIN(209, "M2_SKT2_CFG_0"),
 604         PINCTRL_PIN(210, "M2_SKT2_CFG_1"),
 605         PINCTRL_PIN(211, "M2_SKT2_CFG_2"),
 606         PINCTRL_PIN(212, "M2_SKT2_CFG_3"),
 607         PINCTRL_PIN(213, "L_VDDEN"),
 608         PINCTRL_PIN(214, "L_BKLTEN"),
 609         PINCTRL_PIN(215, "L_BKLTCTL"),
 610         PINCTRL_PIN(216, "VNN_CTRL"),
 611         PINCTRL_PIN(217, "GPP_F_23"),
 612         /* GPP_H */
 613         PINCTRL_PIN(218, "SRCCLKREQB_6"),
 614         PINCTRL_PIN(219, "SRCCLKREQB_7"),
 615         PINCTRL_PIN(220, "SRCCLKREQB_8"),
 616         PINCTRL_PIN(221, "SRCCLKREQB_9"),
 617         PINCTRL_PIN(222, "SRCCLKREQB_10"),
 618         PINCTRL_PIN(223, "SRCCLKREQB_11"),
 619         PINCTRL_PIN(224, "SRCCLKREQB_12"),
 620         PINCTRL_PIN(225, "SRCCLKREQB_13"),
 621         PINCTRL_PIN(226, "SRCCLKREQB_14"),
 622         PINCTRL_PIN(227, "SRCCLKREQB_15"),
 623         PINCTRL_PIN(228, "SML2CLK"),
 624         PINCTRL_PIN(229, "SML2DATA"),
 625         PINCTRL_PIN(230, "SML2ALERTB"),
 626         PINCTRL_PIN(231, "SML3CLK"),
 627         PINCTRL_PIN(232, "SML3DATA"),
 628         PINCTRL_PIN(233, "SML3ALERTB"),
 629         PINCTRL_PIN(234, "SML4CLK"),
 630         PINCTRL_PIN(235, "SML4DATA"),
 631         PINCTRL_PIN(236, "SML4ALERTB"),
 632         PINCTRL_PIN(237, "ISH_I2C0_SDA"),
 633         PINCTRL_PIN(238, "ISH_I2C0_SCL"),
 634         PINCTRL_PIN(239, "ISH_I2C1_SDA"),
 635         PINCTRL_PIN(240, "ISH_I2C1_SCL"),
 636         PINCTRL_PIN(241, "TIME_SYNC_0"),
 637         /* GPP_J */
 638         PINCTRL_PIN(242, "CNV_PA_BLANKING"),
 639         PINCTRL_PIN(243, "CPU_C10_GATEB"),
 640         PINCTRL_PIN(244, "CNV_BRI_DT"),
 641         PINCTRL_PIN(245, "CNV_BRI_RSP"),
 642         PINCTRL_PIN(246, "CNV_RGI_DT"),
 643         PINCTRL_PIN(247, "CNV_RGI_RSP"),
 644         PINCTRL_PIN(248, "CNV_MFUART2_RXD"),
 645         PINCTRL_PIN(249, "CNV_MFUART2_TXD"),
 646         PINCTRL_PIN(250, "GPP_J_8"),
 647         PINCTRL_PIN(251, "GPP_J_9"),
 648         /* GPP_K */
 649         PINCTRL_PIN(252, "GSXDOUT"),
 650         PINCTRL_PIN(253, "GSXSLOAD"),
 651         PINCTRL_PIN(254, "GSXDIN"),
 652         PINCTRL_PIN(255, "GSXSRESETB"),
 653         PINCTRL_PIN(256, "GSXCLK"),
 654         PINCTRL_PIN(257, "ADR_COMPLETE"),
 655         PINCTRL_PIN(258, "DDSP_HPD_A"),
 656         PINCTRL_PIN(259, "DDSP_HPD_B"),
 657         PINCTRL_PIN(260, "CORE_VID_0"),
 658         PINCTRL_PIN(261, "CORE_VID_1"),
 659         PINCTRL_PIN(262, "DDSP_HPD_C"),
 660         PINCTRL_PIN(263, "GPP_K_11"),
 661         PINCTRL_PIN(264, "SYS_PWROK"),
 662         PINCTRL_PIN(265, "SYS_RESETB"),
 663         PINCTRL_PIN(266, "MLK_RSTB"),
 664         /* GPP_I */
 665         PINCTRL_PIN(267, "PMCALERTB"),
 666         PINCTRL_PIN(268, "DDSP_HPD_1"),
 667         PINCTRL_PIN(269, "DDSP_HPD_2"),
 668         PINCTRL_PIN(270, "DDSP_HPD_3"),
 669         PINCTRL_PIN(271, "DDSP_HPD_4"),
 670         PINCTRL_PIN(272, "DDPB_CTRLCLK"),
 671         PINCTRL_PIN(273, "DDPB_CTRLDATA"),
 672         PINCTRL_PIN(274, "DDPC_CTRLCLK"),
 673         PINCTRL_PIN(275, "DDPC_CTRLDATA"),
 674         PINCTRL_PIN(276, "FUSA_DIAGTEST_EN"),
 675         PINCTRL_PIN(277, "FUSA_DIAGTEST_MODE"),
 676         PINCTRL_PIN(278, "USB2_OCB_4"),
 677         PINCTRL_PIN(279, "USB2_OCB_5"),
 678         PINCTRL_PIN(280, "USB2_OCB_6"),
 679         PINCTRL_PIN(281, "USB2_OCB_7"),
 680         /* JTAG */
 681         PINCTRL_PIN(282, "JTAG_TDO"),
 682         PINCTRL_PIN(283, "JTAGX"),
 683         PINCTRL_PIN(284, "PRDYB"),
 684         PINCTRL_PIN(285, "PREQB"),
 685         PINCTRL_PIN(286, "JTAG_TDI"),
 686         PINCTRL_PIN(287, "JTAG_TMS"),
 687         PINCTRL_PIN(288, "JTAG_TCK"),
 688         PINCTRL_PIN(289, "DBG_PMODE"),
 689         PINCTRL_PIN(290, "CPU_TRSTB"),
 690 };
 691
 692 static const struct intel_padgroup tglh_community0_gpps[] = {
 693         TGL_GPP(0, 0, 24, 0),                           /* GPP_A */
 694         TGL_GPP(1, 25, 44, 32),                         /* GPP_R */
 695         TGL_GPP(2, 45, 70, 64),                         /* GPP_B */
 696         TGL_GPP(3, 71, 78, 96),                         /* vGPIO_0 */
 697 };
 698
 699 static const struct intel_padgroup tglh_community1_gpps[] = {
 700         TGL_GPP(0, 79, 104, 128),                       /* GPP_D */
 701         TGL_GPP(1, 105, 128, 160),                      /* GPP_C */
 702         TGL_GPP(2, 129, 136, 192),                      /* GPP_S */
 703         TGL_GPP(3, 137, 153, 224),                      /* GPP_G */
 704         TGL_GPP(4, 154, 180, 256),                      /* vGPIO */
 705 };
 706
 707 static const struct intel_padgroup tglh_community3_gpps[] = {
 708         TGL_GPP(0, 181, 193, 288),                      /* GPP_E */
 709         TGL_GPP(1, 194, 217, 320),                      /* GPP_F */
 710 };
 711
 712 static const struct intel_padgroup tglh_community4_gpps[] = {
 713         TGL_GPP(0, 218, 241, 352),                      /* GPP_H */
 714         TGL_GPP(1, 242, 251, 384),                      /* GPP_J */
 715         TGL_GPP(2, 252, 266, 416),                      /* GPP_K */
 716 };
 717
 718 static const struct intel_padgroup tglh_community5_gpps[] = {
 719         TGL_GPP(0, 267, 281, 448),                      /* GPP_I */
 720         TGL_GPP(1, 282, 290, INTEL_GPIO_BASE_NOMAP),    /* JTAG */
 721 };
 722
 723 static const struct intel_community tglh_communities[] = {
 724         TGL_H_COMMUNITY(0, 0, 78, tglh_community0_gpps),
 725         TGL_H_COMMUNITY(1, 79, 180, tglh_community1_gpps),
 726         TGL_H_COMMUNITY(2, 181, 217, tglh_community3_gpps),
 727         TGL_H_COMMUNITY(3, 218, 266, tglh_community4_gpps),
 728         TGL_H_COMMUNITY(4, 267, 290, tglh_community5_gpps),
 729 };
 730
 731 static const struct intel_pinctrl_soc_data tglh_soc_data = {
 732         .pins = tglh_pins,
 733         .npins = ARRAY_SIZE(tglh_pins),
 734         .communities = tglh_communities,
 735         .ncommunities = ARRAY_SIZE(tglh_communities),
 736 };
 737
 738 static const struct acpi_device_id tgl_pinctrl_acpi_match[] = {
 739         { "INT34C5", (kernel_ulong_t)&tgllp_soc_data },
 740         { "INT34C6", (kernel_ulong_t)&tglh_soc_data },
 741         { "INTC1055", (kernel_ulong_t)&tgllp_soc_data },
 742         { }
 743 };
 744 MODULE_DEVICE_TABLE(acpi, tgl_pinctrl_acpi_match);
 745
 746 static INTEL_PINCTRL_PM_OPS(tgl_pinctrl_pm_ops);
 747
 748 static struct platform_driver tgl_pinctrl_driver = {
 749         .probe = intel_pinctrl_probe_by_hid,
 750         .driver = {
 751                 .name = "tigerlake-pinctrl",
 752                 .acpi_match_table = tgl_pinctrl_acpi_match,
 753                 .pm = &tgl_pinctrl_pm_ops,
 754         },
 755 };
 756 module_platform_driver(tgl_pinctrl_driver);
 757
 758 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
 759 MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
 760 MODULE_DESCRIPTION("Intel Tiger Lake PCH pinctrl/GPIO driver");
 761 MODULE_LICENSE("GPL v2");
 762 MODULE_IMPORT_NS(PINCTRL_INTEL);